moore.map.summary

来自「moore状态机用VHDL语言进行实现」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Thu Nov 06 17:02:39 2008
Quartus II Version : 8.0 Build 231 07/10/2008 SP 1 SJ Full Version
Revision Name : moore
Top-level Entity Name : moore
Family : MAX II
Total logic elements : 6
Total pins : 6
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0