rt73.h

r73模块的无线网卡在Linux下的驱动程序

	struct	{
		ULONG       RxAckTimeout:9;
		ULONG       TsfOffset:6;        // default is 24
		ULONG       AutoTxSeq:1;        // 1: ASIC auto replace sequence# in outgoing frame
		ULONG		DisableRx:1;		// Disable Rx engine
		ULONG		DropCRCErr:1;		// Drop CRC error
		ULONG		DropPhyErr:1;		// Drop physical error
		ULONG		DropControl:1;		// Drop control frame
		ULONG		DropNotToMe:1;		// Drop not to me unicast frame
		ULONG		DropToDs:1;			// Drop fram ToDs bit is true
		ULONG		DropVerErr:1;	    // Drop version error frame
		ULONG		DropMcast:1;		// Drop multicast frames
		ULONG		DropBcast:1;		// Drop broadcast frames
		ULONG       DropAckCts:1;       // 1: drop received ACK and CTS
		ULONG       TxWithoutWaitingSBox:1;
		ULONG		:5;
	}	field;
	ULONG			word;
}	TXRX_CSR0_STRUC, *PTXRX_CSR0_STRUC;
#endif

//
// TXRX_CSR4: Auto-Responder/Tx-retry register
//
#ifdef BIG_ENDIAN
typedef	union	_TXRX_CSR4_STRUC	{
	struct	{
		ULONG       ShortRetryLimit:4;
		ULONG       LongRetryLimit:4;
		ULONG		Rsv1:1;
		ULONG		OfdmTxFallbacktoCCK:1;      // 0: Fallbackt o OFDM 6M oly, 1: Fallback to CCK 1M,2M
		ULONG       OfdmTxRateDownStep:2;       // 0:1-step, 1: 2-step, 2:3-step, 3:4-step
		ULONG       OfdmTxRateDownEnable:1;     // 1:enable
		ULONG       AutoResponderPreamble:1;    // 0:long, 1:short preamble
		ULONG       AutoResponderEnable:1;
		ULONG       AckCtsPsmBit:1;
		ULONG       Rsv2:5;
		ULONG       CntlFrameAckPolicy:3;
		ULONG       TxAckTimeout:8;
	}	field;
	ULONG			word;
}	TXRX_CSR4_STRUC, *PTXRX_CSR4_STRUC;
#else
typedef	union	_TXRX_CSR4_STRUC	{
	struct	{
		ULONG       TxAckTimeout:8;
		ULONG       CntlFrameAckPolicy:3;
		ULONG       Rsv2:5;
		ULONG       AckCtsPsmBit:1;
		ULONG       AutoResponderEnable:1;
		ULONG       AutoResponderPreamble:1;    // 0:long, 1:short preamble
		ULONG       OfdmTxRateDownEnable:1;     // 1:enable
		ULONG       OfdmTxRateDownStep:2;       // 0:1-step, 1: 2-step, 2:3-step, 3:4-step
		ULONG		OfdmTxFallbacktoCCK:1;      // 0: Fallbackt o OFDM 6M oly, 1: Fallback to CCK 1M,2M
		ULONG		Rsv1:1;
		ULONG       LongRetryLimit:4;
		ULONG       ShortRetryLimit:4;
	}	field;
	ULONG			word;
}	TXRX_CSR4_STRUC, *PTXRX_CSR4_STRUC;
#endif

//
// TXRX_CSR9: Synchronization control register
//
#ifdef BIG_ENDIAN
typedef	union	_TXRX_CSR9_STRUC	{
	struct	{
		ULONG		TxTimestampCompensate:8;
		ULONG       :3;
		ULONG		bBeaconGen:1;		// Enable beacon generator
		ULONG       bTBTTEnable:1;
		ULONG		TsfSyncMode:2;		// Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
		ULONG		bTsfTicking:1;		// Enable TSF auto counting
		ULONG       BeaconInterval:16;  // in unit of 1/16 TU
	}	field;
	ULONG			word;
}	TXRX_CSR9_STRUC, *PTXRX_CSR9_STRUC;
#else
typedef	union	_TXRX_CSR9_STRUC	{
	struct	{
		ULONG       BeaconInterval:16;  // in unit of 1/16 TU
		ULONG		bTsfTicking:1;		// Enable TSF auto counting
		ULONG		TsfSyncMode:2;		// Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
		ULONG       bTBTTEnable:1;
		ULONG		bBeaconGen:1;		// Enable beacon generator
		ULONG       :3;
		ULONG		TxTimestampCompensate:8;
	}	field;
	ULONG			word;
}	TXRX_CSR9_STRUC, *PTXRX_CSR9_STRUC;
#endif

//
// PHY_CSR3: BBP serial control register
//
#ifdef BIG_ENDIAN
typedef	union	_PHY_CSR3_STRUC	{
	struct	{
		ULONG		:15;
		ULONG		Busy:1;				// 1: ASIC is busy execute BBP programming.
		ULONG		fRead:1;		    // 0: Write	BBP, 1:	Read BBP
		ULONG		RegNum:7;			// Selected	BBP	register
		ULONG		Value:8;			// Register	value to program into BBP
	}	field;
	ULONG			word;
}	PHY_CSR3_STRUC, *PPHY_CSR3_STRUC;
#else
typedef	union	_PHY_CSR3_STRUC	{
	struct	{
		ULONG		Value:8;			// Register	value to program into BBP
		ULONG		RegNum:7;			// Selected	BBP	register
		ULONG		fRead:1;		    // 0: Write	BBP, 1:	Read BBP
		ULONG		Busy:1;				// 1: ASIC is busy execute BBP programming.
		ULONG		:15;
	}	field;
	ULONG			word;
}	PHY_CSR3_STRUC, *PPHY_CSR3_STRUC;
#endif

//
// PHY_CSR4: RF serial control register
//
#ifdef BIG_ENDIAN
typedef	union	_PHY_CSR4_STRUC	{
	struct	{
		ULONG		Busy:1;				// 1: ASIC is busy execute RF programming.
		ULONG		PLL_LD:1;			// RF PLL_LD status
		ULONG		IFSelect:1;			// 1: select IF	to program,	0: select RF to	program
		ULONG		NumberOfBits:5;		// Number of bits used in RFRegValue (I:20,	RFMD:22)
		ULONG		RFRegValue:24;		// Register	value (include register	id)	serial out to RF/IF	chip.
	}	field;
	ULONG			word;
}	PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
#else
typedef	union	_PHY_CSR4_STRUC	{
	struct	{
		ULONG		RFRegValue:24;		// Register	value (include register	id)	serial out to RF/IF	chip.
		ULONG		NumberOfBits:5;		// Number of bits used in RFRegValue (I:20,	RFMD:22)
		ULONG		IFSelect:1;			// 1: select IF	to program,	0: select RF to	program
		ULONG		PLL_LD:1;			// RF PLL_LD status
		ULONG		Busy:1;				// 1: ASIC is busy execute RF programming.
	}	field;
	ULONG			word;
}	PHY_CSR4_STRUC, *PPHY_CSR4_STRUC;
#endif

//
// SEC_CSR1: shared key table security mode register
//
#ifdef BIG_ENDIAN
typedef	union	_SEC_CSR1_STRUC	{
	struct	{
		ULONG       :1;
		ULONG       Bss1Key3CipherAlg:3;
		ULONG       :1;
		ULONG       Bss1Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss1Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss1Key0CipherAlg:3;
		ULONG       :1;
		ULONG       Bss0Key3CipherAlg:3;
		ULONG       :1;
		ULONG       Bss0Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss0Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss0Key0CipherAlg:3;
	}	field;
	ULONG			word;
}	SEC_CSR1_STRUC, *PSEC_CSR1_STRUC;
#else
typedef	union	_SEC_CSR1_STRUC	{
	struct	{
		ULONG       Bss0Key0CipherAlg:3;
		ULONG       :1;
		ULONG       Bss0Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss0Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss0Key3CipherAlg:3;
		ULONG       :1;
		ULONG       Bss1Key0CipherAlg:3;
		ULONG       :1;
		ULONG       Bss1Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss1Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss1Key3CipherAlg:3;
		ULONG       :1;
	}	field;
	ULONG			word;
}	SEC_CSR1_STRUC, *PSEC_CSR1_STRUC;
#endif

//
// SEC_CSR5: shared key table security mode register
//
#ifdef BIG_ENDIAN
typedef	union	_SEC_CSR5_STRUC	{
	struct	{
		ULONG       :1;
		ULONG       Bss3Key3CipherAlg:3;
		ULONG       :1;
		ULONG       Bss3Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss3Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss3Key0CipherAlg:3;
		ULONG       :1;
		ULONG       Bss2Key3CipherAlg:3;
		ULONG       :1;
		ULONG       Bss2Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss2Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss2Key0CipherAlg:3;
	}	field;
	ULONG			word;
}	SEC_CSR5_STRUC, *PSEC_CSR5_STRUC;
#else
typedef	union	_SEC_CSR5_STRUC	{
	struct	{
		ULONG       Bss2Key0CipherAlg:3;
		ULONG       :1;
		ULONG       Bss2Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss2Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss2Key3CipherAlg:3;
		ULONG       :1;
		ULONG       Bss3Key0CipherAlg:3;
		ULONG       :1;
		ULONG       Bss3Key1CipherAlg:3;
		ULONG       :1;
		ULONG       Bss3Key2CipherAlg:3;
		ULONG       :1;
		ULONG       Bss3Key3CipherAlg:3;
		ULONG       :1;
	}	field;
	ULONG			word;
}	SEC_CSR5_STRUC, *PSEC_CSR5_STRUC;
#endif

//
// STA_CSR0: RX PLCP error count & RX CRC error count
//
#ifdef BIG_ENDIAN
typedef	union	_STA_CSR0_STRUC	{
	struct	{
		USHORT  PlcpErr;
		USHORT  CrcErr;
	}	field;
	ULONG			word;
}	STA_CSR0_STRUC, *PSTA_CSR0_STRUC;
#else
typedef	union	_STA_CSR0_STRUC	{
	struct	{
		USHORT  CrcErr;
		USHORT  PlcpErr;
	}	field;
	ULONG			word;
}	STA_CSR0_STRUC, *PSTA_CSR0_STRUC;
#endif

//
// STA_CSR1: RX False CCA count & RX LONG frame count
//
#ifdef BIG_ENDIAN
typedef	union	_STA_CSR1_STRUC	{
	struct	{
		USHORT  FalseCca;
		USHORT  PhyErr;
	}	field;
	ULONG			word;
}	STA_CSR1_STRUC, *PSTA_CSR1_STRUC;
#else
typedef	union	_STA_CSR1_STRUC	{
	struct	{
		USHORT  PhyErr;
		USHORT  FalseCca;
	}	field;
	ULONG			word;
}	STA_CSR1_STRUC, *PSTA_CSR1_STRUC;
#endif

//
// STA_CSR2: TX Beacon count and RX FIFO overflow count
//
#ifdef BIG_ENDIAN
typedef	union	_STA_CSR2_STRUC	{
	struct	{
		USHORT  RxOverflowCount;
		USHORT  RxFifoOverflowCount;
	}	field;
	ULONG			word;
}	STA_CSR2_STRUC, *PSTA_CSR2_STRUC;
#else
typedef	union	_STA_CSR2_STRUC	{
	struct	{
		USHORT  RxFifoOverflowCount;
		USHORT  RxOverflowCount;
	}	field;
	ULONG			word;
}	STA_CSR2_STRUC, *PSTA_CSR2_STRUC;
#endif

//
// STA_CSR3: TX Beacon count
//
#ifdef BIG_ENDIAN
typedef	union	_STA_CSR3_STRUC	{
	struct	{
		USHORT  Rsv;
		USHORT  TxBeaconCount;
	}	field;
	ULONG			word;
}	STA_CSR3_STRUC, *PSTA_CSR3_STRUC;
#else
typedef	union	_STA_CSR3_STRUC	{
	struct	{
		USHORT  TxBeaconCount;
		USHORT  Rsv;
	}	field;
	ULONG			word;
}	STA_CSR3_STRUC, *PSTA_CSR3_STRUC;
#endif

//
// STA_CSR4: TX Retry count
//
#ifdef BIG_ENDIAN
typedef	union	_STA_CSR4_STRUC	{
	struct	{
		USHORT  TxOneRetryCount;
		USHORT  TxNoRetryCount;
	}	field;
	ULONG			word;
}	STA_CSR4_STRUC, *PSTA_CSR4_STRUC;
#else
typedef	union	_STA_CSR4_STRUC	{
	struct	{
		USHORT  TxNoRetryCount;
		USHORT  TxOneRetryCount;
	}	field;
	ULONG			word;
}	STA_CSR4_STRUC, *PSTA_CSR4_STRUC;
#endif


//
// STA_CSR5: TX Retry count
//
#ifdef BIG_ENDIAN
typedef	union	_STA_CSR5_STRUC	{
	struct	{
		USHORT  TxRetryFailCount;
		USHORT  TxMultiRetryCount;
	}	field;
	ULONG			word;
}	STA_CSR5_STRUC, *PSTA_CSR5_STRUC;
#else
typedef	union	_STA_CSR5_STRUC	{
	struct	{
		USHORT  TxMultiRetryCount;
		USHORT  TxRetryFailCount;
	}	field;
	ULONG			word;
}	STA_CSR5_STRUC, *PSTA_CSR5_STRUC;
#endif

//
// HOST_CMD_CSR: For HOST to interrupt embedded processor
//
#ifdef BIG_ENDIAN
typedef	union	_HOST_CMD_CSR_STRUC	{
	struct	{
		ULONG   Rsv:24;
		ULONG   InterruptMcu:1;
		ULONG   HostCommand:7;
	}	field;
	ULONG			word;
}	HOST_CMD_CSR_STRUC, *PHOST_CMD_CSR_STRUC;
#else
typedef	union	_HOST_CMD_CSR_STRUC	{
	struct	{
		ULONG   HostCommand:7;
		ULONG   InterruptMcu:1;
		ULONG   Rsv:24;
	}	field;
	ULONG			word;
}	HOST_CMD_CSR_STRUC, *PHOST_CMD_CSR_STRUC;
#endif

//
// TX_RING_CSR0: TX Ring size for AC_BK, AC_BE, AC_VI, AC_VO
//
#ifdef BIG_ENDIAN
typedef	union	_TX_RING_CSR0_STRUC	{
	struct	{
		UCHAR   Ac3Total;
		UCHAR   Ac2Total;
		UCHAR   Ac1Total;
		UCHAR   Ac0Total;
	}	field;
	ULONG			word;
}	TX_RING_CSR0_STRUC, *PTX_RING_CSR0_STRUC;
#else
typedef	union	_TX_RING_CSR0_STRUC	{
	struct	{
		UCHAR   Ac0Total;
		UCHAR   Ac1Total;
		UCHAR   Ac2Total;
		UCHAR   Ac3Total;
	}	field;
	ULONG			word;
}	TX_RING_CSR0_STRUC, *PTX_RING_CSR0_STRUC;
#endif

//
// TX_RING_CSR1: TX Ring size for MGMT Ring, HCCA Ring
//
#ifdef BIG_ENDIAN
typedef	union	_TX_RING_CSR1_STRUC	{
	struct	{
		ULONG   Rsv:10;
		ULONG   TxdSize:6;      // in unit of 32-bit
		ULONG   HccaTotal:8;
		ULONG   MgmtTotal:8;
	}	field;
	ULONG			word;
}	TX_RING_CSR1_STRUC, *PTX_RING_CSR1_STRUC;
#else
typedef	union	_TX_RING_CSR1_STRUC	{
	struct	{
		ULONG   MgmtTotal:8;
		ULONG   HccaTotal:8;
		ULONG   TxdSize:6;      // in unit of 32-bit
		ULONG   Rsv:10;
	}	field;
	ULONG			word;
}	TX_RING_CSR1_STRUC, *PTX_RING_CSR1_STRUC;
#endif

//
// AIFSN_CSR: AIFSN for each EDCA AC
//
#ifdef BIG_ENDIAN
typedef	union	_AIFSN_CSR_STRUC	{
	struct	{
		ULONG   Rsv:16;
		ULONG   Aifsn3:4;       // for AC_VO
		ULONG   Aifsn2:4;       // for AC_VI
		ULONG   Aifsn1:4;       // for AC_BK
		ULONG   Aifsn0:4;       // for AC_BE
	}	field;
	ULONG			word;
}	AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC;
#else
typedef	union	_AIFSN_CSR_STRUC	{
	struct	{
		ULONG   Aifsn0:4;       // for AC_BE
		ULONG   Aifsn1:4;       // for AC_BK
		ULONG   Aifsn2:4;       // for AC_VI
		ULONG   Aifsn3:4;       // for AC_VO
		ULONG   Rsv:16;
	}	field;
	ULONG			word;
}	AIFSN_CSR_STRUC, *PAIFSN_CSR_STRUC;
#endif

//
// CWMIN_CSR: CWmin for each EDCA AC
//
#ifdef BIG_ENDIAN
typedef	union	_CWMIN_CSR_STRUC	{
	struct	{
		ULONG   Rsv:16;
		ULONG   Cwmin3:4;       // for AC_VO
		ULONG   Cwmin2:4;       // for AC_VI