exp_cpu.vho

计算机体系结构试验

SIGNAL \Mux8~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux8~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux8~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux8~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[8]~48_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[8]~48_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[8]~48_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[8]~48_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~236_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~236_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~837_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~837_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[8]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[8]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux7~134_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux7~134_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux7~136_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux7~136_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux7~137_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux7~137_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux7~138_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux7~138_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux7~139_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux7~139_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux7~140_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux7~140_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux6~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux6~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux6~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux6~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~238_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~238_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[9]~50_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[9]~50_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[9]~50_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[9]~50_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~839_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~839_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[9]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[9]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux6~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux6~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux6~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux6~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux5~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux5~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux5~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux5~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[10]~52_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[10]~52_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[10]~52_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[10]~52_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~240_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~240_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~841_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~841_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[10]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[10]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux5~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux5~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux5~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux5~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[11]~54_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[11]~54_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[11]~54_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[11]~54_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~843_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~843_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~242_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~242_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[11]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[11]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux4~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux4~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux4~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux4~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux4~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux4~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux4~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux4~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux3~333_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux3~333_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux3~334_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux3~334_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[12]~56_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[12]~56_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~244_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~244_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~845_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~845_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[12]~56_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[12]~56_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[12]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[12]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux3~332_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux3~332_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux3~335_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux3~335_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[13]~58_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[13]~58_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[13]~58_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[13]~58_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~847_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~847_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~246_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~246_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[13]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[13]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux2~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux2~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux2~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux2~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux2~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux2~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux2~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux2~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux1~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux1~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux1~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux1~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[14]~60_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[14]~60_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~248_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~248_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~849_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~849_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[14]~60_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[14]~60_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[14]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[14]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux1~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux1~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux1~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux1~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~250_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~250_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[15]~62_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[15]~62_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[15]~62_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[15]~62_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~851_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~851_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[15]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[15]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux0~339_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux0~339_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux0~340_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux0~340_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux0~341_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux0~341_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux0~342_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux0~342_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \clk~I_modesel\ : std_logic_vector(26 DOWNTO 0);
SIGNAL \G_MEMORY|rw~28_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_MEMORY|rw~28_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[6]~202_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[6]~202_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[6]~203_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[6]~203_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[0]~204_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[0]~204_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[0]~205_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[0]~205_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[1]~206_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[1]~206_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[1]~207_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[1]~207_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[2]~208_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[2]~208_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[2]~209_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[2]~209_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[3]~210_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[3]~210_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[3]~211_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[3]~211_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[4]~212_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[4]~212_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[4]~213_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[4]~213_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[5]~214_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[5]~214_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[5]~215_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[5]~215_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[6]~216_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mem_Addr[6]~216_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Me