exp_cpu.vho

计算机体系结构试验

SIGNAL \G_EXE|Add1~554_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add1~554_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add4~316_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add4~316_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add3~294_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add3~294_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mux2~34_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mux2~34_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mux2~35_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mux2~35_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mux2~37_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mux2~37_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add1~556_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add1~556_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add4~318_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add4~318_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add3~296_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add3~296_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mux1~32_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mux1~32_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mux1~33_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mux1~33_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mux1~34_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mux1~34_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Mux1~35_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Mux1~35_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~192_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~192_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~190_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~190_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~193_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~193_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_REGFILE|z_out~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add1~558_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add1~558_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add3~298_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add3~298_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|Add4~320_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|Add4~320_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_REGFILE|c_out~515_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_REGFILE|c_out~515_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_REGFILE|c_out~516_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_REGFILE|c_out~516_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_REGFILE|c_out~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_REGFILE|c_out~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|c_z_j_flag~79_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|c_z_j_flag~79_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~819_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~819_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~820_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~820_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[0]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[0]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux15~318_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux15~318_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux15~325_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux15~325_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux15~326_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux15~326_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux14~430_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux14~430_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux14~431_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux14~431_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux14~429_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux14~429_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~222_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~222_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[1]~34_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[1]~34_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[1]~34_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[1]~34_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[11]~822_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[11]~822_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~823_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~823_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[1]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux14~427_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux14~427_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux14~432_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux14~432_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux13~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux13~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux13~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux13~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[2]~36_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[2]~36_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[2]~36_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[2]~36_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~224_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~224_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~825_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~825_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux13~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux13~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux13~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux13~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~226_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~226_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[3]~38_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[3]~38_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[3]~38_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[3]~38_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~827_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~827_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux12~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux12~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux12~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux12~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux12~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux12~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux12~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux12~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[4]~40_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[4]~40_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[4]~40_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[4]~40_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~228_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~228_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~829_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~829_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[4]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[4]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux11~134_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux11~134_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux11~136_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux11~136_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux11~137_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux11~137_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux11~138_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux11~138_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux11~139_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux11~139_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux11~140_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux11~140_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux10~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux10~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux10~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux10~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~230_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~230_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[5]~42_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[5]~42_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[5]~42_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[5]~42_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~831_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~831_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[5]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[5]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux10~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux10~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux10~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux10~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux9~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux9~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux9~306_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux9~306_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[6]~44_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[6]~44_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[6]~44_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[6]~44_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~232_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~232_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~833_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~833_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[6]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[6]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux9~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux9~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux9~307_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux9~307_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~234_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|Add1~234_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[7]~46_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc_inc[7]~46_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[7]~46_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_EXE|sjmp_addr[7]~46_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~835_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc~835_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[7]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \G_INSTRU_FETCH|pc[7]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux8~304_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux8~304_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \Mux8~305_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \Mux8~305_I_pathsel\ : std_logic_vector(10 DOWNTO 0);