exp_cpu.vo

计算机体系结构试验

wire \G_INSTRU_FETCH|Add1~224 ;
wire \G_INSTRU_FETCH|pc~825 ;
wire \Mux13~304 ;
wire \Mux13~307 ;
wire \G_INSTRU_FETCH|Add1~225 ;
wire \G_INSTRU_FETCH|Add1~226 ;
wire \G_INSTRU_FETCH|pc_inc[2]~37 ;
wire \G_INSTRU_FETCH|pc_inc[3]~38 ;
wire \G_EXE|sjmp_addr[2]~37 ;
wire \G_EXE|sjmp_addr[3]~38 ;
wire \G_INSTRU_FETCH|pc~827 ;
wire \Mux12~304 ;
wire \Mux12~305 ;
wire \Mux12~306 ;
wire \Mux12~307 ;
wire \G_INSTRU_FETCH|pc_inc[3]~39 ;
wire \G_INSTRU_FETCH|pc_inc[3]~39COUT1_67 ;
wire \G_INSTRU_FETCH|pc_inc[4]~40 ;
wire \G_EXE|sjmp_addr[3]~39 ;
wire \G_EXE|sjmp_addr[3]~39COUT1_67 ;
wire \G_EXE|sjmp_addr[4]~40 ;
wire \G_INSTRU_FETCH|Add1~227 ;
wire \G_INSTRU_FETCH|Add1~227COUT1_254 ;
wire \G_INSTRU_FETCH|Add1~228 ;
wire \G_INSTRU_FETCH|pc~829 ;
wire \Mux11~134 ;
wire \Mux11~136 ;
wire \Mux11~137 ;
wire \Mux11~135 ;
wire \Mux11~138 ;
wire \Mux11~139 ;
wire \Mux11~140 ;
wire \Mux10~305 ;
wire \Mux10~306 ;
wire \G_INSTRU_FETCH|Add1~229 ;
wire \G_INSTRU_FETCH|Add1~229COUT1_255 ;
wire \G_INSTRU_FETCH|Add1~230 ;
wire \G_INSTRU_FETCH|pc_inc[4]~41 ;
wire \G_INSTRU_FETCH|pc_inc[4]~41COUT1_68 ;
wire \G_INSTRU_FETCH|pc_inc[5]~42 ;
wire \G_EXE|sjmp_addr[4]~41 ;
wire \G_EXE|sjmp_addr[4]~41COUT1_68 ;
wire \G_EXE|sjmp_addr[5]~42 ;
wire \G_INSTRU_FETCH|pc~831 ;
wire \Mux10~304 ;
wire \Mux10~307 ;
wire \Mux9~305 ;
wire \Mux9~306 ;
wire \G_INSTRU_FETCH|pc_inc[5]~43 ;
wire \G_INSTRU_FETCH|pc_inc[5]~43COUT1_69 ;
wire \G_INSTRU_FETCH|pc_inc[6]~44 ;
wire \G_EXE|sjmp_addr[5]~43 ;
wire \G_EXE|sjmp_addr[5]~43COUT1_69 ;
wire \G_EXE|sjmp_addr[6]~44 ;
wire \G_INSTRU_FETCH|Add1~231 ;
wire \G_INSTRU_FETCH|Add1~231COUT1_256 ;
wire \G_INSTRU_FETCH|Add1~232 ;
wire \G_INSTRU_FETCH|pc~833 ;
wire \Mux9~304 ;
wire \Mux9~307 ;
wire \G_INSTRU_FETCH|Add1~233 ;
wire \G_INSTRU_FETCH|Add1~233COUT1_257 ;
wire \G_INSTRU_FETCH|Add1~234 ;
wire \G_INSTRU_FETCH|pc_inc[6]~45 ;
wire \G_INSTRU_FETCH|pc_inc[6]~45COUT1_70 ;
wire \G_INSTRU_FETCH|pc_inc[7]~46 ;
wire \G_EXE|sjmp_addr[6]~45 ;
wire \G_EXE|sjmp_addr[6]~45COUT1_70 ;
wire \G_EXE|sjmp_addr[7]~46 ;
wire \G_INSTRU_FETCH|pc~835 ;
wire \Mux8~304 ;
wire \Mux8~305 ;
wire \Mux8~306 ;
wire \Mux8~307 ;
wire \G_INSTRU_FETCH|pc_inc[7]~47 ;
wire \G_INSTRU_FETCH|pc_inc[8]~48 ;
wire \G_EXE|sjmp_addr[7]~47 ;
wire \G_EXE|sjmp_addr[8]~48 ;
wire \G_INSTRU_FETCH|Add1~235 ;
wire \G_INSTRU_FETCH|Add1~236 ;
wire \G_INSTRU_FETCH|pc~837 ;
wire \Mux7~134 ;
wire \Mux7~135 ;
wire \Mux7~136 ;
wire \Mux7~137 ;
wire \Mux7~138 ;
wire \Mux7~139 ;
wire \Mux7~140 ;
wire \Mux6~305 ;
wire \Mux6~306 ;
wire \G_INSTRU_FETCH|Add1~237 ;
wire \G_INSTRU_FETCH|Add1~237COUT1_258 ;
wire \G_INSTRU_FETCH|Add1~238 ;
wire \G_INSTRU_FETCH|pc_inc[8]~49 ;
wire \G_INSTRU_FETCH|pc_inc[8]~49COUT1_71 ;
wire \G_INSTRU_FETCH|pc_inc[9]~50 ;
wire \G_EXE|sjmp_addr[8]~49 ;
wire \G_EXE|sjmp_addr[8]~49COUT1_71 ;
wire \G_EXE|sjmp_addr[9]~50 ;
wire \G_INSTRU_FETCH|pc~839 ;
wire \Mux6~304 ;
wire \Mux6~307 ;
wire \Mux5~305 ;
wire \Mux5~306 ;
wire \G_INSTRU_FETCH|pc_inc[9]~51 ;
wire \G_INSTRU_FETCH|pc_inc[9]~51COUT1_72 ;
wire \G_INSTRU_FETCH|pc_inc[10]~52 ;
wire \G_EXE|sjmp_addr[9]~51 ;
wire \G_EXE|sjmp_addr[9]~51COUT1_72 ;
wire \G_EXE|sjmp_addr[10]~52 ;
wire \G_INSTRU_FETCH|Add1~239 ;
wire \G_INSTRU_FETCH|Add1~239COUT1_259 ;
wire \G_INSTRU_FETCH|Add1~240 ;
wire \G_INSTRU_FETCH|pc~841 ;
wire \Mux5~304 ;
wire \Mux5~307 ;
wire \G_INSTRU_FETCH|pc_inc[10]~53 ;
wire \G_INSTRU_FETCH|pc_inc[10]~53COUT1_73 ;
wire \G_INSTRU_FETCH|pc_inc[11]~54 ;
wire \G_EXE|sjmp_addr[10]~53 ;
wire \G_EXE|sjmp_addr[10]~53COUT1_73 ;
wire \G_EXE|sjmp_addr[11]~54 ;
wire \G_INSTRU_FETCH|pc~843 ;
wire \G_INSTRU_FETCH|Add1~241 ;
wire \G_INSTRU_FETCH|Add1~241COUT1_260 ;
wire \G_INSTRU_FETCH|Add1~242 ;
wire \Mux4~304 ;
wire \Mux4~305 ;
wire \Mux4~306 ;
wire \Mux4~307 ;
wire \Mux3~333 ;
wire \Mux3~334 ;
wire \G_INSTRU_FETCH|pc_inc[11]~55 ;
wire \G_INSTRU_FETCH|pc_inc[11]~55COUT1_74 ;
wire \G_INSTRU_FETCH|pc_inc[12]~56 ;
wire \G_INSTRU_FETCH|Add1~243 ;
wire \G_INSTRU_FETCH|Add1~243COUT1_261 ;
wire \G_INSTRU_FETCH|Add1~244 ;
wire \G_INSTRU_FETCH|pc~845 ;
wire \G_EXE|sjmp_addr[11]~55 ;
wire \G_EXE|sjmp_addr[11]~55COUT1_74 ;
wire \G_EXE|sjmp_addr[12]~56 ;
wire \Mux3~332 ;
wire \Mux3~335 ;
wire \G_INSTRU_FETCH|pc_inc[12]~57 ;
wire \G_INSTRU_FETCH|pc_inc[13]~58 ;
wire \G_EXE|sjmp_addr[12]~57 ;
wire \G_EXE|sjmp_addr[13]~58 ;
wire \G_INSTRU_FETCH|pc~847 ;
wire \G_INSTRU_FETCH|Add1~245 ;
wire \G_INSTRU_FETCH|Add1~246 ;
wire \Mux2~304 ;
wire \Mux2~305 ;
wire \Mux2~306 ;
wire \Mux2~307 ;
wire \Mux1~305 ;
wire \Mux1~306 ;
wire \G_INSTRU_FETCH|pc_inc[13]~59 ;
wire \G_INSTRU_FETCH|pc_inc[13]~59COUT1_75 ;
wire \G_INSTRU_FETCH|pc_inc[14]~60 ;
wire \G_INSTRU_FETCH|Add1~247 ;
wire \G_INSTRU_FETCH|Add1~247COUT1_262 ;
wire \G_INSTRU_FETCH|Add1~248 ;
wire \G_INSTRU_FETCH|pc~849 ;
wire \G_EXE|sjmp_addr[13]~59 ;
wire \G_EXE|sjmp_addr[13]~59COUT1_75 ;
wire \G_EXE|sjmp_addr[14]~60 ;
wire \Mux1~304 ;
wire \Mux1~307 ;
wire \G_INSTRU_FETCH|Add1~249 ;
wire \G_INSTRU_FETCH|Add1~249COUT1_263 ;
wire \G_INSTRU_FETCH|Add1~250 ;
wire \G_INSTRU_FETCH|pc_inc[14]~61 ;
wire \G_INSTRU_FETCH|pc_inc[14]~61COUT1_76 ;
wire \G_INSTRU_FETCH|pc_inc[15]~62 ;
wire \G_EXE|sjmp_addr[14]~61 ;
wire \G_EXE|sjmp_addr[14]~61COUT1_76 ;
wire \G_EXE|sjmp_addr[15]~62 ;
wire \G_INSTRU_FETCH|pc~851 ;
wire \Mux0~339 ;
wire \Mux0~340 ;
wire \Mux0~341 ;
wire \Mux0~342 ;
wire \clk~combout ;
wire \G_MEMORY|rw~28 ;
wire \G_EXE|Mem_Addr[6]~202 ;
wire \G_EXE|Mem_Addr[6]~203 ;
wire \G_EXE|Mem_Addr[0]~204 ;
wire \G_EXE|Mem_Addr[0]~205 ;
wire \G_EXE|Mem_Addr[1]~206 ;
wire \G_EXE|Mem_Addr[1]~207 ;
wire \G_EXE|Mem_Addr[2]~208 ;
wire \G_EXE|Mem_Addr[2]~209 ;
wire \G_EXE|Mem_Addr[3]~210 ;
wire \G_EXE|Mem_Addr[3]~211 ;
wire \G_EXE|Mem_Addr[4]~212 ;
wire \G_EXE|Mem_Addr[4]~213 ;
wire \G_EXE|Mem_Addr[5]~214 ;
wire \G_EXE|Mem_Addr[5]~215 ;
wire \G_EXE|Mem_Addr[6]~216 ;
wire \G_EXE|Mem_Addr[6]~217 ;
wire \G_EXE|Mem_Addr[7]~218 ;
wire \G_EXE|Mem_Addr[7]~219 ;
wire \G_EXE|Mem_Addr[8]~220 ;
wire \G_EXE|Mem_Addr[8]~221 ;
wire \G_EXE|Mem_Addr[9]~222 ;
wire \G_EXE|Mem_Addr[9]~223 ;
wire \G_EXE|Mem_Addr[10]~224 ;
wire \G_EXE|Mem_Addr[10]~225 ;
wire \G_EXE|Mem_Addr[11]~226 ;
wire \G_EXE|Mem_Addr[11]~227 ;
wire \G_EXE|Mem_Addr[12]~228 ;
wire \G_EXE|Mem_Addr[12]~229 ;
wire \G_EXE|Mem_Addr[13]~230 ;
wire \G_EXE|Mem_Addr[13]~231 ;
wire \G_EXE|Mem_Addr[14]~232 ;
wire \G_EXE|Mem_Addr[14]~233 ;
wire \G_EXE|Mem_Addr[15]~234 ;
wire \G_EXE|Mem_Addr[15]~235 ;
wire \G_MEMORY|rw~29 ;
wire [15:0] \G_REGFILE|Areg00|q_output ;
wire [15:0] \G_MEMORY|data_read ;
wire [15:0] \G_INSTRU_FETCH|IR ;
wire [15:0] \G_INSTRU_FETCH|pc ;
wire [5:0] \reg_sel~combout ;
wire [15:0] \G_REGFILE|Areg03|q_output ;
wire [15:0] \G_REGFILE|Areg02|q_output ;
wire [15:0] \G_REGFILE|Areg01|q_output ;


// atom is at PIN_200
cyclone_io \OB[0]~I (
	.datain(\G_REGFILE|muxA|Mux15~28 ),
	.oe(\G_MEMORY|rw~29 ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\OB[0]~15 ),
	.regout(),
	.padio(OB[0]));
// synopsys translate_off
defparam \OB[0]~I .input_async_reset = "none";
defparam \OB[0]~I .input_power_up = "low";
defparam \OB[0]~I .input_register_mode = "none";
defparam \OB[0]~I .input_sync_reset = "none";
defparam \OB[0]~I .oe_async_reset = "none";
defparam \OB[0]~I .oe_power_up = "low";
defparam \OB[0]~I .oe_register_mode = "none";
defparam \OB[0]~I .oe_sync_reset = "none";
defparam \OB[0]~I .operation_mode = "bidir";
defparam \OB[0]~I .output_async_reset = "none";
defparam \OB[0]~I .output_power_up = "low";
defparam \OB[0]~I .output_register_mode = "none";
defparam \OB[0]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_201
cyclone_io \OB[1]~I (
	.datain(\G_REGFILE|muxA|Mux14~14 ),
	.oe(\G_MEMORY|rw~29 ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\OB[1]~14 ),
	.regout(),
	.padio(OB[1]));
// synopsys translate_off
defparam \OB[1]~I .input_async_reset = "none";
defparam \OB[1]~I .input_power_up = "low";
defparam \OB[1]~I .input_register_mode = "none";
defparam \OB[1]~I .input_sync_reset = "none";
defparam \OB[1]~I .oe_async_reset = "none";
defparam \OB[1]~I .oe_power_up = "low";
defparam \OB[1]~I .oe_register_mode = "none";
defparam \OB[1]~I .oe_sync_reset = "none";
defparam \OB[1]~I .operation_mode = "bidir";
defparam \OB[1]~I .output_async_reset = "none";
defparam \OB[1]~I .output_power_up = "low";
defparam \OB[1]~I .output_register_mode = "none";
defparam \OB[1]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_202
cyclone_io \OB[2]~I (
	.datain(\G_REGFILE|muxA|Mux13~21 ),
	.oe(\G_MEMORY|rw~29 ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\OB[2]~13 ),
	.regout(),
	.padio(OB[2]));
// synopsys translate_off
defparam \OB[2]~I .input_async_reset = "none";
defparam \OB[2]~I .input_power_up = "low";
defparam \OB[2]~I .input_register_mode = "none";
defparam \OB[2]~I .input_sync_reset = "none";
defparam \OB[2]~I .oe_async_reset = "none";
defparam \OB[2]~I .oe_power_up = "low";
defparam \OB[2]~I .oe_register_mode = "none";
defparam \OB[2]~I .oe_sync_reset = "none";
defparam \OB[2]~I .operation_mode = "bidir";
defparam \OB[2]~I .output_async_reset = "none";
defparam \OB[2]~I .output_power_up = "low";
defparam \OB[2]~I .output_register_mode = "none";
defparam \OB[2]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_203
cyclone_io \OB[3]~I (
	.datain(\G_REGFILE|muxA|Mux12~14 ),
	.oe(\G_MEMORY|rw~29 ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\OB[3]~12 ),
	.regout(),
	.padio(OB[3]));
// synopsys translate_off
defparam \OB[3]~I .input_async_reset = "none";
defparam \OB[3]~I .input_power_up = "low";
defparam \OB[3]~I .input_register_mode = "none";
defparam \OB[3]~I .input_sync_reset = "none";
defparam \OB[3]~I .oe_async_reset = "none";
defparam \OB[3]~I .oe_power_up = "low";
defparam \OB[3]~I .oe_register_mode = "none";
defparam \OB[3]~I .oe_sync_reset = "none";
defparam \OB[3]~I .operation_mode = "bidir";
defparam \OB[3]~I .output_async_reset = "none";
defparam \OB[3]~I .output_power_up = "low";
defparam \OB[3]~I .output_register_mode = "none";
defparam \OB[3]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_214
cyclone_io \OB[4]~I (
	.datain(\G_REGFILE|muxA|Mux11~21 ),
	.oe(\G_MEMORY|rw~29 ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\OB[4]~11 ),
	.regout(),
	.padio(OB[4]));
// synopsys translate_off
defparam \OB[4]~I .input_async_reset = "none";
defparam \OB[4]~I .input_power_up = "low";
defparam \OB[4]~I .input_register_mode = "none";
defparam \OB[4]~I .input_sync_reset = "none";
defparam \OB[4]~I .oe_async_reset = "none";
defparam \OB[4]~I .oe_power_up = "low";
defparam \OB[4]~I .oe_register_mode = "none";
defparam \OB[4]~I .oe_sync_reset = "none";
defparam \OB[4]~I .operation_mode = "bidir";
defparam \OB[4]~I .output_async_reset = "none";
defparam \OB[4]~I .output_power_up = "low";
defparam \OB[4]~I .output_register_mode = "none";
defparam \OB[4]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_215
cyclone_io \OB[5]~I (
	.datain(\G_REGFILE|muxA|Mux10~14 ),
	.oe(\G_MEMORY|rw~29 ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\OB[5]~10 ),
	.regout(),
	.padio(OB[5]));
// synopsys translate_off
defparam \OB[5]~I .input_async_reset = "none";
defparam \OB[5]~I .input_power_up = "low";
defparam \OB[5]~I .input_register_mode = "none";
defparam \OB[5]~I .input_sync_reset = "none";
defparam \OB[5]~I .oe_async_reset = "none";
defparam \OB[5]~I .oe_power_up = "low";
defparam \OB[5]~I .oe_register_mode = "none";
defparam \OB[5]~I .oe_sync_reset = "none";
defparam \OB[5]~I .operation_mode = "bidir";
defparam \OB[5]~I .output_async_reset = "none";
defparam \OB[5]~I .output_power_up = "low";
defparam \OB[5]~I .output_register_mode = "none";
defparam \OB[5]~I .output_sync_reset = "none";
// synopsys translate_on

// atom is at PIN_216
cyclone_io \OB[6]~I (
	.datain(\G_REGFILE|muxA|Mux9~21 ),
	.oe(\G_MEMORY|rw~29 ),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\OB[6]~9 ),
	.regout(),
	.padio(OB[6]));
// synopsys translate_off
defparam \OB[6]~I .input_async_reset = "none";
defparam \OB[6]~I .input_power_up = "low";