main.lst

AVR以太网开发板中的几个例子。文件中定义了网卡芯片的IP地址,默认值是192.168.0.99。

__start:
__text_start:
    0047 E800      LDI	R16,0x80
    0048 E011      LDI	R17,1
    0049 FF10      SBRS	R17,0
    004A 6400      ORI	R16,0x40
    004B BF05      OUT	0x35,R16
    004C EFCF      LDI	R28,0xFF
    004D E1D0      LDI	R29,0x10
    004E BFCD      OUT	0x3D,R28
    004F BFDE      OUT	0x3E,R29
    0050 51C0      SUBI	R28,0x10
    0051 40D0      SBCI	R29,0
    0052 EA0A      LDI	R16,0xAA
    0053 8308      STD	Y+0,R16
    0054 2400      CLR	R0
    0055 E0E1      LDI	R30,1
    0056 E1F1      LDI	R31,0x11
    0057 E111      LDI	R17,0x11
    0058 30ED      CPI	R30,0xD
    0059 07F1      CPC	R31,R17
    005A F011      BEQ	0x005D
    005B 9201      ST	R0,Z+
    005C CFFB      RJMP	0x0058
    005D 8300      STD	Z+0,R16
    005E E8EC      LDI	R30,0x8C
    005F E0F0      LDI	R31,0
    0060 E0A0      LDI	R26,0
    0061 E1B1      LDI	R27,0x11
    0062 E010      LDI	R17,0
    0063 38ED      CPI	R30,0x8D
    0064 07F1      CPC	R31,R17
    0065 F021      BEQ	0x006A
    0066 95C8      LPM
    0067 9631      ADIW	R30,1
    0068 920D      ST	R0,X+
    0069 CFF9      RJMP	0x0063
    006A 940E006D  CALL	_main
_exit:
    006C CFFF      RJMP	_exit
_main:
  rtl8019status        --> R20
  udptest2             --> R22
  udptest1             --> R20
    006D 9721      SBIW	R28,1
FILE: D:\hexok项目\AVRNET项目\AVRNET光盘\icc例子\main.c
(0001) //ICC-AVR application builder : 2002-1-1 7:57:28
(0002) // Target : M64
(0003) // Crystal: 12.000Mhz
(0004) #include "main.h"
(0005) #include "rtl8019as.h"
(0006) #include "arp.h"
(0007) #include "ip.h"
(0008) #include "icmp.h"
(0009) #include "udp.h"
(0010) 
(0011) 
(0012) extern unsigned int curr;//网卡RAM页指针
(0013) extern unsigned int curr_temp;
(0014) 
(0015) 
(0016) //////////////////////////////////////////////////////
(0017) //////////////////////////////////////////////////////
(0018) //////////////////////////////////////////////////////
(0019) 
(0020) unsigned char rtl_isr_status=0;
(0021) 
(0022) 
(0023) void main(void)
(0024) {
(0025)   unsigned char rtl8019status=0;
    006E 2744      CLR	R20
(0026)   unsigned char udptest1=0;
(0027)   unsigned char udptest2=0;
    006F 2766      CLR	R22
(0028)   
(0029)   key1_ok=0;
    0070 2422      CLR	R2
    0071 922001F0  STS	0x1F0,R2
(0030)   init_devices();
    0073 D0A4      RCALL	_init_devices
(0031)   LED1_ON;
    0074 B382      IN	R24,0x12
    0075 7E8F      ANDI	R24,0xEF
    0076 BB82      OUT	0x12,R24
(0032)   udp_init();
    0077 940E06E5  CALL	_udp_init
(0033)   curr=0x4d00;
    0079 E080      LDI	R24,0
    007A E49D      LDI	R25,0x4D
    007B 939001FF  STS	0x1FF,R25
    007D 938001FE  STS	0x1FE,R24
(0034)   curr_temp=0;
    007F 2422      CLR	R2
    0080 2433      CLR	R3
    0081 923001FD  STS	0x1FD,R3
    0083 922001FC  STS	0x1FC,R2
(0035)   delay_100ms();
    0085 D0A9      RCALL	_delay_100ms
(0036)   rtl8019_reset();
    0086 940E0185  CALL	_rtl8019_reset
(0037)   rtl8019_init();
    0088 940E01B8  CALL	_rtl8019_init
(0038)   rtl8019_writemynodeid();
    008A 940E01F8  CALL	_rtl8019_writemynodeid
(0039)   LED1_OFF;
    008C 9A94      SBI	0x12,4
    008D C05C      RJMP	0x00EA
(0040)      
(0041)   while(1)
(0042)   {
(0043)    WDR();
    008E 95A8      WDR
(0044)    uartsenddata();
    008F D0D9      RCALL	_uartsenddata
(0045)    
(0046)    if(key1_ok)
    0090 902001F0  LDS	R2,0x1F0
    0092 2022      TST	R2
    0093 F089      BEQ	0x00A5
(0047)    { 
(0048)     udpsendbuffer_ex[0]=udptest1;
    0094 93403100  STS	0x3100,R20
(0049) 	udpsendbuffer_ex[1]=udptest2;
    0096 93603101  STS	0x3101,R22
(0050)     send_ippack(44,0x0800,17);
    0098 E181      LDI	R24,0x11
    0099 8388      STD	Y+0,R24
    009A E020      LDI	R18,0
    009B E038      LDI	R19,0x8
    009C E20C      LDI	R16,0x2C
    009D E010      LDI	R17,0
    009E 940E03E9  CALL	_send_ippack
(0051) 	key1_ok=0;
    00A0 2422      CLR	R2
    00A1 922001F0  STS	0x1F0,R2
(0052) 	udptest1++;
    00A3 9543      INC	R20
(0053) 	udptest2+=2;
    00A4 5F6E      SUBI	R22,0xFE
(0054)    }
(0055)    
(0056)    //rtl_errchk();
(0057)    switch(rtl_isr_status&0x03)
    00A5 91801100  LDS	R24,rtl_isr_status
    00A7 2799      CLR	R25
    00A8 7083      ANDI	R24,3
    00A9 7090      ANDI	R25,0
    00AA 015C      MOVW	R10,R24
    00AB 3081      CPI	R24,1
    00AC E0E0      LDI	R30,0
    00AD 079E      CPC	R25,R30
    00AE F029      BEQ	0x00B4
    00AF 3082      CPI	R24,2
    00B0 E0E0      LDI	R30,0
    00B1 079E      CPC	R25,R30
    00B2 F191      BEQ	0x00E5
    00B3 C036      RJMP	0x00EA
(0058)    {//收发数据包事件处理
(0059)     case 0x01://接收到有效数据包
(0060) 	     //isr_ok=0;
(0061) 	     rtl8019_read(curr,1536);
    00B4 E020      LDI	R18,0
    00B5 E036      LDI	R19,6
    00B6 910001FE  LDS	R16,0x1FE
    00B8 911001FF  LDS	R17,0x1FF
    00BA 940E0267  CALL	_rtl8019_read
(0062) 		 rtl_packhandle();//数据包处理
    00BC 940E02F1  CALL	_rtl_packhandle
(0063) 		 curr_temp=curr;
    00BE 902001FE  LDS	R2,0x1FE
    00C0 903001FF  LDS	R3,0x1FF
    00C2 923001FD  STS	0x1FD,R3
    00C4 922001FC  STS	0x1FC,R2
(0064) 		 curr=rtl_readcurr();
    00C6 940E021E  CALL	_rtl_readcurr
    00C8 2E20      MOV	R2,R16
    00C9 2433      CLR	R3
    00CA 923001FF  STS	0x1FF,R3
    00CC 922001FE  STS	0x1FE,R2
(0065) 		 curr<<=8;
    00CE 2C32      MOV	R3,R2
    00CF 2422      CLR	R2
    00D0 923001FF  STS	0x1FF,R3
    00D2 922001FE  STS	0x1FE,R2
(0066) 	     if(curr<curr_temp){rtl_setcurr();}//如果接收缓冲满，则重置
    00D4 902001FC  LDS	R2,0x1FC
    00D6 903001FD  LDS	R3,0x1FD
    00D8 904001FE  LDS	R4,0x1FE
    00DA 905001FF  LDS	R5,0x1FF
    00DC 1442      CP	R4,R2
    00DD 0453      CPC	R5,R3
    00DE F410      BCC	0x00E1
    00DF 940E0223  CALL	_rtl_setcurr
(0067) 		 rtl_isr_status=0;
    00E1 2422      CLR	R2
    00E2 92201100  STS	rtl_isr_status,R2
(0068) 		 break;
    00E4 C005      RJMP	0x00EA
(0069) 	case 0x02://数据包已正确发送
(0070) 	     //isr_ok=0;
(0071) 		 rtl_setcurr();
    00E5 940E0223  CALL	_rtl_setcurr
(0072) 		 rtl_isr_status=0;
    00E7 2422      CLR	R2
    00E8 92201100  STS	rtl_isr_status,R2
    00EA CFA3      RJMP	0x008E
    00EB 9621      ADIW	R28,1
    00EC 9508      RET
(0073) 	     break;
(0074)    }
(0075)   }
(0076) }
(0077) 
(0078) 
(0079) #pragma interrupt_handler uart1_rx_isr:31
(0080) void uart1_rx_isr(void)
(0081) {
_uart1_rx_isr:
    00ED 9518      RETI
_int0_isr:
    00EE 940E084A  CALL	push_lset
(0082)  //uart has received a character in UDR
(0083) }
(0084) 
(0085) 
(0086) #pragma interrupt_handler int0_isr:2
(0087) void int0_isr(void)
(0088) {
(0089)  rtl_isr_status=rtl_isrstatus();
    00F0 940E0211  CALL	_rtl_isrstatus
    00F2 93001100  STS	rtl_isr_status,R16
    00F4 940E0861  CALL	pop_lset
    00F6 9518      RETI
_int1_isr:
    00F7 938A      ST	R24,-Y
    00F8 B78F      IN	R24,0x3F
    00F9 938A      ST	R24,-Y
(0090)  //isr_ok=1;
(0091) }
(0092) 
(0093) #pragma interrupt_handler int1_isr:3
(0094) void int1_isr(void)
(0095) {
(0096)  key1_ok=1;//external interupt on INT1
    00FA E081      LDI	R24,1
    00FB 938001F0  STS	0x1F0,R24
    00FD 9189      LD	R24,Y+
    00FE BF8F      OUT	0x3F,R24
    00FF 9189      LD	R24,Y+
    0100 9518      RETI
(0097) }
(0098) 
(0099) //////////////////////////////////////////////////////////////////
(0100) void port_init(void)
(0101) {
(0102)  PORTA = 0x00;
_port_init:
    0101 2422      CLR	R2
    0102 BA2B      OUT	0x1B,R2
(0103)  DDRA  = 0x00;
    0103 BA2A      OUT	0x1A,R2
(0104)  PORTB = 0x00;
    0104 BA28      OUT	0x18,R2
(0105)  DDRB  = 0x00;
    0105 BA27      OUT	0x17,R2
(0106)  PORTC = 0x00; //m103 output only
    0106 BA25      OUT	0x15,R2
(0107)  DDRC  = 0x00;
    0107 BA24      OUT	0x14,R2
(0108)  PORTD = 0x02;
    0108 E082      LDI	R24,2
    0109 BB82      OUT	0x12,R24
(0109)  DDRD  = 0x30;
    010A E380      LDI	R24,0x30
    010B BB81      OUT	0x11,R24
(0110)  PORTE = 0x00;
    010C B823      OUT	0x03,R2
(0111)  DDRE  = 0x00;
    010D B822      OUT	0x02,R2
(0112)  PORTF = 0x00;
    010E 92200062  STS	0x62,R2
(0113)  DDRF  = 0x00;
    0110 92200061  STS	0x61,R2
(0114)  PORTG = 0x00;
    0112 92200065  STS	0x65,R2
(0115)  DDRG  = 0x08;
    0114 E088      LDI	R24,0x8
    0115 93800064  STS	0x64,R24
    0117 9508      RET
(0116) }
(0117) 
(0118) //call this routine to initialize all peripherals
(0119) void init_devices(void)
(0120) {
(0121)  //stop errant interrupts until set up
(0122)  CLI(); //disable all interrupts
_init_devices:
    0118 94F8      BCLR	7
(0123)  XDIV  = 0x00; //xtal divider
    0119 2422      CLR	R2
    011A BE2C      OUT	0x3C,R2
(0124)  XMCRA = 0x04; //external memory
    011B E084      LDI	R24,4
    011C 9380006D  STS	0x6D,R24
(0125)  mapping_init();
    011E D065      RCALL	_mapping_init
(0126)  port_init();
    011F DFE1      RCALL	_port_init
(0127)  uart1_init();
    0120 D037      RCALL	_uart1_init
(0128)  
(0129)  MCUCR = 0x80;
    0121 E880      LDI	R24,0x80
    0122 BF85      OUT	0x35,R24
(0130)  EICRA = 0x0b; //extended ext ints
    0123 E08B      LDI	R24,0xB
    0124 9380006A  STS	0x6A,R24
(0131)  EICRB = 0x00; //extended ext ints
    0126 2422      CLR	R2
    0127 BE2A      OUT	0x3A,R2
(0132)  EIMSK = 0x03;
    0128 E083      LDI	R24,3
    0129 BF89      OUT	0x39,R24
(0133)  TIMSK = 0x00; //timer interrupt sources
    012A BE27      OUT	0x37,R2
(0134)  ETIMSK = 0x00; //extended timer interrupt sources
    012B 9220007D  STS	0x7D,R2
(0135)  SEI(); //re-enable interrupts
    012D 9478      BSET	7
    012E 9508      RET
(0136)  //all peripherals are now initialized
(0137) }
(0138) 
(0139) void delay_100ms(void)
(0140) {
(0141)  unsigned int i=0;
_delay_100ms:
  i                    --> R16
  k                    --> R18
    012F 2700      CLR	R16
    0130 2711      CLR	R17
(0142)  unsigned int k=0;
    0131 2722      CLR	R18
    0132 2733      CLR	R19
(0143)  for(;i<1000;i++)
    0133 C00C      RJMP	0x0140
(0144)  {
(0145)   for(k=0;k<100;k++)
    0134 2722      CLR	R18
    0135 2733      CLR	R19
    0136 C003      RJMP	0x013A
(0146)   {
(0147)    WDR();
    0137 95A8      WDR
    0138 5F2F      SUBI	R18,0xFF
    0139 4F3F      SBCI	R19,0xFF
    013A 3624      CPI	R18,0x64
    013B E0E0      LDI	R30,0
    013C 073E      CPC	R19,R30
    013D F3C8      BCS	0x0137
    013E 5F0F      SUBI	R16,0xFF
    013F 4F1F      SBCI	R17,0xFF
    0140 3E08      CPI	R16,0xE8
    0141 E0E3      LDI	R30,3
    0142 071E      CPC	R17,R30
    0143 F380      BCS	0x0134
    0144 9508      RET
(0148)   }
(0149)  }
(0150) }
(0151) 
(0152) 
(0153) void rtl_errchk(void)
(0154) {
(0155)    if(rtl_isrstatus()&0x04) //异常状态监视
_rtl_errchk:
    0145 940E0211  CALL	_rtl_isrstatus
    0147 FF02      SBRS	R16,2
    0148 C00E      RJMP	0x0157
(0156)    { 
(0157)       if(rtl_isrstatus()&0x04)
    0149 940E0211  CALL	_rtl_isrstatus
    014B FF02      SBRS	R16,2
    014C C00A      RJMP	0x0157
(0158) 	  {   
(0159) 	   rtl8019_hotreset();   //网卡芯片热复位
    014D 940E01A1  CALL	_rtl8019_hotreset
(0160) 	   rtl8019_init();       //重新初始化
    014F 940E01B8  CALL	_rtl8019_init
(0161) 	   curr_temp=0x0000;
    0151 2422      CLR	R2
    0152 2433      CLR	R3
    0153 923001FD  STS	0x1FD,R3
    0155 922001FC  STS	0x1FC,R2
(0162)       }
(0163)    }
    0157 9508      RET
(0164) }
(0165) 
(0166) 
(0167) //UART1 initialize
(0168) // desired baud rate:19200
(0169) // actual baud rate:19200 (0.0%)
(0170) void uart1_init(void)
(0171) {
(0172)  UCSR1B = 0x00; //disable while setting baud rate
_uart1_init:
    0158 2422      CLR	R2
    0159 9220009A  STS	0x9A,R2
(0173)  UCSR1A = 0x00;
    015B 9220009B  STS	0x9B,R2
(0174)  UCSR1C = 0x06;
    015D E086      LDI	R24,6
    015E 9380009D  STS	0x9D,R24
(0175)  UBRR1L = 0x26; //set baud rate lo
    0160 E286      LDI	R24,0x26
    0161 93800099  STS	0x99,R24
(0176)  UBRR1H = 0x00; //set baud rate hi
    0163 92200098  STS	0x98,R2
(0177)  UCSR1B = 0x98;
    0165 E988      LDI	R24,0x98
    0166 9380009A  STS	0x9A,R24
    0168 9508      RET
_uartsenddata:
  udpdata              --> R20
    0169 940E0833  CALL	push_gset1