📄 ax88796.lis
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040E 02E0 ldi R16,2
0410 0E940000 xcall _delay_ms
0414 .dbline 408
0414 ; // clear remote byte count registers
0414 ; ax88796Write(RBCR0, 0x00);
0414 2227 clr R18
0416 0AE0 ldi R16,10
0418 F3DD xcall _ax88796Write
041A .dbline 409
041A ; ax88796Write(RBCR1, 0x00);
041A 2227 clr R18
041C 0BE0 ldi R16,11
041E F0DD xcall _ax88796Write
0420 .dbline 411
0420 ;
0420 ; if(!(cmdReg & TXP))
0420 62FD sbrc R22,2
0422 02C0 rjmp L78
0424 .dbline 412
0424 ; {
0424 .dbline 413
0424 ; resend = 0;
0424 4427 clr R20
0426 .dbline 414
0426 ; }
0426 0AC0 xjmp L79
0428 L78:
0428 .dbline 416
0428 ; else
0428 ; {
0428 .dbline 417
0428 ; cmdReg = ax88796Read(ISR);
0428 07E0 ldi R16,7
042A F8DD xcall _ax88796Read
042C 602F mov R22,R16
042E .dbline 418
042E ; if((cmdReg & PTX) || (cmdReg & TXE))
042E 01FD sbrc R16,1
0430 02C0 rjmp L82
0432 02FF sbrs R16,2
0434 02C0 rjmp L80
0436 L82:
0436 .dbline 419
0436 ; resend = 0;
0436 4427 clr R20
0438 01C0 xjmp L81
043A L80:
043A .dbline 421
043A ; else
043A ; resend = 1;
043A 41E0 ldi R20,1
043C L81:
043C .dbline 422
043C ; }
043C L79:
043C .dbline 424
043C 22E0 ldi R18,2
043E 0DE0 ldi R16,13
0440 DFDD xcall _ax88796Write
0442 .dbline 426
0442 22E2 ldi R18,34
0444 0027 clr R16
0446 DCDD xcall _ax88796Write
0448 .dbline 428
0448 26E4 ldi R18,70
044A 03E0 ldi R16,3
044C D9DD xcall _ax88796Write
044E .dbline 430
044E 22E6 ldi R18,98
0450 0027 clr R16
0452 D6DD xcall _ax88796Write
0454 .dbline 432
0454 27E4 ldi R18,71
0456 07E0 ldi R16,7
0458 D3DD xcall _ax88796Write
045A .dbline 434
045A 22E2 ldi R18,34
045C 0027 clr R16
045E D0DD xcall _ax88796Write
0460 .dbline 436
0460 20E1 ldi R18,16
0462 07E0 ldi R16,7
0464 CDDD xcall _ax88796Write
0466 .dbline 438
0466 2227 clr R18
0468 0DE0 ldi R16,13
046A CADD xcall _ax88796Write
046C .dbline 440
046C 4423 tst R20
046E 19F0 breq L83
0470 .dbline 441
0470 26E2 ldi R18,38
0472 0027 clr R16
0474 C5DD xcall _ax88796Write
0476 L83:
0476 .dbline -2
0476 L77:
0476 0E940000 xcall pop_gset2
047A .dbline 0 ; func end
047A 0895 ret
047C .dbsym r resend 20 c
047C .dbsym r cmdReg 22 c
047C .dbend
047C .dbfunc e ax88796WriteMii _ax88796WriteMii fV
047C ; mask16 -> R20,R21
047C ; mask8 -> R22
047C ; i -> R10,R11
047C ; mii_data -> R12,R13
047C ; regad -> R14
047C ; phyad -> y+10
.even
047C _ax88796WriteMii::
047C 0E940000 xcall push_arg4
0480 0E940000 xcall push_gset5
0484 E22E mov R14,R18
0486 CE84 ldd R12,y+14
0488 DF84 ldd R13,y+15
048A .dbline -1
048A .dbline 484
048A ; // switch to loopback mode
048A ; ax88796Write(TCR, LB0);
048A ; // start the interface
048A ; ax88796Write(CR, (RD2|START));
048A ; // set boundary
048A ; ax88796Write(BNRY, RXSTART_INIT);
048A ; // go to page 1
048A ; ax88796Write(CR, (PS0|RD2|START));
048A ; // set current page register
048A ; ax88796Write(CURR, RXSTART_INIT+1);
048A ; // go to page 0
048A ; ax88796Write(CR, (RD2|START));
048A ; // clear the overflow int
048A ; ax88796Write(ISR, OVW);
048A ; // switch to normal (non-loopback mode)
048A ; ax88796Write(TCR, TCR_INIT);
048A ;
048A ; if(resend)
048A ; ax88796Write(CR, (RD2|TXP|START));
048A ;
048A ; //ax88796Write(ISR, 0xFF);
048A ; }
048A ;
048A ; #define set_mdc ax88796Write(MEMR,ax88796Read(MEMR)|0x01);
048A ; #define clr_mdc ax88796Write(MEMR,ax88796Read(MEMR)&0xFE);
048A ;
048A ; #define mii_clk set_mdc; clr_mdc;
048A ;
048A ; #define set_mdir ax88796Write(MEMR,ax88796Read(MEMR)|0x02);
048A ; #define clr_mdir ax88796Write(MEMR,ax88796Read(MEMR)&0xFD);
048A ;
048A ; #define set_mdo ax88796Write(MEMR,ax88796Read(MEMR)|0x08)
048A ; #define clr_mdo ax88796Write(MEMR,ax88796Read(MEMR)&0xF7)
048A ;
048A ; #define mii_write clr_mdo; \
048A ; mii_clk; \
048A ; set_mdo; \
048A ; mii_clk; \
048A ; clr_mdo; \
048A ; mii_clk; \
048A ; set_mdo; \
048A ; mii_clk;
048A ;
048A ; #define mii_read clr_mdo; \
048A ; mii_clk; \
048A ; set_mdo; \
048A ; mii_clk; \
048A ; set_mdo; \
048A ; mii_clk; \
048A ; clr_mdo; \
048A ; mii_clk;
048A ;
048A ; #define mii_r_ta mii_clk; \
048A ;
048A ;
048A ; #define mii_w_ta set_mdo; \
048A ; mii_clk; \
048A ; clr_mdo; \
048A ; mii_clk;
048A ;
048A ; void ax88796WriteMii(unsigned char phyad,unsigned char regad,unsigned int mii_data)
048A ; {
048A .dbline 488
048A ; unsigned char mask8;
048A ; unsigned int i,mask16;
048A ;
048A ; mii_write;
048A 04E1 ldi R16,20
048C C7DD xcall _ax88796Read
048E 202F mov R18,R16
0490 277F andi R18,247
0492 04E1 ldi R16,20
0494 B5DD xcall _ax88796Write
0496 .dbline 488
0496 04E1 ldi R16,20
0498 C1DD xcall _ax88796Read
049A 202F mov R18,R16
049C 2160 ori R18,1
049E 04E1 ldi R16,20
04A0 AFDD xcall _ax88796Write
04A2 .dbline 488
04A2 .dbline 488
04A2 04E1 ldi R16,20
04A4 BBDD xcall _ax88796Read
04A6 202F mov R18,R16
04A8 2E7F andi R18,254
04AA 04E1 ldi R16,20
04AC A9DD xcall _ax88796Write
04AE .dbline 488
04AE .dbline 488
04AE .dbline 488
04AE 04E1 ldi R16,20
04B0 B5DD xcall _ax88796Read
04B2 202F mov R18,R16
04B4 2860 ori R18,8
04B6 04E1 ldi R16,20
04B8 A3DD xcall _ax88796Write
04BA .dbline 488
04BA 04E1 ldi R16,20
04BC AFDD xcall _ax88796Read
04BE 202F mov R18,R16
04C0 2160 ori R18,1
04C2 04E1 ldi R16,20
04C4 9DDD xcall _ax88796Write
04C6 .dbline 488
04C6 .dbline 488
04C6 04E1 ldi R16,20
04C8 A9DD xcall _ax88796Read
04CA 202F mov R18,R16
04CC 2E7F andi R18,254
04CE 04E1 ldi R16,20
04D0 97DD xcall _ax88796Write
04D2 .dbline 488
04D2 .dbline 488
04D2 .dbline 488
04D2 04E1 ldi R16,20
04D4 A3DD xcall _ax88796Read
04D6 202F mov R18,R16
04D8 277F andi R18,247
04DA 04E1 ldi R16,20
04DC 91DD xcall _ax88796Write
04DE .dbline 488
04DE 04E1 ldi R16,20
04E0 9DDD xcall _ax88796Read
04E2 202F mov R18,R16
04E4 2160 ori R18,1
04E6 04E1 ldi R16,20
04E8 8BDD xcall _ax88796Write
04EA .dbline 488
04EA .dbline 488
04EA 04E1 ldi R16,20
04EC 97DD xcall _ax88796Read
04EE 202F mov R18,R16
04F0 2E7F andi R18,254
04F2 04E1 ldi R16,20
04F4 85DD xcall _ax88796Write
04F6 .dbline 488
04F6 .dbline 488
04F6 .dbline 488
04F6 04E1 ldi R16,20
04F8 91DD xcall _ax88796Read
04FA 202F mov R18,R16
04FC 2860 ori R18,8
04FE 04E1 ldi R16,20
0500 7FDD xcall _ax88796Write
0502 .dbline 488
0502 04E1 ldi R16,20
0504 8BDD xcall _ax88796Read
0506 202F mov R18,R16
0508 2160 ori R18,1
050A 04E1 ldi R16,20
050C 79DD xcall _ax88796Write
050E .dbline 488
050E .dbline 488
050E 04E1 ldi R16,20
0510 85DD xcall _ax88796Read
0512 202F mov R18,R16
0514 2E7F andi R18,254
0516 04E1 ldi R16,20
0518 73DD xcall _ax88796Write
051A .dbline 488
051A .dbline 488
051A .dbline 488
051A .dbline 490
051A ;
051A ; mask8 = 0x10;
051A 60E1 ldi R22,16
051C .dbline 491
051C ; for(i=0;i<5;++i)
051C AA24 clr R10
051E BB24 clr R11
0520 21C0 xjmp L89
0522 L86:
0522 .dbline 492
0522 ; {
0522 .dbline 493
0522 ; if(mask8 & phyad)
0522 262E mov R2,R22
0524 0A84 ldd R0,y+10
0526 2020 and R2,R0
0528 39F0 breq L90
052A .dbline 494
052A ; set_mdo;
052A 04E1 ldi R16,20
052C 77DD xcall _ax88796Read
052E 202F mov R18,R16
0530 2860 ori R18,8
0532 04E1 ldi R16,20
0534 65DD xcall _ax88796Write
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