📄 uipavr.lst
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150C 0FE8 ADD R30,R24
150D 1FF9 ADC R31,R25
150E 2422 CLR R2
150F 2433 CLR R3
1510 8231 STD Z+1,R3
1511 8220 STD Z+0,R2
1512 01C5 MOVW R24,R10
1513 9601 ADIW R24,1
1514 015C MOVW R10,R24
1515 01C5 MOVW R24,R10
1516 3084 CPI R24,4
1517 E0E0 LDI R30,0
1518 079E CPC R25,R30
1519 F350 BCS 0x1504
151A 940E2E5A CALL pop_gset3x
151C 9508 RET
_fs_count:
i --> R10
f --> R12
name --> R14
151D 940E2E73 CALL push_gset5x
151F 0178 MOVW R14,R16
(0132) }
(0133) #endif /* FS_STATISTICS */
(0134) #endif /* FS_STATISTICS */
(0135) }
(0136) /*-----------------------------------------------------------------------------------*/
(0137) #ifdef FS_STATISTICS
(0138) #if FS_STATISTICS == 1
(0139) u16_t fs_count
(0140) (char *name)
(0141) {
(0142) struct fsdata_file_noconst *f;
(0143)
(0144) u16_t i;
(0145)
(0146) i = 0;
1520 24AA CLR R10
1521 24BB CLR R11
(0147) for(f =(struct fsdata_file_noconst *)FS_ROOT;
1522 EA8D LDI R24,0xAD
1523 E298 LDI R25,0x28
1524 016C MOVW R12,R24
1525 C01A RJMP 0x1540
(0148) f != NULL;
(0149) f = (struct fsdata_file_noconst *)f->next) {
(0150)
(0151) if(fs_strcmp(name, f->name) == 0) {
1526 01F6 MOVW R30,R12
1527 8122 LDD R18,Z+2
1528 8133 LDD R19,Z+3
1529 0187 MOVW R16,R14
152A DF61 RCALL _fs_strcmp
152B 2300 TST R16
152C F469 BNE 0x153A
(0152) return count[i];
152D E002 LDI R16,2
152E E010 LDI R17,0
152F 0195 MOVW R18,R10
1530 940E2E4A CALL empy16s
1532 01F8 MOVW R30,R16
1533 E080 LDI R24,0
1534 E29A LDI R25,0x2A
1535 0FE8 ADD R30,R24
1536 1FF9 ADC R31,R25
1537 8100 LDD R16,Z+0
1538 8111 LDD R17,Z+1
1539 C00C RJMP 0x1546
(0153) }
(0154) ++i;
153A 01C5 MOVW R24,R10
153B 9601 ADIW R24,1
153C 015C MOVW R10,R24
153D 01F6 MOVW R30,R12
153E 80C0 LDD R12,Z+0
153F 80D1 LDD R13,Z+1
1540 20CC TST R12
1541 F721 BNE 0x1526
1542 20DD TST R13
1543 F711 BNE 0x1526
(0155) }
(0156) return 0;
1544 2700 CLR R16
1545 2711 CLR R17
1546 940E2E69 CALL pop_gset5x
1548 9508 RET
FILE: D:\hexok项目\AVRNET项目\AVRNET光盘\AVRuIP\rtl8019.c
(0001) #include "rtl8019.h"
(0002)
(0003) /*****************************************************************************
(0004) * Module Name: Realtek 8019AS Driver
(0005) *
(0006) * Created By: Louis Beaudoin (www.embedded-creations.com)
(0007) *
(0008) * Original Release: September 21, 2002
(0009) *
(0010) * Module Description:
(0011) * Provides functions to initialize the Realtek 8019AS, and send and retreive
(0012) * packets
(0013) *
(0014) * November 16, 2003 - Louis Beaudoin
(0015) * The rtl8019Write and Read functions/macros were changed to support
(0016) * three methods of communcating with the NIC
(0017) * Interfacing with the AVR ports changed from sbi/cbi/etc functions
(0018) * to direct port names
(0019) * Renamed functions to be more consistant with the two NIC drivers
(0020) * Overrun function now retransmits if resend is set (thanks Krzysztof)
(0021) *
(0022) * November 15, 2002 - Louis Beaudoin
(0023) * processRTL8019Interrupt() - bit mask mistake fixed
(0024) *
(0025) * November 8, 2003 - Louis Beaudoin
(0026) * Changed delay library function calls
(0027) *
(0028) * September 30, 2002 - Louis Beaudoin
(0029) * Receive functions modified to handle errors encountered when receiving a
(0030) * fast data stream. Functions now manually retreive data instead of
(0031) * using the send packet command. Interface improved by checking for
(0032) * overruns and data in the buffer internally.
(0033) * Corrected the overrun function - overrun flag was not reset after overrun
(0034) * Added support for the Imagecraft Compiler
(0035) * Added support to communicate with the NIC using general I/O ports
(0036) *
(0037) *****************************************************************************/
(0038)
(0039)
(0040) /*****************************************************************************
(0041) * rtl8019Write( RTL_ADDRESS, RTL_DATA )
(0042) * Args: 1. unsigned char RTL_ADDRESS - register offset of RTL register
(0043) * 2. unsigned char RTL_DATA - data to write to register
(0044) * Created By: Louis Beaudoin
(0045) * Date: September 21, 2002
(0046) * Description: Writes byte to RTL8019 register.
(0047) *
(0048) * Notes - If using the External SRAM Interface, performs a write to
(0049) * address MEMORY_MAPPED_RTL8019_OFFSET + (RTL_ADDRESS<<8)
(0050) * The address is sent in the non-multiplxed upper address port so
(0051) * no latch is required.
(0052) *
(0053) * If using general I/O ports, the data port is left in the input
(0054) * state with pullups enabled
(0055) *
(0056) *****************************************************************************/
(0057) #if NIC_CONNECTION == MEMORY_MAPPED_HIGHADDR
(0058) #define rtl8019Write(RTL_ADDRESS,RTL_DATA) do{ *(volatile unsigned char *) \
(0059) (MEMORY_MAPPED_RTL8019_OFFSET \
(0060) + (((unsigned char)(RTL_ADDRESS)) << 8)) = \
(0061) (unsigned char)(RTL_DATA); } while(0)
(0062)
(0063) #endif
(0064)
(0065) #if NIC_CONNECTION == MEMORY_MAPPED
(0066) #define rtl8019Write(RTL_ADDRESS,RTL_DATA) do{ *(volatile unsigned char *) \
(0067) (MEMORY_MAPPED_RTL8019_OFFSET \
(0068) + (unsigned char)(RTL_ADDRESS)) = \
(0069) (unsigned char)(RTL_DATA); } while(0)
(0070)
(0071) #endif
(0072)
(0073) #if NIC_CONNECTION == GENERAL_IO
(0074)
(0075) void rtl8019Write(unsigned char address, unsigned char data)
(0076) {
(0077) // assert the address, leaving the non-address pins intact
(0078) address |= (RTL8019_ADDRESS_PORT & ~RTL8019_ADDRESS_MASK);
(0079) RTL8019_ADDRESS_PORT = address;
(0080)
(0081) // set data bus as output and place data on bus
(0082) RTL8019_DATA_DDR = 0xFF;
(0083) RTL8019_DATA_PORT = data;
(0084)
(0085) // toggle write pin
(0086) RTL8019_CONTROL_PORT &= ~_BV(RTL8019_CONTROL_WRITEPIN);
(0087) nop();
(0088) RTL8019_CONTROL_PORT |= _BV(RTL8019_CONTROL_WRITEPIN);
(0089)
(0090)
(0091) // set data port back to input with pullups enabled
(0092) RTL8019_DATA_DDR = 0x00;
(0093) RTL8019_DATA_PORT = 0xFF;
(0094) }
(0095)
(0096) #endif
(0097)
(0098) /*****************************************************************************
(0099) * rtl8019Read(RTL_ADDRESS)
(0100) * Args: unsigned char RTL_ADDRESS - register offset of RTL register
(0101) * Created By: Louis Beaudoin
(0102) * Date: September 21, 2002
(0103) * Description: Reads byte from RTL8019 register
(0104) *
(0105) * Notes - If using the External SRAM Interface, performs a read from
(0106) * address MEMORY_MAPPED_RTL8019_OFFSET + (RTL_ADDRESS<<8)
(0107) * The address is sent in the non-multiplxed upper address port so
(0108) * no latch is required.
(0109) *
(0110) * If using general I/O ports, the data port is assumed to already be
(0111) * an input, and is left as an input port when done
(0112) *
(0113) *****************************************************************************/
(0114) #if NIC_CONNECTION == MEMORY_MAPPED_HIGHADDR
(0115) #define rtl8019Read(RTL_ADDRESS) (*(volatile unsigned char *) \
(0116) (MEMORY_MAPPED_RTL8019_OFFSET \
(0117) + (((unsigned char)(RTL_ADDRESS)) << 8)) )
(0118) #endif
(0119)
(0120) #if NIC_CONNECTION == MEMORY_MAPPED
(0121)
(0122) #define rtl8019Read(RTL_ADDRESS) (*(volatile unsigned char *) \
(0123) (MEMORY_MAPPED_RTL8019_OFFSET \
(0124) + (unsigned char)(RTL_ADDRESS)) )
(0125) #endif
(0126)
(0127) #if NIC_CONNECTION == GENERAL_IO
(0128)
(0129) unsigned char rtl8019Read(unsigned char address)
(0130) {
(0131) unsigned char byte;
(0132)
(0133) // assert the address, leaving the non-address pins intact
(0134) address |= (RTL8019_ADDRESS_PORT & ~RTL8019_ADDRESS_MASK);
(0135) RTL8019_ADDRESS_PORT = address;
(0136)
(0137) // assert read
(0138) RTL8019_CONTROL_PORT &= ~_BV(RTL8019_CONTROL_READPIN);
(0139) nop();
(0140)
(0141) // read in the data
(0142) byte = RTL8019_DATA_PIN;
(0143)
(0144) // negate read
(0145) RTL8019_CONTROL_PORT |= _BV(RTL8019_CONTROL_READPIN);
(0146)
(0147) return byte;
(0148) }
(0149)
(0150) #endif
(0151)
(0152)
(0153)
(0154) /*****************************************************************************
(0155) * rtl8019SetupPorts(void);
(0156) *
(0157) * Created By: Louis Beaudoin
(0158) * Date: September 21, 2002
(0159) * Description: Sets up the ports used for communication with the RTL8019 NIC
(0160) * (data bus, address bus, read, write, and reset)
(0161) *****************************************************************************/
(0162) void rtl8019SetupPorts(void)
(0163) {
(0164)
(0165) #if NIC_CONNECTION == GENERAL_IO
(0166)
(0167) // make the address port output
(0168) RTL8019_ADDRESS_DDR = RTL8019_ADDRESS_MASK;
(0169)
(0170) // make the data port input with pull-ups
(0171) RTL8019_DATA_PORT = 0xFF;
(0172)
(0173) // make the control port read and write pins outputs and asserted
(0174) RTL8019_CONTROL_DDR |= _BV(RTL8019_CONTROL_READPIN);
(0175) RTL8019_CONTROL_DDR |= _BV(RTL8019_CONTROL_WRITEPIN);
(0176)
(0177) RTL8019_CONTROL_PORT |= _BV(RTL8019_CONTROL_READPIN);
(0178) RTL8019_CONTROL_PORT |= _BV(RTL8019_CONTROL_WRITEPIN);
(0179)
(0180) #else
(0181)
(0182) // enable external SRAM interface - no wait states
(0183) MCUCR |= _BV(SRE);
_rtl8019SetupPorts:
1549 B785 IN R24,0x35
154A 6880 ORI R24,0x80
154B BF85 OUT 0x35,R24
(0184)
(0185) #endif
(0186)
(0187) // enable output pin for Resetting the RTL8019
(0188) RTL8019_RESET_DDR |= _BV(RTL8019_RESET_PIN);
154C 91800064 LDS R24,0x64
154E 6088 ORI R24,0x8
154F 93800064 STS 0x64,R24
1551 9508 RET
_rtl8019BeginPacketSend:
sendPacketLength --> R10
packetLength --> R16
1552 940E2E6F CALL push_gset4x
(0189) }
(0190)
(0191)
(0192)
(0193) /*****************************************************************************
(0194) * HARD_RESET_RTL8019()
(0195) *
(0196) * Created By: Louis Beaudoin
(0197) * Date: September 21, 2002
(0198) * Description: Simply toggles the pin that resets the NIC
(0199) *****************************************************************************/
(0200) #define HARD_RESET_RTL8019() do{ RTL8019_RESET_PORT |= _BV(RTL8019_RESET_PIN);\
(0201) delay_ms(10); \
(0202) RTL8019_RESET_PORT &= ~_BV(RTL8019_RESET_PIN);}\
(0203) while(0)
(0204)
(0205)
(0206)
(0207) /*****************************************************************************
(0208) * rtl8019Overrun(void);
(0209) *
(0210) * Created By: Louis Beaudoin
(0211) * Date: September 21, 2002
(0212) * Description: "Canned" receive buffer overrun function originally from
(0213) * a National Semiconductor appnote
(0214) * Notes: This function must be called before retreiving packets from
(0215) * the NIC if there is a buffer overrun
(0216) *****************************************************************************/
(0217) void rtl8019Overrun(void);
(0218)
(0219)
(0220)
(0221)
(0222) //******************************************************************
(0223) //* REALTEK CONTROL REGISTER OFFSETS
(0224) //* All offsets in Page 0 unless otherwise specified
(0225) //* All functions accessing CR must leave CR in page 0 upon exit
(0226) //******************************************************************
(0227) #define CR 0x00
(0228) #define PSTART 0x01
(0229) #define PAR0 0x01 // Page 1
(0230) #define CR9346 0x01 // Page 3
(0231) #define PSTOP 0x02
(0232) #define BNRY 0x03
(0233) #define TSR 0x04
(0234) #define TPSR 0x04
(0235) #define TBCR0 0x05
(0236) #define NCR 0x05
(0237) #define TBCR1 0x06
(0238) #define ISR 0x07
(0239) #define CURR 0x07 // Page 1
(0240) #define RSAR0 0x08
(0241) #define CRDA0 0x08
(0242) #define RSAR1 0x09
(0243) #define CRDA1 0x09
(0244) #define RBCR0 0x0A
(0245) #define RBCR1 0x0B
(0246) #define RSR 0x0C
(0247) #define RCR 0x0C
(0248) #define TCR 0x0D
(0249) #define CNTR0 0x0D
(0250) #define DCR 0x0E
(0251) #define CNTR1 0x0E
(0252) #define IMR 0x0F
(0253) #define CNTR2 0x0F
(0254) #define RDMAPORT 0x10
(0255) #define RSTPORT 0x18
(0256) #define CONFIG2 0x05 // page 3
(0257) #define CONFIG3 0x06 // page 3
(0258) #define RTL_EECR 0x01 // page 3
(0259)
(0260)
(0261)
(0262) /*****************************************************************************
(0263) *
(0264) * RTL ISR Register Bits
(0265) *
(0266) *****************************************************************************/
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