phy.c

linux内核源码

/*

  Broadcom B43legacy wireless driver

  Copyright (c) 2005 Martin Langer <[e-mail]>,
		     Stefano Brivio <[e-mail]>
		     Michael Buesch <[e-mail]>
		     Danny van Dyk <[e-mail]>
     Andreas Jaggi <[e-mail]>
  Copyright (c) 2007 Larry Finger <[e-mail]>

  Some parts of the code in this file are derived from the ipw2200
  driver  Copyright(c) 2003 - 2004 Intel Corporation.

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation; either version 2 of the License, or
  (at your option) any later version.

  This program is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with this program; see the file COPYING.  If not, write to
  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  Boston, MA 02110-1301, USA.

*/

#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/types.h>

#include "b43legacy.h"
#include "phy.h"
#include "main.h"
#include "radio.h"
#include "ilt.h"


static const s8 b43legacy_tssi2dbm_b_table[] = {
	0x4D, 0x4C, 0x4B, 0x4A,
	0x4A, 0x49, 0x48, 0x47,
	0x47, 0x46, 0x45, 0x45,
	0x44, 0x43, 0x42, 0x42,
	0x41, 0x40, 0x3F, 0x3E,
	0x3D, 0x3C, 0x3B, 0x3A,
	0x39, 0x38, 0x37, 0x36,
	0x35, 0x34, 0x32, 0x31,
	0x30, 0x2F, 0x2D, 0x2C,
	0x2B, 0x29, 0x28, 0x26,
	0x25, 0x23, 0x21, 0x1F,
	0x1D, 0x1A, 0x17, 0x14,
	0x10, 0x0C, 0x06, 0x00,
	  -7,   -7,   -7,   -7,
	  -7,   -7,   -7,   -7,
	  -7,   -7,   -7,   -7,
};

static const s8 b43legacy_tssi2dbm_g_table[] = {
	 77,  77,  77,  76,
	 76,  76,  75,  75,
	 74,  74,  73,  73,
	 73,  72,  72,  71,
	 71,  70,  70,  69,
	 68,  68,  67,  67,
	 66,  65,  65,  64,
	 63,  63,  62,  61,
	 60,  59,  58,  57,
	 56,  55,  54,  53,
	 52,  50,  49,  47,
	 45,  43,  40,  37,
	 33,  28,  22,  14,
	  5,  -7, -20, -20,
	-20, -20, -20, -20,
	-20, -20, -20, -20,
};

static void b43legacy_phy_initg(struct b43legacy_wldev *dev);


static inline
void b43legacy_voluntary_preempt(void)
{
	B43legacy_BUG_ON(!(!in_atomic() && !in_irq() &&
			  !in_interrupt() && !irqs_disabled()));
#ifndef CONFIG_PREEMPT
	cond_resched();
#endif /* CONFIG_PREEMPT */
}

void b43legacy_raw_phy_lock(struct b43legacy_wldev *dev)
{
	struct b43legacy_phy *phy = &dev->phy;

	B43legacy_WARN_ON(!irqs_disabled());
	if (b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD) == 0) {
		phy->locked = 0;
		return;
	}
	if (dev->dev->id.revision < 3) {
		b43legacy_mac_suspend(dev);
		spin_lock(&phy->lock);
	} else {
		if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
			b43legacy_power_saving_ctl_bits(dev, -1, 1);
	}
	phy->locked = 1;
}

void b43legacy_raw_phy_unlock(struct b43legacy_wldev *dev)
{
	struct b43legacy_phy *phy = &dev->phy;

	B43legacy_WARN_ON(!irqs_disabled());
	if (dev->dev->id.revision < 3) {
		if (phy->locked) {
			spin_unlock(&phy->lock);
			b43legacy_mac_enable(dev);
		}
	} else {
		if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
			b43legacy_power_saving_ctl_bits(dev, -1, -1);
	}
	phy->locked = 0;
}

u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset)
{
	b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
	return b43legacy_read16(dev, B43legacy_MMIO_PHY_DATA);
}

void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val)
{
	b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
	mmiowb();
	b43legacy_write16(dev, B43legacy_MMIO_PHY_DATA, val);
}

void b43legacy_phy_calibrate(struct b43legacy_wldev *dev)
{
	struct b43legacy_phy *phy = &dev->phy;

	b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); /* Dummy read. */
	if (phy->calibrated)
		return;
	if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) {
		b43legacy_wireless_core_reset(dev, 0);
		b43legacy_phy_initg(dev);
		b43legacy_wireless_core_reset(dev, B43legacy_TMSLOW_GMODE);
	}
	phy->calibrated = 1;
}

/* intialize B PHY power control
 * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
 */
static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev)
{
	struct b43legacy_phy *phy = &dev->phy;
	u16 saved_batt = 0;
	u16 saved_ratt = 0;
	u16 saved_txctl1 = 0;
	int must_reset_txpower = 0;

	B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B ||
			  phy->type == B43legacy_PHYTYPE_G));
	if (is_bcm_board_vendor(dev) &&
	    (dev->dev->bus->boardinfo.type == 0x0416))
		return;

	b43legacy_phy_write(dev, 0x0028, 0x8018);
	b43legacy_write16(dev, 0x03E6, b43legacy_read16(dev, 0x03E6) & 0xFFDF);

	if (phy->type == B43legacy_PHYTYPE_G) {
		if (!phy->gmode)
			return;
		b43legacy_phy_write(dev, 0x047A, 0xC111);
	}
	if (phy->savedpctlreg != 0xFFFF)
		return;
#ifdef CONFIG_B43LEGACY_DEBUG
	if (phy->manual_txpower_control)
		return;
#endif

	if (phy->type == B43legacy_PHYTYPE_B &&
	    phy->rev >= 2 &&
	    phy->radio_ver == 0x2050)
		b43legacy_radio_write16(dev, 0x0076,
					b43legacy_radio_read16(dev, 0x0076)
					| 0x0084);
	else {
		saved_batt = phy->bbatt;
		saved_ratt = phy->rfatt;
		saved_txctl1 = phy->txctl1;
		if ((phy->radio_rev >= 6) && (phy->radio_rev <= 8)
		    && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
			b43legacy_radio_set_txpower_bg(dev, 0xB, 0x1F, 0);
		else
			b43legacy_radio_set_txpower_bg(dev, 0xB, 9, 0);
		must_reset_txpower = 1;
	}
	b43legacy_dummy_transmission(dev);

	phy->savedpctlreg = b43legacy_phy_read(dev, B43legacy_PHY_G_PCTL);

	if (must_reset_txpower)
		b43legacy_radio_set_txpower_bg(dev, saved_batt, saved_ratt,
					       saved_txctl1);
	else
		b43legacy_radio_write16(dev, 0x0076, b43legacy_radio_read16(dev,
					0x0076) & 0xFF7B);
	b43legacy_radio_clear_tssi(dev);
}

static void b43legacy_phy_agcsetup(struct b43legacy_wldev *dev)
{
	struct b43legacy_phy *phy = &dev->phy;
	u16 offset = 0x0000;

	if (phy->rev == 1)
		offset = 0x4C00;

	b43legacy_ilt_write(dev, offset, 0x00FE);
	b43legacy_ilt_write(dev, offset + 1, 0x000D);
	b43legacy_ilt_write(dev, offset + 2, 0x0013);
	b43legacy_ilt_write(dev, offset + 3, 0x0019);

	if (phy->rev == 1) {
		b43legacy_ilt_write(dev, 0x1800, 0x2710);
		b43legacy_ilt_write(dev, 0x1801, 0x9B83);
		b43legacy_ilt_write(dev, 0x1802, 0x9B83);
		b43legacy_ilt_write(dev, 0x1803, 0x0F8D);
		b43legacy_phy_write(dev, 0x0455, 0x0004);
	}

	b43legacy_phy_write(dev, 0x04A5, (b43legacy_phy_read(dev, 0x04A5)
					  & 0x00FF) | 0x5700);
	b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
					  & 0xFF80) | 0x000F);
	b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
					  & 0xC07F) | 0x2B80);
	b43legacy_phy_write(dev, 0x048C, (b43legacy_phy_read(dev, 0x048C)
					  & 0xF0FF) | 0x0300);

	b43legacy_radio_write16(dev, 0x007A,
				b43legacy_radio_read16(dev, 0x007A)
				| 0x0008);

	b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
			    & 0xFFF0) | 0x0008);
	b43legacy_phy_write(dev, 0x04A1, (b43legacy_phy_read(dev, 0x04A1)
			    & 0xF0FF) | 0x0600);
	b43legacy_phy_write(dev, 0x04A2, (b43legacy_phy_read(dev, 0x04A2)
			    & 0xF0FF) | 0x0700);
	b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
			    & 0xF0FF) | 0x0100);

	if (phy->rev == 1)
		b43legacy_phy_write(dev, 0x04A2,
				    (b43legacy_phy_read(dev, 0x04A2)
				    & 0xFFF0) | 0x0007);

	b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
			    & 0xFF00) | 0x001C);
	b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
			    & 0xC0FF) | 0x0200);
	b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
			    & 0xFF00) | 0x001C);
	b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
			    & 0xFF00) | 0x0020);
	b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
			    & 0xC0FF) | 0x0200);
	b43legacy_phy_write(dev, 0x0482, (b43legacy_phy_read(dev, 0x0482)
			    & 0xFF00) | 0x002E);
	b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
			    & 0x00FF) | 0x1A00);
	b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
			    & 0xFF00) | 0x0028);
	b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
			    & 0x00FF) | 0x2C00);

	if (phy->rev == 1) {
		b43legacy_phy_write(dev, 0x0430, 0x092B);
		b43legacy_phy_write(dev, 0x041B,
				    (b43legacy_phy_read(dev, 0x041B)
				    & 0xFFE1) | 0x0002);
	} else {
		b43legacy_phy_write(dev, 0x041B,
				    b43legacy_phy_read(dev, 0x041B) & 0xFFE1);
		b43legacy_phy_write(dev, 0x041F, 0x287A);
		b43legacy_phy_write(dev, 0x0420,
				    (b43legacy_phy_read(dev, 0x0420)
				    & 0xFFF0) | 0x0004);
	}

	if (phy->rev > 2) {
		b43legacy_phy_write(dev, 0x0422, 0x287A);
		b43legacy_phy_write(dev, 0x0420,
				    (b43legacy_phy_read(dev, 0x0420)
				    & 0x0FFF) | 0x3000);
	}

	b43legacy_phy_write(dev, 0x04A8, (b43legacy_phy_read(dev, 0x04A8)
			    & 0x8080) | 0x7874);
	b43legacy_phy_write(dev, 0x048E, 0x1C00);

	if (phy->rev == 1) {
		b43legacy_phy_write(dev, 0x04AB,
				    (b43legacy_phy_read(dev, 0x04AB)
				    & 0xF0FF) | 0x0600);
		b43legacy_phy_write(dev, 0x048B, 0x005E);
		b43legacy_phy_write(dev, 0x048C,
				    (b43legacy_phy_read(dev, 0x048C) & 0xFF00)
				    | 0x001E);
		b43legacy_phy_write(dev, 0x048D, 0x0002);
	}

	b43legacy_ilt_write(dev, offset + 0x0800, 0);
	b43legacy_ilt_write(dev, offset + 0x0801, 7);
	b43legacy_ilt_write(dev, offset + 0x0802, 16);
	b43legacy_ilt_write(dev, offset + 0x0803, 28);

	if (phy->rev >= 6) {
		b43legacy_phy_write(dev, 0x0426,
				    (b43legacy_phy_read(dev, 0x0426) & 0xFFFC));
		b43legacy_phy_write(dev, 0x0426,
				    (b43legacy_phy_read(dev, 0x0426) & 0xEFFF));
	}
}

static void b43legacy_phy_setupg(struct b43legacy_wldev *dev)
{
	struct b43legacy_phy *phy = &dev->phy;
	u16 i;

	B43legacy_BUG_ON(phy->type != B43legacy_PHYTYPE_G);
	if (phy->rev == 1) {
		b43legacy_phy_write(dev, 0x0406, 0x4F19);
		b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
				    (b43legacy_phy_read(dev,
				    B43legacy_PHY_G_CRS) & 0xFC3F) | 0x0340);
		b43legacy_phy_write(dev, 0x042C, 0x005A);
		b43legacy_phy_write(dev, 0x0427, 0x001A);

		for (i = 0; i < B43legacy_ILT_FINEFREQG_SIZE; i++)
			b43legacy_ilt_write(dev, 0x5800 + i,
					    b43legacy_ilt_finefreqg[i]);
		for (i = 0; i < B43legacy_ILT_NOISEG1_SIZE; i++)
			b43legacy_ilt_write(dev, 0x1800 + i,
					    b43legacy_ilt_noiseg1[i]);
		for (i = 0; i < B43legacy_ILT_ROTOR_SIZE; i++)
			b43legacy_ilt_write32(dev, 0x2000 + i,
					      b43legacy_ilt_rotor[i]);
	} else {
		/* nrssi values are signed 6-bit values. Why 0x7654 here? */
		b43legacy_nrssi_hw_write(dev, 0xBA98, (s16)0x7654);

		if (phy->rev == 2) {
			b43legacy_phy_write(dev, 0x04C0, 0x1861);
			b43legacy_phy_write(dev, 0x04C1, 0x0271);
		} else if (phy->rev > 2) {
			b43legacy_phy_write(dev, 0x04C0, 0x0098);
			b43legacy_phy_write(dev, 0x04C1, 0x0070);
			b43legacy_phy_write(dev, 0x04C9, 0x0080);
		}
		b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev,
				    0x042B) | 0x800);

		for (i = 0; i < 64; i++)
			b43legacy_ilt_write(dev, 0x4000 + i, i);
		for (i = 0; i < B43legacy_ILT_NOISEG2_SIZE; i++)
			b43legacy_ilt_write(dev, 0x1800 + i,
					    b43legacy_ilt_noiseg2[i]);
	}

	if (phy->rev <= 2)
		for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
			b43legacy_ilt_write(dev, 0x1400 + i,
					    b43legacy_ilt_noisescaleg1[i]);
	else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200))
		for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
			b43legacy_ilt_write(dev, 0x1400 + i,
					    b43legacy_ilt_noisescaleg3[i]);
	else
		for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
			b43legacy_ilt_write(dev, 0x1400 + i,
					    b43legacy_ilt_noisescaleg2[i]);

	if (phy->rev == 2)
		for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
			b43legacy_ilt_write(dev, 0x5000 + i,
					    b43legacy_ilt_sigmasqr1[i]);
	else if ((phy->rev > 2) && (phy->rev <= 8))
		for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
			b43legacy_ilt_write(dev, 0x5000 + i,
					    b43legacy_ilt_sigmasqr2[i]);

	if (phy->rev == 1) {
		for (i = 0; i < B43legacy_ILT_RETARD_SIZE; i++)
			b43legacy_ilt_write32(dev, 0x2400 + i,
					      b43legacy_ilt_retard[i]);
		for (i = 4; i < 20; i++)
			b43legacy_ilt_write(dev, 0x5400 + i, 0x0020);
		b43legacy_phy_agcsetup(dev);

		if (is_bcm_board_vendor(dev) &&
		    (dev->dev->bus->boardinfo.type == 0x0416) &&
		    (dev->dev->bus->boardinfo.rev == 0x0017))
			return;

		b43legacy_ilt_write(dev, 0x5001, 0x0002);
		b43legacy_ilt_write(dev, 0x5002, 0x0001);
	} else {
		for (i = 0; i <= 0x20; i++)
			b43legacy_ilt_write(dev, 0x1000 + i, 0x0820);
		b43legacy_phy_agcsetup(dev);
		b43legacy_phy_read(dev, 0x0400); /* dummy read */
		b43legacy_phy_write(dev, 0x0403, 0x1000);
		b43legacy_ilt_write(dev, 0x3C02, 0x000F);
		b43legacy_ilt_write(dev, 0x3C03, 0x0014);

		if (is_bcm_board_vendor(dev) &&
		    (dev->dev->bus->boardinfo.type == 0x0416) &&
		    (dev->dev->bus->boardinfo.rev == 0x0017))
			return;

		b43legacy_ilt_write(dev, 0x0401, 0x0002);
		b43legacy_ilt_write(dev, 0x0402, 0x0001);
	}
}

/* Initialize the APHY portion of a GPHY. */
static void b43legacy_phy_inita(struct b43legacy_wldev *dev)
{

	might_sleep();

	b43legacy_phy_setupg(dev);
	if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL)
		b43legacy_phy_write(dev, 0x046E, 0x03CF);
}