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📄 iwlwifi.h

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/****************************************************************************** * * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved. * * Portions of this file are derived from the ipw3945 project, as well * as portions of the ieee80211 subsystem header files. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA * * The full GNU General Public License is included in this distribution in the * file called LICENSE. * * Contact Information: * James P. Ketrenos <ipw2100-admin@linux.intel.com> * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 * *****************************************************************************/#ifndef __iwlwifi_h__#define __iwlwifi_h__#include <linux/pci.h> /* for struct pci_device_id */#include <linux/kernel.h>#include <net/ieee80211_radiotap.h>struct iwl_priv;/* Hardware specific file defines the PCI IDs table for that hardware module */extern struct pci_device_id iwl_hw_card_ids[];#include "iwl-hw.h"#if IWL == 3945#define DRV_NAME	"iwl3945"#include "iwl-3945-hw.h"#elif IWL == 4965#define DRV_NAME        "iwl4965"#include "iwl-4965-hw.h"#endif#include "iwl-prph.h"/* * Driver implementation data structures, constants, inline * functions * * NOTE:  DO NOT PUT HARDWARE/UCODE SPECIFIC DECLRATIONS HERE * * Hardware specific declrations go into iwl-*hw.h * */#include "iwl-debug.h"/* Default noise level to report when noise measurement is not available. *   This may be because we're: *   1)  Not associated (4965, no beacon statistics being sent to driver) *   2)  Scanning (noise measurement does not apply to associated channel) *   3)  Receiving CCK (3945 delivers noise info only for OFDM frames) * Use default noise value of -127 ... this is below the range of measurable *   Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. *   Also, -127 works better than 0 when averaging frames with/without *   noise info (e.g. averaging might be done in app); measured dBm values are *   always negative ... using a negative value as the default keeps all *   averages within an s8's (used in some apps) range of negative values. */#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)/* Module parameters accessible from iwl-*.c */extern int iwl_param_disable_hw_scan;extern int iwl_param_debug;extern int iwl_param_mode;extern int iwl_param_disable;extern int iwl_param_antenna;extern int iwl_param_hwcrypto;extern int iwl_param_qos_enable;extern int iwl_param_queues_num;enum iwl_antenna {	IWL_ANTENNA_DIVERSITY,	IWL_ANTENNA_MAIN,	IWL_ANTENNA_AUX};/* * RTS threshold here is total size [2347] minus 4 FCS bytes * Per spec: *   a value of 0 means RTS on all data/management packets *   a value > max MSDU size means no RTS * else RTS for data/management frames where MPDU is larger *   than RTS value. */#define DEFAULT_RTS_THRESHOLD     2347U#define MIN_RTS_THRESHOLD         0U#define MAX_RTS_THRESHOLD         2347U#define MAX_MSDU_SIZE		  2304U#define MAX_MPDU_SIZE		  2346U#define DEFAULT_BEACON_INTERVAL   100U#define	DEFAULT_SHORT_RETRY_LIMIT 7U#define	DEFAULT_LONG_RETRY_LIMIT  4Ustruct iwl_rx_mem_buffer {	dma_addr_t dma_addr;	struct sk_buff *skb;	struct list_head list;};struct iwl_rt_rx_hdr {	struct ieee80211_radiotap_header rt_hdr;	__le64 rt_tsf;		/* TSF */	u8 rt_flags;		/* radiotap packet flags */	u8 rt_rate;		/* rate in 500kb/s */	__le16 rt_channelMHz;	/* channel in MHz */	__le16 rt_chbitmask;	/* channel bitfield */	s8 rt_dbmsignal;	/* signal in dBm, kluged to signed */	s8 rt_dbmnoise;	u8 rt_antenna;		/* antenna number */	u8 payload[0];		/* payload... */} __attribute__ ((packed));struct iwl_rt_tx_hdr {	struct ieee80211_radiotap_header rt_hdr;	u8 rt_rate;		/* rate in 500kb/s */	__le16 rt_channel;	/* channel in mHz */	__le16 rt_chbitmask;	/* channel bitfield */	s8 rt_dbmsignal;	/* signal in dBm, kluged to signed */	u8 rt_antenna;		/* antenna number */	u8 payload[0];		/* payload... */} __attribute__ ((packed));/* * Generic queue structure * * Contains common data for Rx and Tx queues */struct iwl_queue {	int n_bd;              /* number of BDs in this queue */	int first_empty;       /* 1-st empty entry (index) host_w*/	int last_used;         /* last used entry (index) host_r*/	dma_addr_t dma_addr;   /* physical addr for BD's */	int n_window;	       /* safe queue window */	u32 id;	int low_mark;	       /* low watermark, resume queue if free				* space more than this */	int high_mark;         /* high watermark, stop queue if free				* space less than this */} __attribute__ ((packed));#define MAX_NUM_OF_TBS          (20)struct iwl_tx_info {	struct ieee80211_tx_status status;	struct sk_buff *skb[MAX_NUM_OF_TBS];};/** * struct iwl_tx_queue - Tx Queue for DMA * @need_update: need to update read/write index * @shed_retry: queue is HT AGG enabled * * Queue consists of circular buffer of BD's and required locking structures. */struct iwl_tx_queue {	struct iwl_queue q;	struct iwl_tfd_frame *bd;	struct iwl_cmd *cmd;	dma_addr_t dma_addr_cmd;	struct iwl_tx_info *txb;	int need_update;	int sched_retry;	int active;};#include "iwl-channel.h"#if IWL == 3945#include "iwl-3945-rs.h"#else#include "iwl-4965-rs.h"#endif#define IWL_TX_FIFO_AC0	0#define IWL_TX_FIFO_AC1	1#define IWL_TX_FIFO_AC2	2#define IWL_TX_FIFO_AC3	3#define IWL_TX_FIFO_HCCA_1	5#define IWL_TX_FIFO_HCCA_2	6#define IWL_TX_FIFO_NONE	7/* Minimum number of queues. MAX_NUM is defined in hw specific files */#define IWL_MIN_NUM_QUEUES	4/* Power management (not Tx power) structures */struct iwl_power_vec_entry {	struct iwl_powertable_cmd cmd;	u8 no_dtim;};#define IWL_POWER_RANGE_0  (0)#define IWL_POWER_RANGE_1  (1)#define IWL_POWER_MODE_CAM	0x00	/* Continuously Aware Mode, always on */#define IWL_POWER_INDEX_3	0x03#define IWL_POWER_INDEX_5	0x05#define IWL_POWER_AC		0x06#define IWL_POWER_BATTERY	0x07#define IWL_POWER_LIMIT		0x07#define IWL_POWER_MASK		0x0F#define IWL_POWER_ENABLED	0x10#define IWL_POWER_LEVEL(x)	((x) & IWL_POWER_MASK)struct iwl_power_mgr {	spinlock_t lock;	struct iwl_power_vec_entry pwr_range_0[IWL_POWER_AC];	struct iwl_power_vec_entry pwr_range_1[IWL_POWER_AC];	u8 active_index;	u32 dtim_val;};#define IEEE80211_DATA_LEN              2304#define IEEE80211_4ADDR_LEN             30#define IEEE80211_HLEN                  (IEEE80211_4ADDR_LEN)#define IEEE80211_FRAME_LEN             (IEEE80211_DATA_LEN + IEEE80211_HLEN)struct iwl_frame {	union {		struct ieee80211_hdr frame;		struct iwl_tx_beacon_cmd beacon;		u8 raw[IEEE80211_FRAME_LEN];		u8 cmd[360];	} u;	struct list_head list;};#define SEQ_TO_QUEUE(x)  ((x >> 8) & 0xbf)#define QUEUE_TO_SEQ(x)  ((x & 0xbf) << 8)#define SEQ_TO_INDEX(x) (x & 0xff)#define INDEX_TO_SEQ(x) (x & 0xff)#define SEQ_HUGE_FRAME  (0x4000)#define SEQ_RX_FRAME    __constant_cpu_to_le16(0x8000)#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)enum {	/* CMD_SIZE_NORMAL = 0, */	CMD_SIZE_HUGE = (1 << 0),	/* CMD_SYNC = 0, */	CMD_ASYNC = (1 << 1),	/* CMD_NO_SKB = 0, */	CMD_WANT_SKB = (1 << 2),};struct iwl_cmd;struct iwl_priv;struct iwl_cmd_meta {	struct iwl_cmd_meta *source;	union {		struct sk_buff *skb;		int (*callback)(struct iwl_priv *priv,				struct iwl_cmd *cmd, struct sk_buff *skb);	} __attribute__ ((packed)) u;	/* The CMD_SIZE_HUGE flag bit indicates that the command	 * structure is stored at the end of the shared queue memory. */	u32 flags;} __attribute__ ((packed));struct iwl_cmd {	struct iwl_cmd_meta meta;	struct iwl_cmd_header hdr;	union {		struct iwl_addsta_cmd addsta;		struct iwl_led_cmd led;		u32 flags;		u8 val8;		u16 val16;		u32 val32;		struct iwl_bt_cmd bt;		struct iwl_rxon_time_cmd rxon_time;		struct iwl_powertable_cmd powertable;		struct iwl_qosparam_cmd qosparam;		struct iwl_tx_cmd tx;		struct iwl_tx_beacon_cmd tx_beacon;		struct iwl_rxon_assoc_cmd rxon_assoc;		u8 *indirect;		u8 payload[360];	} __attribute__ ((packed)) cmd;} __attribute__ ((packed));struct iwl_host_cmd {	u8 id;	u16 len;	struct iwl_cmd_meta meta;	const void *data;};#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \			      sizeof(struct iwl_cmd_meta))/* * RX related structures and functions */#define RX_FREE_BUFFERS 64#define RX_LOW_WATERMARK 8#define SUP_RATE_11A_MAX_NUM_CHANNELS  8#define SUP_RATE_11B_MAX_NUM_CHANNELS  4#define SUP_RATE_11G_MAX_NUM_CHANNELS  12/** * struct iwl_rx_queue - Rx queue * @processed: Internal index to last handled Rx packet * @read: Shared index to newest available Rx buffer * @write: Shared index to oldest written Rx packet * @free_count: Number of pre-allocated buffers in rx_free * @rx_free: list of free SKBs for use * @rx_used: List of Rx buffers with no SKB * @need_update: flag to indicate we need to update read/write index * * NOTE:  rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers */struct iwl_rx_queue {	__le32 *bd;	dma_addr_t dma_addr;	struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];	struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];	u32 processed;	u32 read;	u32 write;	u32 free_count;	struct list_head rx_free;	struct list_head rx_used;	int need_update;	spinlock_t lock;};#define IWL_SUPPORTED_RATES_IE_LEN         8#define SCAN_INTERVAL 100#define MAX_A_CHANNELS  252#define MIN_A_CHANNELS  7

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