phy.c

linux内核源码

			b43_ofdmtab_write16(dev, 0x1400, i,
					    b43_tab_noisescaleg3[i]);
	else
		for (i = 0; i < B43_TAB_NOISESCALEG_SIZE; i++)
			b43_ofdmtab_write16(dev, 0x1400, i,
					    b43_tab_noisescaleg2[i]);

	if (phy->rev == 2)
		for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++)
			b43_ofdmtab_write16(dev, 0x5000, i,
					    b43_tab_sigmasqr1[i]);
	else if ((phy->rev > 2) && (phy->rev <= 8))
		for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++)
			b43_ofdmtab_write16(dev, 0x5000, i,
					    b43_tab_sigmasqr2[i]);

	if (phy->rev == 1) {
		for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
			b43_ofdmtab_write32(dev, 0x2400, i, b43_tab_retard[i]);
		for (i = 4; i < 20; i++)
			b43_ofdmtab_write16(dev, 0x5400, i, 0x0020);
		b43_phy_agcsetup(dev);

		if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
		    (bus->boardinfo.type == SSB_BOARD_BU4306) &&
		    (bus->boardinfo.rev == 0x17))
			return;

		b43_ofdmtab_write16(dev, 0x5001, 0, 0x0002);
		b43_ofdmtab_write16(dev, 0x5002, 0, 0x0001);
	} else {
		for (i = 0; i < 0x20; i++)
			b43_ofdmtab_write16(dev, 0x1000, i, 0x0820);
		b43_phy_agcsetup(dev);
		b43_phy_read(dev, 0x0400);	/* dummy read */
		b43_phy_write(dev, 0x0403, 0x1000);
		b43_ofdmtab_write16(dev, 0x3C02, 0, 0x000F);
		b43_ofdmtab_write16(dev, 0x3C03, 0, 0x0014);

		if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
		    (bus->boardinfo.type == SSB_BOARD_BU4306) &&
		    (bus->boardinfo.rev == 0x17))
			return;

		b43_ofdmtab_write16(dev, 0x0401, 0, 0x0002);
		b43_ofdmtab_write16(dev, 0x0402, 0, 0x0001);
	}
}

/* Initialize the noisescaletable for APHY */
static void b43_phy_init_noisescaletbl(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;
	int i;

	for (i = 0; i < 12; i++) {
		if (phy->rev == 2)
			b43_ofdmtab_write16(dev, 0x1400, i, 0x6767);
		else
			b43_ofdmtab_write16(dev, 0x1400, i, 0x2323);
	}
	if (phy->rev == 2)
		b43_ofdmtab_write16(dev, 0x1400, i, 0x6700);
	else
		b43_ofdmtab_write16(dev, 0x1400, i, 0x2300);
	for (i = 0; i < 11; i++) {
		if (phy->rev == 2)
			b43_ofdmtab_write16(dev, 0x1400, i, 0x6767);
		else
			b43_ofdmtab_write16(dev, 0x1400, i, 0x2323);
	}
	if (phy->rev == 2)
		b43_ofdmtab_write16(dev, 0x1400, i, 0x0067);
	else
		b43_ofdmtab_write16(dev, 0x1400, i, 0x0023);
}

static void b43_phy_setupa(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;
	u16 i;

	B43_WARN_ON(phy->type != B43_PHYTYPE_A);
	switch (phy->rev) {
	case 2:
		b43_phy_write(dev, 0x008E, 0x3800);
		b43_phy_write(dev, 0x0035, 0x03FF);
		b43_phy_write(dev, 0x0036, 0x0400);

		b43_ofdmtab_write16(dev, 0x3807, 0, 0x0051);

		b43_phy_write(dev, 0x001C, 0x0FF9);
		b43_phy_write(dev, 0x0020, b43_phy_read(dev, 0x0020) & 0xFF0F);
		b43_ofdmtab_write16(dev, 0x3C0C, 0, 0x07BF);
		b43_radio_write16(dev, 0x0002, 0x07BF);

		b43_phy_write(dev, 0x0024, 0x4680);
		b43_phy_write(dev, 0x0020, 0x0003);
		b43_phy_write(dev, 0x001D, 0x0F40);
		b43_phy_write(dev, 0x001F, 0x1C00);

		b43_phy_write(dev, 0x002A, (b43_phy_read(dev, 0x002A)
					    & 0x00FF) | 0x0400);
		b43_phy_write(dev, 0x002B, b43_phy_read(dev, 0x002B)
			      & 0xFBFF);
		b43_phy_write(dev, 0x008E, 0x58C1);

		b43_ofdmtab_write16(dev, 0x0803, 0, 0x000F);
		b43_ofdmtab_write16(dev, 0x0804, 0, 0x001F);
		b43_ofdmtab_write16(dev, 0x0805, 0, 0x002A);
		b43_ofdmtab_write16(dev, 0x0805, 0, 0x0030);
		b43_ofdmtab_write16(dev, 0x0807, 0, 0x003A);

		b43_ofdmtab_write16(dev, 0x0000, 0, 0x0013);
		b43_ofdmtab_write16(dev, 0x0000, 1, 0x0013);
		b43_ofdmtab_write16(dev, 0x0000, 2, 0x0013);
		b43_ofdmtab_write16(dev, 0x0000, 3, 0x0013);
		b43_ofdmtab_write16(dev, 0x0000, 4, 0x0015);
		b43_ofdmtab_write16(dev, 0x0000, 5, 0x0015);
		b43_ofdmtab_write16(dev, 0x0000, 6, 0x0019);

		b43_ofdmtab_write16(dev, 0x0404, 0, 0x0003);
		b43_ofdmtab_write16(dev, 0x0405, 0, 0x0003);
		b43_ofdmtab_write16(dev, 0x0406, 0, 0x0007);

		for (i = 0; i < 16; i++)
			b43_ofdmtab_write16(dev, 0x4000, i, (0x8 + i) & 0x000F);

		b43_ofdmtab_write16(dev, 0x3003, 0, 0x1044);
		b43_ofdmtab_write16(dev, 0x3004, 0, 0x7201);
		b43_ofdmtab_write16(dev, 0x3006, 0, 0x0040);
		b43_ofdmtab_write16(dev, 0x3001, 0,
				    (b43_ofdmtab_read16(dev, 0x3001, 0) &
				     0x0010) | 0x0008);

		for (i = 0; i < B43_TAB_FINEFREQA_SIZE; i++)
			b43_ofdmtab_write16(dev, 0x5800, i,
					    b43_tab_finefreqa[i]);
		for (i = 0; i < B43_TAB_NOISEA2_SIZE; i++)
			b43_ofdmtab_write16(dev, 0x1800, i, b43_tab_noisea2[i]);
		for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
			b43_ofdmtab_write32(dev, 0x2000, i, b43_tab_rotor[i]);
		b43_phy_init_noisescaletbl(dev);
		for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
			b43_ofdmtab_write32(dev, 0x2400, i, b43_tab_retard[i]);
		break;
	case 3:
		for (i = 0; i < 64; i++)
			b43_ofdmtab_write16(dev, 0x4000, i, i);

		b43_ofdmtab_write16(dev, 0x3807, 0, 0x0051);

		b43_phy_write(dev, 0x001C, 0x0FF9);
		b43_phy_write(dev, 0x0020, b43_phy_read(dev, 0x0020) & 0xFF0F);
		b43_radio_write16(dev, 0x0002, 0x07BF);

		b43_phy_write(dev, 0x0024, 0x4680);
		b43_phy_write(dev, 0x0020, 0x0003);
		b43_phy_write(dev, 0x001D, 0x0F40);
		b43_phy_write(dev, 0x001F, 0x1C00);
		b43_phy_write(dev, 0x002A, (b43_phy_read(dev, 0x002A)
					    & 0x00FF) | 0x0400);

		b43_ofdmtab_write16(dev, 0x3000, 1,
				    (b43_ofdmtab_read16(dev, 0x3000, 1)
				     & 0x0010) | 0x0008);
		for (i = 0; i < B43_TAB_NOISEA3_SIZE; i++) {
			b43_ofdmtab_write16(dev, 0x1800, i, b43_tab_noisea3[i]);
		}
		b43_phy_init_noisescaletbl(dev);
		for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
			b43_ofdmtab_write16(dev, 0x5000, i,
					    b43_tab_sigmasqr1[i]);
		}

		b43_phy_write(dev, 0x0003, 0x1808);

		b43_ofdmtab_write16(dev, 0x0803, 0, 0x000F);
		b43_ofdmtab_write16(dev, 0x0804, 0, 0x001F);
		b43_ofdmtab_write16(dev, 0x0805, 0, 0x002A);
		b43_ofdmtab_write16(dev, 0x0805, 0, 0x0030);
		b43_ofdmtab_write16(dev, 0x0807, 0, 0x003A);

		b43_ofdmtab_write16(dev, 0x0000, 0, 0x0013);
		b43_ofdmtab_write16(dev, 0x0001, 0, 0x0013);
		b43_ofdmtab_write16(dev, 0x0002, 0, 0x0013);
		b43_ofdmtab_write16(dev, 0x0003, 0, 0x0013);
		b43_ofdmtab_write16(dev, 0x0004, 0, 0x0015);
		b43_ofdmtab_write16(dev, 0x0005, 0, 0x0015);
		b43_ofdmtab_write16(dev, 0x0006, 0, 0x0019);

		b43_ofdmtab_write16(dev, 0x0404, 0, 0x0003);
		b43_ofdmtab_write16(dev, 0x0405, 0, 0x0003);
		b43_ofdmtab_write16(dev, 0x0406, 0, 0x0007);

		b43_ofdmtab_write16(dev, 0x3C02, 0, 0x000F);
		b43_ofdmtab_write16(dev, 0x3C03, 0, 0x0014);
		break;
	default:
		B43_WARN_ON(1);
	}
}

/* Initialize APHY. This is also called for the GPHY in some cases. */
static void b43_phy_inita(struct b43_wldev *dev)
{
	struct ssb_bus *bus = dev->dev->bus;
	struct b43_phy *phy = &dev->phy;
	u16 tval;

	might_sleep();

	if (phy->type == B43_PHYTYPE_A) {
		b43_phy_setupa(dev);
	} else {
		b43_phy_setupg(dev);
		if (phy->gmode &&
		    (dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_PACTRL))
			b43_phy_write(dev, 0x046E, 0x03CF);
		return;
	}

	b43_phy_write(dev, B43_PHY_A_CRS,
		      (b43_phy_read(dev, B43_PHY_A_CRS) & 0xF83C) | 0x0340);
	b43_phy_write(dev, 0x0034, 0x0001);

	//TODO: RSSI AGC
	b43_phy_write(dev, B43_PHY_A_CRS,
		      b43_phy_read(dev, B43_PHY_A_CRS) | (1 << 14));
	b43_radio_init2060(dev);

	if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
	    ((bus->boardinfo.type == SSB_BOARD_BU4306) ||
	     (bus->boardinfo.type == SSB_BOARD_BU4309))) {
		if (phy->lofcal == 0xFFFF) {
			//TODO: LOF Cal
			b43_radio_set_tx_iq(dev);
		} else
			b43_radio_write16(dev, 0x001E, phy->lofcal);
	}

	b43_phy_write(dev, 0x007A, 0xF111);

	if (phy->cur_idle_tssi == 0) {
		b43_radio_write16(dev, 0x0019, 0x0000);
		b43_radio_write16(dev, 0x0017, 0x0020);

		tval = b43_ofdmtab_read16(dev, 0x3001, 0);
		if (phy->rev == 1) {
			b43_ofdmtab_write16(dev, 0x3001, 0,
					    (b43_ofdmtab_read16(dev, 0x3001, 0)
					     & 0xFF87)
					    | 0x0058);
		} else {
			b43_ofdmtab_write16(dev, 0x3001, 0,
					    (b43_ofdmtab_read16(dev, 0x3001, 0)
					     & 0xFFC3)
					    | 0x002C);
		}
		b43_dummy_transmission(dev);
		phy->cur_idle_tssi = b43_phy_read(dev, B43_PHY_A_PCTL);
		b43_ofdmtab_write16(dev, 0x3001, 0, tval);

		b43_radio_set_txpower_a(dev, 0x0018);
	}
	b43_shm_clear_tssi(dev);
}

static void b43_phy_initb2(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;
	u16 offset, val;

	b43_write16(dev, 0x03EC, 0x3F22);
	b43_phy_write(dev, 0x0020, 0x301C);
	b43_phy_write(dev, 0x0026, 0x0000);
	b43_phy_write(dev, 0x0030, 0x00C6);
	b43_phy_write(dev, 0x0088, 0x3E00);
	val = 0x3C3D;
	for (offset = 0x0089; offset < 0x00A7; offset++) {
		b43_phy_write(dev, offset, val);
		val -= 0x0202;
	}
	b43_phy_write(dev, 0x03E4, 0x3000);
	b43_radio_selectchannel(dev, phy->channel, 0);
	if (phy->radio_ver != 0x2050) {
		b43_radio_write16(dev, 0x0075, 0x0080);
		b43_radio_write16(dev, 0x0079, 0x0081);
	}
	b43_radio_write16(dev, 0x0050, 0x0020);
	b43_radio_write16(dev, 0x0050, 0x0023);
	if (phy->radio_ver == 0x2050) {
		b43_radio_write16(dev, 0x0050, 0x0020);
		b43_radio_write16(dev, 0x005A, 0x0070);
		b43_radio_write16(dev, 0x005B, 0x007B);
		b43_radio_write16(dev, 0x005C, 0x00B0);
		b43_radio_write16(dev, 0x007A, 0x000F);
		b43_phy_write(dev, 0x0038, 0x0677);
		b43_radio_init2050(dev);
	}
	b43_phy_write(dev, 0x0014, 0x0080);
	b43_phy_write(dev, 0x0032, 0x00CA);
	b43_phy_write(dev, 0x0032, 0x00CC);
	b43_phy_write(dev, 0x0035, 0x07C2);
	b43_lo_b_measure(dev);
	b43_phy_write(dev, 0x0026, 0xCC00);
	if (phy->radio_ver != 0x2050)
		b43_phy_write(dev, 0x0026, 0xCE00);
	b43_write16(dev, B43_MMIO_CHANNEL_EXT, 0x1000);
	b43_phy_write(dev, 0x002A, 0x88A3);
	if (phy->radio_ver != 0x2050)
		b43_phy_write(dev, 0x002A, 0x88C2);
	b43_set_txpower_g(dev, &phy->bbatt, &phy->rfatt, phy->tx_control);
	b43_phy_init_pctl(dev);
}

static void b43_phy_initb4(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;
	u16 offset, val;

	b43_write16(dev, 0x03EC, 0x3F22);
	b43_phy_write(dev, 0x0020, 0x301C);
	b43_phy_write(dev, 0x0026, 0x0000);
	b43_phy_write(dev, 0x0030, 0x00C6);
	b43_phy_write(dev, 0x0088, 0x3E00);
	val = 0x3C3D;
	for (offset = 0x0089; offset < 0x00A7; offset++) {
		b43_phy_write(dev, offset, val);
		val -= 0x0202;
	}
	b43_phy_write(dev, 0x03E4, 0x3000);
	b43_radio_selectchannel(dev, phy->channel, 0);
	if (phy->radio_ver != 0x2050) {
		b43_radio_write16(dev, 0x0075, 0x0080);
		b43_radio_write16(dev, 0x0079, 0x0081);
	}
	b43_radio_write16(dev, 0x0050, 0x0020);
	b43_radio_write16(dev, 0x0050, 0x0023);
	if (phy->radio_ver == 0x2050) {
		b43_radio_write16(dev, 0x0050, 0x0020);
		b43_radio_write16(dev, 0x005A, 0x0070);
		b43_radio_write16(dev, 0x005B, 0x007B);
		b43_radio_write16(dev, 0x005C, 0x00B0);
		b43_radio_write16(dev, 0x007A, 0x000F);
		b43_phy_write(dev, 0x0038, 0x0677);
		b43_radio_init2050(dev);
	}
	b43_phy_write(dev, 0x0014, 0x0080);
	b43_phy_write(dev, 0x0032, 0x00CA);
	if (phy->radio_ver == 0x2050)
		b43_phy_write(dev, 0x0032, 0x00E0);
	b43_phy_write(dev, 0x0035, 0x07C2);

	b43_lo_b_measure(dev);

	b43_phy_write(dev, 0x0026, 0xCC00);
	if (phy->radio_ver == 0x2050)
		b43_phy_write(dev, 0x0026, 0xCE00);
	b43_write16(dev, B43_MMIO_CHANNEL_EXT, 0x1100);
	b43_phy_write(dev, 0x002A, 0x88A3);
	if (phy->radio_ver == 0x2050)
		b43_phy_write(dev, 0x002A, 0x88C2);
	b43_set_txpower_g(dev, &phy->bbatt, &phy->rfatt, phy->tx_control);
	if (dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_RSSI) {
		b43_calc_nrssi_slope(dev);
		b43_calc_nrssi_threshold(dev);
	}
	b43_phy_init_pctl(dev);
}

static void b43_phy_initb5(struct b43_wldev *dev)
{
	struct ssb_bus *bus = dev->dev->bus;
	struct b43_phy *phy = &dev->phy;
	u16 offset, value;
	u8 old_channel;

	if (phy->analog == 1) {
		b43_radio_write16(dev, 0x007A, b43_radio_read16(dev, 0x007A)
				  | 0x0050);
	}
	if ((bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM) &&
	    (bus->boardinfo.type != SSB_BOARD_BU4306)) {
		value = 0x2120;
		for (offset = 0x00A8; offset < 0x00C7; offset++) {
			b43_phy_write(dev, offset, value);
			value += 0x202;
		}
	}
	b43_phy_write(dev, 0x0035, (b43_phy_read(dev, 0x0035) & 0xF0FF)
		      | 0x0700);
	if (phy->radio_ver == 0x2050)
		b43_phy_write(dev, 0x0038, 0x0667);

	if (phy->gmode || phy->rev >= 2) {
		if (phy->radio_ver == 0x2050) {
			b43_radio_write16(dev, 0x007A,
					  b43_radio_read16(dev, 0x007A)
					  | 0x0020);
			b43_radio_write16(dev, 0x0051,
					  b43_radio_read16(dev, 0x0051)
					  | 0x0004);
		}
		b43_write16(dev, B43_MMIO_PHY_RADIO, 0x0000);

		b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) | 0x0100);
		b43_phy_write(dev, 0x042B, b43_phy_read(dev, 0x042B) | 0x2000);

		b43_phy_write(dev, 0x001C, 0x186A);

		b43_phy_write(dev, 0x0013,
			      (b43_phy_read(dev, 0x0013) & 0x00FF) | 0x1900);
		b43_phy_write(dev, 0x0035,
			      (b43_phy_read(dev, 0x0035) & 0xFFC0) | 0x0064);
		b43_phy_write(dev, 0x005D,
			      (b43_phy_read(dev, 0x005D) & 0xFF80) | 0x000A);
	}

	if (dev->bad_frames_preempt) {
		b43_phy_write(dev, B43_PHY_RADIO_BITFIELD,
			      b43_phy_read(dev,
					   B43_PHY_RADIO_BITFIELD) | (1 << 11));
	}

	if (phy->analog == 1) {
		b43_phy_write(dev, 0x0026, 0xCE00);
		b43_phy_write(dev, 0x0021, 0x3763);
		b43_phy_write(dev, 0x0022, 0x1BC3);
		b43_phy_write(dev, 0x0023, 0x06F9);
		b43_phy_write(dev, 0x0024, 0x037E);
	} else
		b43_phy_write(dev, 0x0026, 0xCC00);
	b43_phy_write(dev, 0x0030, 0x00C6);
	b43_write16(dev, 0x03EC, 0x3F22);

	if (phy->analog == 1)
		b43_phy_write(dev, 0x0020, 0x3E1C);
	else
		b43_phy_write(dev, 0x0020, 0x301C);

	if (phy->analog == 0)
		b43_write16(dev, 0x03E4, 0x3000);

	old_channel = phy->channel;
	/* Force to channel 7, even if not supported. */
	b43_radio_selectchannel(dev, 7, 0);

	if (phy->radio_ver != 0x2050) {
		b43_radio_write16(dev, 0x0075, 0x0080);
		b43_radio_write16(dev, 0x0079, 0x0081);
	}

	b43_radio_write16(dev, 0x0050, 0x0020);
	b43_radio_write16(dev, 0x0050, 0x0023);

	if (phy->radio_ver == 0x2050) {
		b43_radio_write16(dev, 0x0050, 0x0020);
		b43_radio_write16(dev, 0x005A, 0x0070);
	}

	b43_radio_write16(dev, 0x005B, 0x007B);