📄 mpi_cnfg.h
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#define MPI_IOCPAGE2_CAP_FLAGS_RAID_6_SUPPORT (0x00000010)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_10_SUPPORT (0x00000020)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_50_SUPPORT (0x00000040)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_64_BIT_ADDRESSING (0x10000000)#define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000)#define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000)#define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000)typedef struct _IOC_3_PHYS_DISK{ U8 PhysDiskID; /* 00h */ U8 PhysDiskBus; /* 01h */ U8 PhysDiskIOC; /* 02h */ U8 PhysDiskNum; /* 03h */} IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK, Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t;/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX#define MPI_IOC_PAGE_3_PHYSDISK_MAX (1)#endiftypedef struct _CONFIG_PAGE_IOC_3{ CONFIG_PAGE_HEADER Header; /* 00h */ U8 NumPhysDisks; /* 04h */ U8 Reserved1; /* 05h */ U16 Reserved2; /* 06h */ IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */} CONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3, IOCPage3_t, MPI_POINTER pIOCPage3_t;#define MPI_IOCPAGE3_PAGEVERSION (0x00)typedef struct _IOC_4_SEP{ U8 SEPTargetID; /* 00h */ U8 SEPBus; /* 01h */ U16 Reserved; /* 02h */} IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP, Ioc4Sep_t, MPI_POINTER pIoc4Sep_t;/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IOC_PAGE_4_SEP_MAX#define MPI_IOC_PAGE_4_SEP_MAX (1)#endiftypedef struct _CONFIG_PAGE_IOC_4{ CONFIG_PAGE_HEADER Header; /* 00h */ U8 ActiveSEP; /* 04h */ U8 MaxSEP; /* 05h */ U16 Reserved1; /* 06h */ IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */} CONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4, IOCPage4_t, MPI_POINTER pIOCPage4_t;#define MPI_IOCPAGE4_PAGEVERSION (0x00)typedef struct _IOC_5_HOT_SPARE{ U8 PhysDiskNum; /* 00h */ U8 Reserved; /* 01h */ U8 HotSparePool; /* 02h */ U8 Flags; /* 03h */} IOC_5_HOT_SPARE, MPI_POINTER PTR_IOC_5_HOT_SPARE, Ioc5HotSpare_t, MPI_POINTER pIoc5HotSpare_t;/* IOC Page 5 HotSpare Flags */#define MPI_IOC_PAGE_5_HOT_SPARE_ACTIVE (0x01)/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IOC_PAGE_5_HOT_SPARE_MAX#define MPI_IOC_PAGE_5_HOT_SPARE_MAX (1)#endiftypedef struct _CONFIG_PAGE_IOC_5{ CONFIG_PAGE_HEADER Header; /* 00h */ U32 Reserved1; /* 04h */ U8 NumHotSpares; /* 08h */ U8 Reserved2; /* 09h */ U16 Reserved3; /* 0Ah */ IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */} CONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5, IOCPage5_t, MPI_POINTER pIOCPage5_t;#define MPI_IOCPAGE5_PAGEVERSION (0x00)typedef struct _CONFIG_PAGE_IOC_6{ CONFIG_PAGE_HEADER Header; /* 00h */ U32 CapabilitiesFlags; /* 04h */ U8 MaxDrivesIS; /* 08h */ U8 MaxDrivesIM; /* 09h */ U8 MaxDrivesIME; /* 0Ah */ U8 Reserved1; /* 0Bh */ U8 MinDrivesIS; /* 0Ch */ U8 MinDrivesIM; /* 0Dh */ U8 MinDrivesIME; /* 0Eh */ U8 Reserved2; /* 0Fh */ U8 MaxGlobalHotSpares; /* 10h */ U8 Reserved3; /* 11h */ U16 Reserved4; /* 12h */ U32 Reserved5; /* 14h */ U32 SupportedStripeSizeMapIS; /* 18h */ U32 SupportedStripeSizeMapIME; /* 1Ch */ U32 Reserved6; /* 20h */ U8 MetadataSize; /* 24h */ U8 Reserved7; /* 25h */ U16 Reserved8; /* 26h */ U16 MaxBadBlockTableEntries; /* 28h */ U16 Reserved9; /* 2Ah */ U16 IRNvsramUsage; /* 2Ch */ U16 Reserved10; /* 2Eh */ U32 IRNvsramVersion; /* 30h */ U32 Reserved11; /* 34h */ U32 Reserved12; /* 38h */} CONFIG_PAGE_IOC_6, MPI_POINTER PTR_CONFIG_PAGE_IOC_6, IOCPage6_t, MPI_POINTER pIOCPage6_t;#define MPI_IOCPAGE6_PAGEVERSION (0x01)/* IOC Page 6 Capabilities Flags */#define MPI_IOCPAGE6_CAP_FLAGS_DISABLE_SMART_POLLING (0x00000008)#define MPI_IOCPAGE6_CAP_FLAGS_MASK_METADATA_SIZE (0x00000006)#define MPI_IOCPAGE6_CAP_FLAGS_64MB_METADATA_SIZE (0x00000000)#define MPI_IOCPAGE6_CAP_FLAGS_512MB_METADATA_SIZE (0x00000002)#define MPI_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001)/***************************************************************************** BIOS Config Pages****************************************************************************/typedef struct _CONFIG_PAGE_BIOS_1{ CONFIG_PAGE_HEADER Header; /* 00h */ U32 BiosOptions; /* 04h */ U32 IOCSettings; /* 08h */ U32 Reserved1; /* 0Ch */ U32 DeviceSettings; /* 10h */ U16 NumberOfDevices; /* 14h */ U8 ExpanderSpinup; /* 16h */ U8 Reserved2; /* 17h */ U16 IOTimeoutBlockDevicesNonRM; /* 18h */ U16 IOTimeoutSequential; /* 1Ah */ U16 IOTimeoutOther; /* 1Ch */ U16 IOTimeoutBlockDevicesRM; /* 1Eh */} CONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1, BIOSPage1_t, MPI_POINTER pBIOSPage1_t;#define MPI_BIOSPAGE1_PAGEVERSION (0x03)/* values for the BiosOptions field */#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)#define MPI_BIOSPAGE1_OPTIONS_FC_ENABLE (0x00000200)#define MPI_BIOSPAGE1_OPTIONS_SAS_ENABLE (0x00000100)#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)/* values for the IOCSettings field */#define MPI_BIOSPAGE1_IOCSET_MASK_INITIAL_SPINUP_DELAY (0x0F000000)#define MPI_BIOSPAGE1_IOCSET_SHIFT_INITIAL_SPINUP_DELAY (24)#define MPI_BIOSPAGE1_IOCSET_MASK_PORT_ENABLE_DELAY (0x00F00000)#define MPI_BIOSPAGE1_IOCSET_SHIFT_PORT_ENABLE_DELAY (20)#define MPI_BIOSPAGE1_IOCSET_AUTO_PORT_ENABLE (0x00080000)#define MPI_BIOSPAGE1_IOCSET_DIRECT_ATTACH_SPINUP_MODE (0x00040000)#define MPI_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000)#define MPI_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000)#define MPI_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000)#define MPI_BIOSPAGE1_IOCSET_MASK_MAX_TARGET_SPIN_UP (0x0000F000)#define MPI_BIOSPAGE1_IOCSET_SHIFT_MAX_TARGET_SPIN_UP (12)#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00)#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8)#define MPI_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0)#define MPI_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000)#define MPI_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040)#define MPI_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080)#define MPI_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030)#define MPI_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000)#define MPI_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010)#define MPI_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020)#define MPI_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030)#define MPI_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008)/* values for the DeviceSettings field */#define MPI_BIOSPAGE1_DEVSET_DISABLE_SMART_POLLING (0x00000010)#define MPI_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008)#define MPI_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004)#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002)#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001)/* defines for the ExpanderSpinup field */#define MPI_BIOSPAGE1_EXPSPINUP_MASK_MAX_TARGET (0xF0)#define MPI_BIOSPAGE1_EXPSPINUP_SHIFT_MAX_TARGET (4)#define MPI_BIOSPAGE1_EXPSPINUP_MASK_DELAY (0x0F)typedef struct _MPI_BOOT_DEVICE_ADAPTER_ORDER{ U32 Reserved1; /* 00h */ U32 Reserved2; /* 04h */ U32 Reserved3; /* 08h */ U32 Reserved4; /* 0Ch */ U32 Reserved5; /* 10h */ U32 Reserved6; /* 14h */ U32 Reserved7; /* 18h */ U32 Reserved8; /* 1Ch */ U32 Reserved9; /* 20h */ U32 Reserved10; /* 24h */ U32 Reserved11; /* 28h */ U32 Reserved12; /* 2Ch */ U32 Reserved13; /* 30h */ U32 Reserved14; /* 34h */ U32 Reserved15; /* 38h */ U32 Reserved16; /* 3Ch */ U32 Reserved17; /* 40h */} MPI_BOOT_DEVICE_ADAPTER_ORDER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_ORDER;typedef struct _MPI_BOOT_DEVICE_ADAPTER_NUMBER{ U8 TargetID; /* 00h */ U8 Bus; /* 01h */ U8 AdapterNumber; /* 02h */ U8 Reserved1; /* 03h */ U32 Reserved2; /* 04h */ U32 Reserved3; /* 08h */ U32 Reserved4; /* 0Ch */ U8 LUN[8]; /* 10h */ U32 Reserved5; /* 18h */ U32 Reserved6; /* 1Ch */ U32 Reserved7; /* 20h */ U32 Reserved8; /* 2⌨️ 快捷键说明
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