budget-core.c

linux内核源码

/*
 * budget-core.c: driver for the SAA7146 based Budget DVB cards
 *
 * Compiled from various sources by Michael Hunold <[e-mail]>
 *
 * Copyright (C) 2002 Ralph Metzler <[e-mail]>
 *
 * Copyright (C) 1999-2002 Ralph  Metzler
 *			 & Marcus Metzler for convergence integrated media GmbH
 *
 * 26feb2004 Support for FS Activy Card (Grundig tuner) by
 *	     Michael Dreher <[e-mail]>,
 *	     Oliver Endriss <[e-mail]>,
 *	     Andreas 'randy' Weinberger
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
 *
 *
 * the project's page is at http://www.linuxtv.org/dvb/
 */


#include "budget.h"
#include "ttpci-eeprom.h"

#define TS_WIDTH		(2 * TS_SIZE)
#define TS_WIDTH_ACTIVY		TS_SIZE
#define TS_WIDTH_DVBC		TS_SIZE
#define TS_HEIGHT_MASK		0xf00
#define TS_HEIGHT_MASK_ACTIVY	0xc00
#define TS_HEIGHT_MASK_DVBC	0xe00
#define TS_MIN_BUFSIZE_K	188
#define TS_MAX_BUFSIZE_K	1410
#define TS_MAX_BUFSIZE_K_ACTIVY	564
#define TS_MAX_BUFSIZE_K_DVBC	1316
#define BUFFER_WARNING_WAIT	(30*HZ)

int budget_debug;
static int dma_buffer_size = TS_MIN_BUFSIZE_K;
module_param_named(debug, budget_debug, int, 0644);
module_param_named(bufsize, dma_buffer_size, int, 0444);
MODULE_PARM_DESC(debug, "Turn on/off budget debugging (default:off).");
MODULE_PARM_DESC(bufsize, "DMA buffer size in KB, default: 188, min: 188, max: 1410 (Activy: 564)");

/****************************************************************************
 * TT budget / WinTV Nova
 ****************************************************************************/

static int stop_ts_capture(struct budget *budget)
{
	dprintk(2, "budget: %p\n", budget);

	saa7146_write(budget->dev, MC1, MASK_20);	// DMA3 off
	SAA7146_IER_DISABLE(budget->dev, MASK_10);
	return 0;
}

static int start_ts_capture(struct budget *budget)
{
	struct saa7146_dev *dev = budget->dev;

	dprintk(2, "budget: %p\n", budget);

	if (!budget->feeding || !budget->fe_synced)
		return 0;

	saa7146_write(dev, MC1, MASK_20);	// DMA3 off

	memset(budget->grabbing, 0x00, budget->buffer_size);

	saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000));

	budget->ttbp = 0;

	/*
	 *  Signal path on the Activy:
	 *
	 *  tuner -> SAA7146 port A -> SAA7146 BRS -> SAA7146 DMA3 -> memory
	 *
	 *  Since the tuner feeds 204 bytes packets into the SAA7146,
	 *  DMA3 is configured to strip the trailing 16 FEC bytes:
	 *      Pitch: 188, NumBytes3: 188, NumLines3: 1024
	 */

	switch(budget->card->type) {
	case BUDGET_FS_ACTIVY:
		saa7146_write(dev, DD1_INIT, 0x04000000);
		saa7146_write(dev, MC2, (MASK_09 | MASK_25));
		saa7146_write(dev, BRS_CTRL, 0x00000000);
		break;
	case BUDGET_PATCH:
		saa7146_write(dev, DD1_INIT, 0x00000200);
		saa7146_write(dev, MC2, (MASK_10 | MASK_26));
		saa7146_write(dev, BRS_CTRL, 0x60000000);
		break;
	case BUDGET_CIN1200C_MK3:
	case BUDGET_KNC1C_MK3:
	case BUDGET_KNC1CP_MK3:
		if (budget->video_port == BUDGET_VIDEO_PORTA) {
			saa7146_write(dev, DD1_INIT, 0x06000200);
			saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
			saa7146_write(dev, BRS_CTRL, 0x00000000);
		} else {
			saa7146_write(dev, DD1_INIT, 0x00000600);
			saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
			saa7146_write(dev, BRS_CTRL, 0x60000000);
		}
		break;
	default:
		if (budget->video_port == BUDGET_VIDEO_PORTA) {
			saa7146_write(dev, DD1_INIT, 0x06000200);
			saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
			saa7146_write(dev, BRS_CTRL, 0x00000000);
		} else {
			saa7146_write(dev, DD1_INIT, 0x02000600);
			saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
			saa7146_write(dev, BRS_CTRL, 0x60000000);
		}
	}

	saa7146_write(dev, MC2, (MASK_08 | MASK_24));
	mdelay(10);

	saa7146_write(dev, BASE_ODD3, 0);
	if (budget->buffer_size > budget->buffer_height * budget->buffer_width) {
		// using odd/even buffers
		saa7146_write(dev, BASE_EVEN3, budget->buffer_height * budget->buffer_width);
	} else {
		// using a single buffer
		saa7146_write(dev, BASE_EVEN3, 0);
	}
	saa7146_write(dev, PROT_ADDR3, budget->buffer_size);
	saa7146_write(dev, BASE_PAGE3, budget->pt.dma | ME1 | 0x90);

	saa7146_write(dev, PITCH3, budget->buffer_width);
	saa7146_write(dev, NUM_LINE_BYTE3,
			(budget->buffer_height << 16) | budget->buffer_width);

	saa7146_write(dev, MC2, (MASK_04 | MASK_20));

	SAA7146_ISR_CLEAR(budget->dev, MASK_10);	/* VPE */
	SAA7146_IER_ENABLE(budget->dev, MASK_10);	/* VPE */
	saa7146_write(dev, MC1, (MASK_04 | MASK_20));	/* DMA3 on */

	return 0;
}

static int budget_read_fe_status(struct dvb_frontend *fe, fe_status_t *status)
{
	struct budget *budget = (struct budget *) fe->dvb->priv;
	int synced;
	int ret;

	if (budget->read_fe_status)
		ret = budget->read_fe_status(fe, status);
	else
		ret = -EINVAL;

	if (!ret) {
		synced = (*status & FE_HAS_LOCK);
		if (synced != budget->fe_synced) {
			budget->fe_synced = synced;
			spin_lock(&budget->feedlock);
			if (synced)
				start_ts_capture(budget);
			else
				stop_ts_capture(budget);
			spin_unlock(&budget->feedlock);
		}
	}
	return ret;
}

static void vpeirq(unsigned long data)
{
	struct budget *budget = (struct budget *) data;
	u8 *mem = (u8 *) (budget->grabbing);
	u32 olddma = budget->ttbp;
	u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
	u32 count;

	/* Ensure streamed PCI data is synced to CPU */
	pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE);

	/* nearest lower position divisible by 188 */
	newdma -= newdma % 188;

	if (newdma >= budget->buffer_size)
		return;

	budget->ttbp = newdma;

	if (budget->feeding == 0 || newdma == olddma)
		return;

	if (newdma > olddma) {	/* no wraparound, dump olddma..newdma */
		count = newdma - olddma;
		dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188);
	} else {		/* wraparound, dump olddma..buflen and 0..newdma */
		count = budget->buffer_size - olddma;
		dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188);
		count += newdma;
		dvb_dmx_swfilter_packets(&budget->demux, mem, newdma / 188);
	}

	if (count > budget->buffer_warning_threshold)
		budget->buffer_warnings++;

	if (budget->buffer_warnings && time_after(jiffies, budget->buffer_warning_time)) {
		printk("%s %s: used %d times >80%% of buffer (%u bytes now)\n",
			budget->dev->name, __FUNCTION__, budget->buffer_warnings, count);
		budget->buffer_warning_time = jiffies + BUFFER_WARNING_WAIT;
		budget->buffer_warnings = 0;
	}
}


int ttpci_budget_debiread(struct budget *budget, u32 config, int addr, int count,
			  int uselocks, int nobusyloop)
{
	struct saa7146_dev *saa = budget->dev;
	int result = 0;
	unsigned long flags = 0;

	if (count > 4 || count <= 0)
		return 0;

	if (uselocks)
		spin_lock_irqsave(&budget->debilock, flags);

	if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
		if (uselocks)
			spin_unlock_irqrestore(&budget->debilock, flags);
		return result;
	}

	saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x10000 | (addr & 0xffff));
	saa7146_write(saa, DEBI_CONFIG, config);
	saa7146_write(saa, DEBI_PAGE, 0);
	saa7146_write(saa, MC2, (2 << 16) | 2);

	if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
		if (uselocks)
			spin_unlock_irqrestore(&budget->debilock, flags);
		return result;
	}

	result = saa7146_read(saa, DEBI_AD);
	result &= (0xffffffffUL >> ((4 - count) * 8));

	if (uselocks)
		spin_unlock_irqrestore(&budget->debilock, flags);

	return result;
}

int ttpci_budget_debiwrite(struct budget *budget, u32 config, int addr,
			   int count, u32 value, int uselocks, int nobusyloop)
{
	struct saa7146_dev *saa = budget->dev;
	unsigned long flags = 0;
	int result;

	if (count > 4 || count <= 0)
		return 0;

	if (uselocks)
		spin_lock_irqsave(&budget->debilock, flags);

	if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
		if (uselocks)
			spin_unlock_irqrestore(&budget->debilock, flags);
		return result;
	}

	saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x00000 | (addr & 0xffff));
	saa7146_write(saa, DEBI_CONFIG, config);
	saa7146_write(saa, DEBI_PAGE, 0);
	saa7146_write(saa, DEBI_AD, value);
	saa7146_write(saa, MC2, (2 << 16) | 2);

	if ((result = saa7146_wait_for_debi_done(saa, nobusyloop)) < 0) {
		if (uselocks)
			spin_unlock_irqrestore(&budget->debilock, flags);
		return result;
	}

	if (uselocks)