📄 sync_serial.c
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reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg); reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg); cfg.en = regk_sser_yes; tr_cfg.tr_en = port->output; rec_cfg.rec_en = port->input; REG_WR(sser, port->regi_sser, rw_cfg, cfg); REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg); REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg); port->started = 1; } if (file->f_flags & O_NONBLOCK) { spin_lock_irqsave(&port->lock, flags); if (!port->tr_running) { if (!port->use_dma) { reg_sser_rw_intr_mask intr_mask; intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask); /* Start sender by writing data */ send_word(port); /* and enable transmitter ready IRQ */ intr_mask.trdy = 1; REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask); } else { start_dma(port, (unsigned char* volatile )port->outp, c); } } spin_unlock_irqrestore(&port->lock, flags); DEBUGWRITE(printk("w d%d c %lu NB\n", port->port_nbr, count)); return count; } /* Sleep until all sent */ add_wait_queue(&port->out_wait_q, &wait); set_current_state(TASK_INTERRUPTIBLE); spin_lock_irqsave(&port->lock, flags); if (!port->tr_running) { if (!port->use_dma) { reg_sser_rw_intr_mask intr_mask; intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask); /* Start sender by writing data */ send_word(port); /* and enable transmitter ready IRQ */ intr_mask.trdy = 1; REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask); } else { start_dma(port, port->outp, c); } } spin_unlock_irqrestore(&port->lock, flags); schedule(); set_current_state(TASK_RUNNING); remove_wait_queue(&port->out_wait_q, &wait); if (signal_pending(current)) { return -EINTR; } DEBUGWRITE(printk("w d%d c %lu\n", port->port_nbr, count)); return count;}static ssize_t sync_serial_read(struct file * file, char * buf, size_t count, loff_t *ppos){ int dev = iminor(file->f_path.dentry->d_inode); int avail; sync_port *port; unsigned char* start; unsigned char* end; unsigned long flags; if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled) { DEBUG(printk("Invalid minor %d\n", dev)); return -ENODEV; } port = &ports[dev]; DEBUGREAD(printk("R%d c %d ri %lu wi %lu /%lu\n", dev, count, port->readp - port->flip, port->writep - port->flip, port->in_buffer_size)); if (!port->started) { reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg); reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg); reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg); cfg.en = regk_sser_yes; tr_cfg.tr_en = regk_sser_yes; rec_cfg.rec_en = regk_sser_yes; REG_WR(sser, port->regi_sser, rw_cfg, cfg); REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg); REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg); port->started = 1; } /* Calculate number of available bytes */ /* Save pointers to avoid that they are modified by interrupt */ spin_lock_irqsave(&port->lock, flags); start = (unsigned char*)port->readp; /* cast away volatile */ end = (unsigned char*)port->writep; /* cast away volatile */ spin_unlock_irqrestore(&port->lock, flags); while ((start == end) && !port->full) /* No data */ { if (file->f_flags & O_NONBLOCK) { return -EAGAIN; } interruptible_sleep_on(&port->in_wait_q); if (signal_pending(current)) { return -EINTR; } spin_lock_irqsave(&port->lock, flags); start = (unsigned char*)port->readp; /* cast away volatile */ end = (unsigned char*)port->writep; /* cast away volatile */ spin_unlock_irqrestore(&port->lock, flags); } /* Lazy read, never return wrapped data. */ if (port->full) avail = port->in_buffer_size; else if (end > start) avail = end - start; else avail = port->flip + port->in_buffer_size - start; count = count > avail ? avail : count; if (copy_to_user(buf, start, count)) return -EFAULT; /* Disable interrupts while updating readp */ spin_lock_irqsave(&port->lock, flags); port->readp += count; if (port->readp >= port->flip + port->in_buffer_size) /* Wrap? */ port->readp = port->flip; port->full = 0; spin_unlock_irqrestore(&port->lock, flags); DEBUGREAD(printk("r %d\n", count)); return count;}static void send_word(sync_port* port){ reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg); reg_sser_rw_tr_data tr_data = {0}; switch(tr_cfg.sample_size) { case 8: port->out_count--; tr_data.data = *port->outp++; REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) port->outp = port->out_buffer; break; case 12: { int data = (*port->outp++) << 8; data |= *port->outp++; port->out_count-=2; tr_data.data = data; REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) port->outp = port->out_buffer; } break; case 16: port->out_count-=2; tr_data.data = *(unsigned short *)port->outp; REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); port->outp+=2; if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) port->outp = port->out_buffer; break; case 24: port->out_count-=3; tr_data.data = *(unsigned short *)port->outp; REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); port->outp+=2; tr_data.data = *port->outp++; REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) port->outp = port->out_buffer; break; case 32: port->out_count-=4; tr_data.data = *(unsigned short *)port->outp; REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); port->outp+=2; tr_data.data = *(unsigned short *)port->outp; REG_WR(sser, port->regi_sser, rw_tr_data, tr_data); port->outp+=2; if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) port->outp = port->out_buffer; break; }}static void start_dma(struct sync_port* port, const char* data, int count){ port->tr_running = 1; port->out_descr.buf = (char*)virt_to_phys((char*)data); port->out_descr.after = port->out_descr.buf + count; port->out_descr.eol = port->out_descr.intr = 1; port->out_context.saved_data = (dma_descr_data*)virt_to_phys(&port->out_descr); port->out_context.saved_data_buf = port->out_descr.buf; DMA_START_CONTEXT(port->regi_dmaout, virt_to_phys((char*)&port->out_context)); DEBUGTXINT(printk("dma %08lX c %d\n", (unsigned long)data, count));}static void start_dma_in(sync_port* port){ int i; char* buf; port->writep = port->flip; if (port->writep > port->flip + port->in_buffer_size) { panic("Offset too large in sync serial driver\n"); return; } buf = (char*)virt_to_phys(port->in_buffer); for (i = 0; i < NUM_IN_DESCR; i++) { port->in_descr[i].buf = buf; port->in_descr[i].after = buf + port->inbufchunk; port->in_descr[i].intr = 1; port->in_descr[i].next = (dma_descr_data*)virt_to_phys(&port->in_descr[i+1]); port->in_descr[i].buf = buf; buf += port->inbufchunk; } /* Link the last descriptor to the first */ port->in_descr[i-1].next = (dma_descr_data*)virt_to_phys(&port->in_descr[0]); port->in_descr[i-1].eol = regk_sser_yes; port->next_rx_desc = &port->in_descr[0]; port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR - 1]; port->in_context.saved_data = (dma_descr_data*)virt_to_phys(&port->in_descr[0]); port->in_context.saved_data_buf = port->in_descr[0].buf; DMA_START_CONTEXT(port->regi_dmain, virt_to_phys(&port->in_context));}#ifdef SYNC_SER_DMAstatic irqreturn_t tr_interrupt(int irq, void *dev_id, struct pt_regs * regs){ reg_dma_r_masked_intr masked; reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes}; int i; struct dma_descr_data *descr; unsigned int sentl; int found = 0; for (i = 0; i < NUMBER_OF_PORTS; i++) { sync_port *port = &ports[i]; if (!port->enabled || !port->use_dma ) continue; masked = REG_RD(dma, port->regi_dmaout, r_masked_intr); if (masked.data) /* IRQ active for the port? */ { found = 1; /* Clear IRQ */ REG_WR(dma, port->regi_dmaout, rw_ack_intr, ack_intr); descr = &port->out_descr; sentl = descr->after - descr->buf; port->out_count -= sentl; port->outp += sentl; if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE) port->outp = port->out_buffer; if (port->out_count) { int c; c = port->out_buffer + OUT_BUFFER_SIZE - port->outp; if (c > port->out_count) c = port->out_count; DEBUGTXINT(printk("tx_int DMAWRITE %i %i\n", sentl, c)); start_dma(port, port->outp, c); } else { DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl)); port->tr_running = 0; } wake_up_interruptible(&port->out_wait_q); /* wake up the waiting process */ } } return IRQ_RETVAL(found);} /* tr_interrupt */static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs){ reg_dma_r_masked_intr masked; reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes}; int i; int found = 0; for (i = 0; i < NUMBER_OF_PORTS; i++) { sync_port *port = &ports[i]; if (!port->enabled || !port->use_dma ) continue; masked = REG_RD(dma, port->regi_dmain, r_masked_intr); if (masked.data) /* Descriptor interrupt */ { found = 1; while (REG_RD(dma, port->regi_dmain, rw_data) != virt_to_phys(port->next_rx_desc)) { if (port->writep + port->inbufchunk > port->flip + port->in_buffer_size) { int first_size = port->flip + port->in_buffer_size - port->writep; memcpy((char*)port->writep, phys_to_virt((unsigned)port->next_rx_desc->buf), first_size); memcpy(port->flip, phys_to_virt((unsigned)port->next_rx_desc->buf+first_size), port->inbufchunk - first_size); port->writep = port->flip + port->inbufchunk - first_size; } else { memcpy((char*)port->writep, phys_to_virt((unsigned)port->next_rx_desc->buf), port->inbufchunk); port->writep += port->inbufchunk; if (port->writep >= port->flip + port->in_buffer_size) port->writep = port->flip; } if (port->writep == port->readp) { port->full = 1; } port->next_rx_desc->eol = 0; port->prev_rx_desc->eol = 1; port->prev_rx_desc = phys_to_virt((unsigned)port->next_rx_desc); port->next_rx_desc = phys_to_virt((unsigned)port->next_rx_desc->next); wake_up_interruptible(&port->in_wait_q); /* wake up the waiting process */ DMA_CONTINUE(port->regi_dmain); REG_WR(dma, port->regi_dmain, rw_ack_intr, ack_intr); } } } return IRQ_RETVAL(found);} /* rx_interrupt */#endif /* SYNC_SER_DMA */#ifdef SYNC_SER_MANUALstatic irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs){ int i; int found = 0; reg_sser_r_masked_intr masked; for (i = 0; i < NUMBER_OF_PORTS; i++) { sync_port* port = &ports[i]; if (!port->enabled || port->use_dma) { continue; } masked = REG_RD(sser, port->regi_sser, r_masked_intr); if (masked.rdav) /* Data received? */ { reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg); reg_sser_r_rec_data data = REG_RD(sser, port->regi_sser, r_rec_data); found = 1; /* Read data */ switch(rec_cfg.sample_size) { case 8: *port->writep++ = data.data & 0xff; break; case 12: *port->writep = (data.data & 0x0ff0) >> 4; *(port->writep + 1) = data.data & 0x0f; port->writep+=2; break; case 16: *(unsigned short*)port->writep = data.data; port->writep+=2; break; case 24: *(unsigned int*)port->writep = data.data; port->writep+=3; break; case 32: *(unsigned int*)port->writep = data.data; port->writep+=4; break; } if (port->writep >= port->flip + port->in_buffer_size) /* Wrap? */ port->writep = port->flip; if (port->writep == port->readp) { /* receive buffer overrun, discard oldest data */ port->readp++; if (port->readp >= port->flip + port->in_buffer_size) /* Wrap? */ port->readp = port->flip; } if (sync_data_avail(port) >= port->inbufchunk) wake_up_interruptible(&port->in_wait_q); /* Wake up application */ } if (masked.trdy) /* Transmitter ready? */ { found = 1; if (port->out_count > 0) /* More data to send */ send_word(port); else /* transmission finished */ { reg_sser_rw_intr_mask intr_mask; intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask); intr_mask.trdy = 0; REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask); wake_up_interruptible(&port->out_wait_q); /* Wake up application */ } } } return IRQ_RETVAL(found);}#endifmodule_init(etrax_sync_serial_init);
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