📄 multi_1.fit.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--A1L01 is m1_out~72 at LC5_C34
--operation mode is normal
A1L01 = m1_x & m1_y[0];
--A1L81 is m1_out~80 at LC5_C34
--operation mode is normal
A1L81 = m1_x & m1_y[0];
--A1L11 is m1_out~73 at LC3_C34
--operation mode is normal
A1L11 = m1_x & m1_y[1];
--A1L91 is m1_out~81 at LC3_C34
--operation mode is normal
A1L91 = m1_x & m1_y[1];
--A1L21 is m1_out~74 at LC2_D33
--operation mode is normal
A1L21 = m1_x & m1_y[2];
--A1L02 is m1_out~82 at LC2_D33
--operation mode is normal
A1L02 = m1_x & m1_y[2];
--A1L31 is m1_out~75 at LC2_C28
--operation mode is normal
A1L31 = m1_x & m1_y[3];
--A1L12 is m1_out~83 at LC2_C28
--operation mode is normal
A1L12 = m1_x & m1_y[3];
--A1L41 is m1_out~76 at LC4_C34
--operation mode is normal
A1L41 = m1_x & m1_y[4];
--A1L22 is m1_out~84 at LC4_C34
--operation mode is normal
A1L22 = m1_x & m1_y[4];
--A1L51 is m1_out~77 at LC1_C34
--operation mode is normal
A1L51 = m1_x & m1_y[5];
--A1L32 is m1_out~85 at LC1_C34
--operation mode is normal
A1L32 = m1_x & m1_y[5];
--A1L61 is m1_out~78 at LC7_C27
--operation mode is normal
A1L61 = m1_x & m1_y[6];
--A1L42 is m1_out~86 at LC7_C27
--operation mode is normal
A1L42 = m1_x & m1_y[6];
--A1L71 is m1_out~79 at LC8_C22
--operation mode is normal
A1L71 = m1_x & m1_y[7];
--A1L52 is m1_out~87 at LC8_C22
--operation mode is normal
A1L52 = m1_x & m1_y[7];
--m1_x is m1_x at PIN_126
--operation mode is input
m1_x = INPUT();
--m1_y[0] is m1_y[0] at PIN_124
--operation mode is input
m1_y[0] = INPUT();
--m1_y[1] is m1_y[1] at PIN_54
--operation mode is input
m1_y[1] = INPUT();
--m1_y[2] is m1_y[2] at PIN_56
--operation mode is input
m1_y[2] = INPUT();
--m1_y[3] is m1_y[3] at PIN_125
--operation mode is input
m1_y[3] = INPUT();
--m1_y[4] is m1_y[4] at PIN_55
--operation mode is input
m1_y[4] = INPUT();
--m1_y[5] is m1_y[5] at PIN_97
--operation mode is input
m1_y[5] = INPUT();
--m1_y[6] is m1_y[6] at PIN_96
--operation mode is input
m1_y[6] = INPUT();
--m1_y[7] is m1_y[7] at PIN_11
--operation mode is input
m1_y[7] = INPUT();
--m1_out[0] is m1_out[0] at PIN_17
--operation mode is output
m1_out[0] = OUTPUT(A1L01);
--m1_out[1] is m1_out[1] at PIN_13
--operation mode is output
m1_out[1] = OUTPUT(A1L11);
--m1_out[2] is m1_out[2] at PIN_141
--operation mode is output
m1_out[2] = OUTPUT(A1L21);
--m1_out[3] is m1_out[3] at PIN_12
--operation mode is output
m1_out[3] = OUTPUT(A1L31);
--m1_out[4] is m1_out[4] at PIN_14
--operation mode is output
m1_out[4] = OUTPUT(A1L41);
--m1_out[5] is m1_out[5] at PIN_142
--operation mode is output
m1_out[5] = OUTPUT(A1L51);
--m1_out[6] is m1_out[6] at PIN_18
--operation mode is output
m1_out[6] = OUTPUT(A1L61);
--m1_out[7] is m1_out[7] at PIN_95
--operation mode is output
m1_out[7] = OUTPUT(A1L71);
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