b_bcd.tan.rpt

8位十进制乘法器

; Device Name                                           ; EP1K30TC144-3      ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; Off                ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clk             ;                    ; User Pin ; NONE             ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk'                                                                                                                                                                                                                                                                                                            ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------+---------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                    ; To                                                      ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------+---------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] ; out_a[3]                                                ; clk        ; clk      ; None                        ; None                      ; 6.000 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] ; out_a[2]                                                ; clk        ; clk      ; None                        ; None                      ; 6.000 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[0]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[1]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[2]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[3]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[4]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[5]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[6]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[7]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[8]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[9]                                                 ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[10]                                                ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[11]                                                ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[12]                                                ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; in_a[13]                                                ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] ; out_a[15]                                               ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[2] ; out_a[15]                                               ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;
; N/A                                     ; 142.86 MHz ( period = 7.000 ns )                    ; lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] ; out_a[14]                                               ; clk        ; clk      ; None                        ; None                      ; 5.900 ns                ;