📄 multi_8x8.tan.qmsg

📁 8位十进制乘法器
💻 QMSG
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{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "clk_b0 register register cnt10:u4\|cqi\[3\] cnt10:u4\|cqi\[3\] 200.0 MHz Internal " "Info: Clock \"clk_b0\" Internal fmax is restricted to 200.0 MHz between source register \"cnt10:u4\|cqi\[3\]\" and destination register \"cnt10:u4\|cqi\[3\]\"" { { "Info" "ITDB_CLOCK_TCH_TCL" "2.5 ns 2.5 ns 5.0 ns " "Info: fmax restricted to Clock High delay (2.5 ns) plus Clock Low delay (2.5 ns) : restricted to 5.0 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.400 ns + Longest register register " "Info: + Longest register to register delay is 1.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns cnt10:u4\|cqi\[3\] 1 REG LC4_B1 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC4_B1; Fanout = 5; REG Node = 'cnt10:u4\|cqi\[3\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "../cnt10/cnt10.vhd" "" { Text "F:/8位十进制乘法器/cnt10/cnt10.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.100 ns) 1.400 ns cnt10:u4\|cqi\[3\] 2 REG LC4_B1 5 " "Info: 2: + IC(0.300 ns) + CELL(1.100 ns) = 1.400 ns; Loc. = LC4_B1; Fanout = 5; REG Node = 'cnt10:u4\|cqi\[3\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "1.400 ns" { cnt10:u4|cqi[3] cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "../cnt10/cnt10.vhd" "" { Text "F:/8位十进制乘法器/cnt10/cnt10.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.100 ns 78.57 % " "Info: Total cell delay = 1.100 ns ( 78.57 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.300 ns 21.43 % " "Info: Total interconnect delay = 0.300 ns ( 21.43 % )" {  } {  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "1.400 ns" { cnt10:u4|cqi[3] cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "1.400 ns" { cnt10:u4|cqi[3] cnt10:u4|cqi[3] } { 0.000ns 0.300ns } { 0.000ns 1.100ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_b0 destination 9.500 ns + Shortest register " "Info: + Shortest clock path from clock \"clk_b0\" to destination register is 9.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns clk_b0 1 CLK PIN_13 4 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = PIN_13; Fanout = 4; CLK Node = 'clk_b0'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { clk_b0 } "NODE_NAME" } "" } } { "multi_8x8.vhd" "" { Text "F:/8位十进制乘法器/multi_8x8/multi_8x8.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.600 ns) + CELL(0.000 ns) 9.500 ns cnt10:u4\|cqi\[3\] 2 REG LC4_B1 5 " "Info: 2: + IC(4.600 ns) + CELL(0.000 ns) = 9.500 ns; Loc. = LC4_B1; Fanout = 5; REG Node = 'cnt10:u4\|cqi\[3\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "4.600 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "../cnt10/cnt10.vhd" "" { Text "F:/8位十进制乘法器/cnt10/cnt10.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.900 ns 51.58 % " "Info: Total cell delay = 4.900 ns ( 51.58 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.600 ns 48.42 % " "Info: Total interconnect delay = 4.600 ns ( 48.42 % )" {  } {  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "9.500 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "9.500 ns" { clk_b0 clk_b0~out cnt10:u4|cqi[3] } { 0.000ns 0.000ns 4.600ns } { 0.000ns 4.900ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_b0 source 9.500 ns - Longest register " "Info: - Longest clock path from clock \"clk_b0\" to source register is 9.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns clk_b0 1 CLK PIN_13 4 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = PIN_13; Fanout = 4; CLK Node = 'clk_b0'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { clk_b0 } "NODE_NAME" } "" } } { "multi_8x8.vhd" "" { Text "F:/8位十进制乘法器/multi_8x8/multi_8x8.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.600 ns) + CELL(0.000 ns) 9.500 ns cnt10:u4\|cqi\[3\] 2 REG LC4_B1 5 " "Info: 2: + IC(4.600 ns) + CELL(0.000 ns) = 9.500 ns; Loc. = LC4_B1; Fanout = 5; REG Node = 'cnt10:u4\|cqi\[3\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "4.600 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "../cnt10/cnt10.vhd" "" { Text "F:/8位十进制乘法器/cnt10/cnt10.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.900 ns 51.58 % " "Info: Total cell delay = 4.900 ns ( 51.58 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.600 ns 48.42 % " "Info: Total interconnect delay = 4.600 ns ( 48.42 % )" {  } {  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "9.500 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "9.500 ns" { clk_b0 clk_b0~out cnt10:u4|cqi[3] } { 0.000ns 0.000ns 4.600ns } { 0.000ns 4.900ns 0.000ns } } }  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "9.500 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "9.500 ns" { clk_b0 clk_b0~out cnt10:u4|cqi[3] } { 0.000ns 0.000ns 4.600ns } { 0.000ns 4.900ns 0.000ns } } } { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "9.500 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "9.500 ns" { clk_b0 clk_b0~out cnt10:u4|cqi[3] } { 0.000ns 0.000ns 4.600ns } { 0.000ns 4.900ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" {  } { { "../cnt10/cnt10.vhd" "" { Text "F:/8位十进制乘法器/cnt10/cnt10.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "../cnt10/cnt10.vhd" "" { Text "F:/8位十进制乘法器/cnt10/cnt10.vhd" 11 -1 0 } }  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "1.400 ns" { cnt10:u4|cqi[3] cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "1.400 ns" { cnt10:u4|cqi[3] cnt10:u4|cqi[3] } { 0.000ns 0.300ns } { 0.000ns 1.100ns } } } { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "9.500 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "9.500 ns" { clk_b0 clk_b0~out cnt10:u4|cqi[3] } { 0.000ns 0.000ns 4.600ns } { 0.000ns 4.900ns 0.000ns } } } { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "9.500 ns" { clk_b0 cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "9.500 ns" { clk_b0 clk_b0~out cnt10:u4|cqi[3] } { 0.000ns 0.000ns 4.600ns } { 0.000ns 4.900ns 0.000ns } } }  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { cnt10:u4|cqi[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { cnt10:u4|cqi[3] } {  } {  } } } { "../cnt10/cnt10.vhd" "" { Text "F:/8位十进制乘法器/cnt10/cnt10.vhd" 11 -1 0 } }  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register B_BCD:u11\|lpm_counter:i_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] register B_BCD:u11\|out_a\[11\] 100.0 MHz 10.0 ns Internal " "Info: Clock \"clk\" has Internal fmax of 100.0 MHz between source register \"B_BCD:u11\|lpm_counter:i_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]\" and destination register \"B_BCD:u11\|out_a\[11\]\" (period= 10.0 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.900 ns + Longest register register " "Info: + Longest register to register delay is 8.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns B_BCD:u11\|lpm_counter:i_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 1 REG LC6_C16 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC6_C16; Fanout = 5; REG Node = 'B_BCD:u11\|lpm_counter:i_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.700 ns) 2.000 ns B_BCD:u11\|add~301 2 COMB LC2_C16 4 " "Info: 2: + IC(0.300 ns) + CELL(1.700 ns) = 2.000 ns; Loc. = LC2_C16; Fanout = 4; COMB Node = 'B_BCD:u11\|add~301'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "2.000 ns" { B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] B_BCD:u11|add~301 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(1.600 ns) 5.600 ns B_BCD:u11\|out_a~2857 3 COMB LC1_C32 4 " "Info: 3: + IC(2.000 ns) + CELL(1.600 ns) = 5.600 ns; Loc. = LC1_C32; Fanout = 4; COMB Node = 'B_BCD:u11\|out_a~2857'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "3.600 ns" { B_BCD:u11|add~301 B_BCD:u11|out_a~2857 } "NODE_NAME" } "" } } { "../B_BCD/B_BCD.vhd" "" { Text "F:/8位十进制乘法器/B_BCD/B_BCD.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.300 ns) + CELL(1.000 ns) 8.900 ns B_BCD:u11\|out_a\[11\] 4 REG LC8_C8 5 " "Info: 4: + IC(2.300 ns) + CELL(1.000 ns) = 8.900 ns; Loc. = LC8_C8; Fanout = 5; REG Node = 'B_BCD:u11\|out_a\[11\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "3.300 ns" { B_BCD:u11|out_a~2857 B_BCD:u11|out_a[11] } "NODE_NAME" } "" } } { "../B_BCD/B_BCD.vhd" "" { Text "F:/8位十进制乘法器/B_BCD/B_BCD.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.300 ns 48.31 % " "Info: Total cell delay = 4.300 ns ( 48.31 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.600 ns 51.69 % " "Info: Total interconnect delay = 4.600 ns ( 51.69 % )" {  } {  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "8.900 ns" { B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] B_BCD:u11|add~301 B_BCD:u11|out_a~2857 B_BCD:u11|out_a[11] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "8.900 ns" { B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] B_BCD:u11|add~301 B_BCD:u11|out_a~2857 B_BCD:u11|out_a[11] } { 0.000ns 0.300ns 2.000ns 2.300ns } { 0.000ns 1.700ns 1.600ns 1.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.400 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns clk 1 CLK PIN_126 69 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_126; Fanout = 69; CLK Node = 'clk'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { clk } "NODE_NAME" } "" } } { "multi_8x8.vhd" "" { Text "F:/8位十进制乘法器/multi_8x8/multi_8x8.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns B_BCD:u11\|out_a\[11\] 2 REG LC8_C8 5 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC8_C8; Fanout = 5; REG Node = 'B_BCD:u11\|out_a\[11\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "0.400 ns" { clk B_BCD:u11|out_a[11] } "NODE_NAME" } "" } } { "../B_BCD/B_BCD.vhd" "" { Text "F:/8位十进制乘法器/B_BCD/B_BCD.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns 83.33 % " "Info: Total cell delay = 2.000 ns ( 83.33 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns 16.67 % " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" {  } {  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "2.400 ns" { clk B_BCD:u11|out_a[11] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.400 ns" { clk clk~out B_BCD:u11|out_a[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.400 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns clk 1 CLK PIN_126 69 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_126; Fanout = 69; CLK Node = 'clk'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { clk } "NODE_NAME" } "" } } { "multi_8x8.vhd" "" { Text "F:/8位十进制乘法器/multi_8x8/multi_8x8.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.000 ns) 2.400 ns B_BCD:u11\|lpm_counter:i_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 2 REG LC6_C16 5 " "Info: 2: + IC(0.400 ns) + CELL(0.000 ns) = 2.400 ns; Loc. = LC6_C16; Fanout = 5; REG Node = 'B_BCD:u11\|lpm_counter:i_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "0.400 ns" { clk B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.000 ns 83.33 % " "Info: Total cell delay = 2.000 ns ( 83.33 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.400 ns 16.67 % " "Info: Total interconnect delay = 0.400 ns ( 16.67 % )" {  } {  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "2.400 ns" { clk B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.400 ns" { clk clk~out B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "2.400 ns" { clk B_BCD:u11|out_a[11] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.400 ns" { clk clk~out B_BCD:u11|out_a[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "2.400 ns" { clk B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.400 ns" { clk clk~out B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "../B_BCD/B_BCD.vhd" "" { Text "F:/8位十进制乘法器/B_BCD/B_BCD.vhd" 13 -1 0 } }  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "8.900 ns" { B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] B_BCD:u11|add~301 B_BCD:u11|out_a~2857 B_BCD:u11|out_a[11] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "8.900 ns" { B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] B_BCD:u11|add~301 B_BCD:u11|out_a~2857 B_BCD:u11|out_a[11] } { 0.000ns 0.300ns 2.000ns 2.300ns } { 0.000ns 1.700ns 1.600ns 1.000ns } } } { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "2.400 ns" { clk B_BCD:u11|out_a[11] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.400 ns" { clk clk~out B_BCD:u11|out_a[11] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } } { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "2.400 ns" { clk B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.400 ns" { clk clk~out B_BCD:u11|lpm_counter:i_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns } { 0.000ns 2.000ns 0.000ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "reg_16:u10\|lpm_counter:i_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\] clr clk 10.000 ns register " "Info: tsu for register \"reg_16:u10\|lpm_counter:i_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\]\" (data pin = \"clr\", clock pin = \"clk\") is 10.000 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.800 ns + Longest pin register " "Info: + Longest pin to register delay is 11.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.900 ns) 4.900 ns clr 1 PIN PIN_12 26 " "Info: 1: + IC(0.000 ns) + CELL(4.900 ns) = 4.900 ns; Loc. = PIN_12; Fanout = 26; PIN Node = 'clr'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "" { clr } "NODE_NAME" } "" } } { "multi_8x8.vhd" "" { Text "F:/8位十进制乘法器/multi_8x8/multi_8x8.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.100 ns) + CELL(1.400 ns) 10.400 ns reg_16:u10\|lpm_counter:i_rtl_1\|alt_counter_f10ke:wysi_counter\|counter_cell\[3\]~0 2 COMB LC7_E17 5 " "Info: 2: + IC(4.100 ns) + CELL(1.400 ns) = 10.400 ns; Loc. = LC7_E17; Fanout = 5; COMB Node = 'reg_16:u10\|lpm_counter:i_rtl_1\|alt_counter_f10ke:wysi_counter\|counter_cell\[3\]~0'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "5.500 ns" { clr reg_16:u10|lpm_counter:i_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[3]~0 } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.100 ns) 11.800 ns reg_16:u10\|lpm_counter:i_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\] 3 REG LC3_E17 5 " "Info: 3: + IC(0.300 ns) + CELL(1.100 ns) = 11.800 ns; Loc. = LC3_E17; Fanout = 5; REG Node = 'reg_16:u10\|lpm_counter:i_rtl_1\|alt_counter_f10ke:wysi_counter\|q\[2\]'" {  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "1.400 ns" { reg_16:u10|lpm_counter:i_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[3]~0 reg_16:u10|lpm_counter:i_rtl_1|alt_counter_f10ke:wysi_counter|q[2] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "e:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "7.400 ns 62.71 % " "Info: Total cell delay = 7.400 ns ( 62.71 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.400 ns 37.29 % " "Info: Total interconnect delay = 4.400 ns ( 37.29 % )" {  } {  } 0}  } { { "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" "" { Report "F:/8位十进制乘法器/multi_8x8/db/multi_8x8_cmp.qrpt" Compiler "multi_8x8" "UNKNOWN" "V1" "F:/8位十进制乘法器/multi_8x8/db/multi_8x8.quartus_db" { Floorplan "F:/8位十进制乘法器/multi_8x8/" "" "11.800 ns" { clr reg_16:u10|lpm_counter:i_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[3]~0 reg_16:u10|lpm_counter:i_rtl_1|alt_counter_f10ke:wysi_counter|q[2] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "11.800 ns" { clr clr~out reg_16:u10|lpm_counter:i_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[3]~0 reg_16:u10|lpm_counter:i_rtl_1|alt_counter_f10ke:wysi_counter|q[2] } { 0.000ns 0.000ns 4.100ns 0.300ns } { 0.000ns 4.900ns 1.400ns 1.100ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" {  } { { "alt_counter_
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