multi_8x8.tan.rpt
来自「8位十进制乘法器」· RPT 代码 · 共 297 行 · 第 1/5 页
RPT
297 行
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[3] ; cnt10:u2|cqi[3] ; clk_a0 ; clk_a0 ; None ; None ; 1.400 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[2] ; cnt10:u2|cqi[1] ; clk_a0 ; clk_a0 ; None ; None ; 1.400 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[0] ; cnt10:u2|cqi[2] ; clk_a0 ; clk_a0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[2] ; cnt10:u2|cqi[2] ; clk_a0 ; clk_a0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[1] ; cnt10:u2|cqi[3] ; clk_a0 ; clk_a0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[2] ; cnt10:u2|cqi[3] ; clk_a0 ; clk_a0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[1] ; cnt10:u2|cqi[1] ; clk_a0 ; clk_a0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[3] ; cnt10:u2|cqi[1] ; clk_a0 ; clk_a0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[1] ; cnt10:u2|cqi[2] ; clk_a0 ; clk_a0 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[0] ; cnt10:u2|cqi[3] ; clk_a0 ; clk_a0 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[0] ; cnt10:u2|cqi[1] ; clk_a0 ; clk_a0 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u2|cqi[0] ; cnt10:u2|cqi[0] ; clk_a0 ; clk_a0 ; None ; None ; 1.100 ns ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk_b1' ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[3] ; cnt10:u3|cqi[3] ; clk_b1 ; clk_b1 ; None ; None ; 1.400 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[2] ; cnt10:u3|cqi[1] ; clk_b1 ; clk_b1 ; None ; None ; 1.400 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[0] ; cnt10:u3|cqi[2] ; clk_b1 ; clk_b1 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[2] ; cnt10:u3|cqi[2] ; clk_b1 ; clk_b1 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[1] ; cnt10:u3|cqi[3] ; clk_b1 ; clk_b1 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[2] ; cnt10:u3|cqi[3] ; clk_b1 ; clk_b1 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[1] ; cnt10:u3|cqi[1] ; clk_b1 ; clk_b1 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[3] ; cnt10:u3|cqi[1] ; clk_b1 ; clk_b1 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[1] ; cnt10:u3|cqi[2] ; clk_b1 ; clk_b1 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[0] ; cnt10:u3|cqi[3] ; clk_b1 ; clk_b1 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[0] ; cnt10:u3|cqi[1] ; clk_b1 ; clk_b1 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u3|cqi[0] ; cnt10:u3|cqi[0] ; clk_b1 ; clk_b1 ; None ; None ; 1.100 ns ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk_b0' ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[3] ; cnt10:u4|cqi[3] ; clk_b0 ; clk_b0 ; None ; None ; 1.400 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[2] ; cnt10:u4|cqi[1] ; clk_b0 ; clk_b0 ; None ; None ; 1.400 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[0] ; cnt10:u4|cqi[2] ; clk_b0 ; clk_b0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[2] ; cnt10:u4|cqi[2] ; clk_b0 ; clk_b0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[1] ; cnt10:u4|cqi[3] ; clk_b0 ; clk_b0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[2] ; cnt10:u4|cqi[3] ; clk_b0 ; clk_b0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[1] ; cnt10:u4|cqi[1] ; clk_b0 ; clk_b0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[3] ; cnt10:u4|cqi[1] ; clk_b0 ; clk_b0 ; None ; None ; 1.300 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[1] ; cnt10:u4|cqi[2] ; clk_b0 ; clk_b0 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[0] ; cnt10:u4|cqi[3] ; clk_b0 ; clk_b0 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[0] ; cnt10:u4|cqi[1] ; clk_b0 ; clk_b0 ; None ; None ; 1.100 ns ;
; N/A ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; cnt10:u4|cqi[0] ; cnt10:u4|cqi[0] ; clk_b0 ; clk_b0 ; None ; None ; 1.100 ns ;
+-------+------------------------------------------------+-----------------+-----------------+------------+----------+-----------------------------+---------------------------+-------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk' ;
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