📄 voptjb9q3b

📁 频率扫描的VHDL完整代码
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l0L27Z421 V<4eRN]eKegY@5C1zh`OaO3R931R15R418R156R18R10R11nbodyZ422 !s100 jeUahSQVM49Q2fPe=I4YB3Eblk_mem_gen_v2_1R99R213R147R5R2Z423 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1.vhdZ424 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1.vhdl0L206Z425 Vlc7b^W1JC;0Ce_34jX3zU3R931R10R11Z426 !s100 >gg6M;<k>SfKolbnn=B[Z2AbehavioralZ427 DPx4 ieee 16 std_logic_textio 0 22 8YS?iX`WD1REQG`ZRYQGB2R213R147R5R2Z428 DEx4 work 16 blk_mem_gen_v2_1 0 22 lc7b^W1JC;0Ce_34jX3zU3l686L272Z429 VJa]ld8M@M>RJON^XGWi2J1R931Z430 Mx5 3 std 6 textioR15Z431 Mx3 4 ieee 15 std_logic_arithZ432 Mx2 4 ieee 18 std_logic_unsignedZ433 Mx1 4 ieee 16 std_logic_textioR10R11Z434 !s100 0@BUo913A?>F1_h653Z:T3Pblk_mem_gen_v2_1_compR213R147R5R2R99Z435 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1_comp.vhdZ436 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1_comp.vhdl0L78Z437 VaM<iCcLo7Hm2gz]3XY3Wl3R931R225R32R156Z438 Mx1 4 ieee 18 std_logic_unsignedR10R11Z439 !s100 lkGgi38GQ^_JRW5zf8c8n1Eblk_mem_gen_v2_1_output_stageR99R213R147R5R2R423R424l0L77Z440 VK;3[KX`2;EDd4ZakHLj4U2R931R10R11Z441 !s100 T>NVH>mSR?gg4gz@SYe3N3AbehavioralR213R147R5R2Z442 DEx4 work 29 blk_mem_gen_v2_1_output_stage 0 22 K;3[KX`2;EDd4ZakHLj4U2l139L96Z443 Vj:GdT5Se]kO>b:UTa?S5H3R931R225R32R156R438R10R11Z444 !s100 R>?=W@SO]634R;25VC2B32Eblk_mem_gen_v2_1_xstR99Z445 DPx13 xilinxcorelib 21 blk_mem_gen_v2_1_comp 0 22 aM<iCcLo7Hm2gz]3XY3Wl3R213R147R5R2Z446 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1_xst.vhdZ447 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1_xst.vhdl0L80Z448 VY>KJ^NeZO=1GbKkH29=8e3R931R10R11Z449 !s100 ]d=ikX1iVBD6d62RSkOP80AbehavioralR445R213R147R5R2Z450 DEx4 work 20 blk_mem_gen_v2_1_xst 0 22 Y>KJ^NeZO=1GbKkH29=8e3l148L146Z451 VlbaOhzEJfGUYQWH53MX0Z1R931R430R15R431R432Z452 Mx1 13 xilinxcorelib 21 blk_mem_gen_v2_1_compR10R11Z453 !s100 aT]Z65IheP1Ai]_nNYj^n3Pblk_mem_gen_v2_1_xst_compR213R147R5R2R99Z454 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1_xst_comp.vhdZ455 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_1_xst_comp.vhdl0L78Z456 V1[dP^MG9j1LD6QN<9W41f3R931R225R32R156R438R10R11Z457 !s100 U^fEJXZgfhX^1NYH;AZO:1Eblk_mem_gen_v2_2R99R213R147R5R2Z458 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2.vhdZ459 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2.vhdl0L206Z460 V=T]PK8VjZiNYSgY3GDW1V0R931R10R11Z461 !s100 @Xnf8L0dJDXVlhGiCY:U:2AbehavioralR427R213R147R5R2Z462 DEx4 work 16 blk_mem_gen_v2_2 0 22 =T]PK8VjZiNYSgY3GDW1V0l834L276Z463 VjA`5M>z840_4;IzKBLS;`2R931R430R15R431R432R433R10R11Z464 !s100 5JbMM_JCZ^:>W0j[;]J2U1Pblk_mem_gen_v2_2_compR213R147R5R2R99Z465 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2_comp.vhdZ466 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2_comp.vhdl0L78Z467 Vhz_GbZoPZSmCMl451mn8k1R931R225R32R156R438R10R11Z468 !s100 SDPTaH]dfe]GR;00E_aMB1Eblk_mem_gen_v2_2_output_stageR99R213R147R5R2R458R459l0L77Z469 V]_890]U>jPXNb4GAi5I0e2R931R10R11Z470 !s100 =fG9g>5m10lRa[fO]>G5e1AbehavioralR213R147R5R2Z471 DEx4 work 29 blk_mem_gen_v2_2_output_stage 0 22 ]_890]U>jPXNb4GAi5I0e2l139L96Z472 Valb9T[A8]czH4hzB00<2M3R931R225R32R156R438R10R11Z473 !s100 [JcilN`EGHU^[D0DTJ1n60Eblk_mem_gen_v2_2_xstR99Z474 DPx13 xilinxcorelib 21 blk_mem_gen_v2_2_comp 0 22 hz_GbZoPZSmCMl451mn8k1R213R147R5R2Z475 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2_xst.vhdZ476 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2_xst.vhdl0L80Z477 VSimKZD_NDl:;J[AS`REIY2R931R10R11Z478 !s100 ?dlJE?me?>Xc[X74FlSV61AbehavioralR474R213R147R5R2Z479 DEx4 work 20 blk_mem_gen_v2_2_xst 0 22 SimKZD_NDl:;J[AS`REIY2l152L150Z480 VKQgCLU9He9Mn5[kJL^=V;0R931R430R15R431R432Z481 Mx1 13 xilinxcorelib 21 blk_mem_gen_v2_2_compR10R11Z482 !s100 @M]I_86]:P@HV7STDC>Kd1Pblk_mem_gen_v2_2_xst_compR213R147R5R2R99Z483 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2_xst_comp.vhdZ484 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_2_xst_comp.vhdl0L78Z485 VKDa4DcEaZRH`AH0IUNCmc3R931R225R32R156R438R10R11Z486 !s100 ;<9hT7cG><boXZU[VL6cZ3Eblk_mem_gen_v2_4R99R213R147R5R2Z487 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4.vhdZ488 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4.vhdl0L250Z489 VZK^KbzZgHV=kz16;l7@bH2R931R10R11Z490 !s100 cheXDeQhK24Jg564ogo=82AbehavioralR427R213R147R5R2Z491 DEx4 work 16 blk_mem_gen_v2_4 0 22 ZK^KbzZgHV=kz16;l7@bH2l880L322Z492 VX?]ahPYjoKTBX6z^6c9zB2R931R430R15R431R432R433R10R11Z493 !s100 ]B?R]JXB3n<JcP22D@cQa0Pblk_mem_gen_v2_4_compR213R147R5R2R99Z494 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4_comp.vhdZ495 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4_comp.vhdl0L78Z496 VWP@7E:DjMk7mTIPc`lGch2R931R225R32R156R438R10R11Z497 !s100 gco3SzUPeEKhkfRDV`?c51Eblk_mem_gen_v2_4_output_stageR99R213R147R5R2R487R488l0L77Z498 VfmB464LCaZlK66W<ISdSG0R931R10R11Z499 !s100 ]oEjgbjSjRLL7`ibGG>>]1AbehavioralR213R147R5R2Z500 DEx4 work 29 blk_mem_gen_v2_4_output_stage 0 22 fmB464LCaZlK66W<ISdSG0l155L99Z501 VF^``FSjNR^kZa;ZH<XVn?0R931R225R32R156R438R10R11Z502 !s100 B3JEVG22f[aE;K>j<6G;P0Eblk_mem_gen_v2_4_xstR99Z503 DPx13 xilinxcorelib 21 blk_mem_gen_v2_4_comp 0 22 WP@7E:DjMk7mTIPc`lGch2R213R147R5R2Z504 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4_xst.vhdZ505 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4_xst.vhdl0L80Z506 VHTDUTN3<S0ZmTn;ajZ`iO2R931R10R11Z507 !s100 Dai`_18?DGdEGV]]@3c?g3AbehavioralR503R213R147R5R2Z508 DEx4 work 20 blk_mem_gen_v2_4_xst 0 22 HTDUTN3<S0ZmTn;ajZ`iO2l154L152Z509 Vf<h[>9n6PdFFTC94m]kC02R931R430R15R431R432Z510 Mx1 13 xilinxcorelib 21 blk_mem_gen_v2_4_compR10R11Z511 !s100 35AdH`zH_Bc@Iif3OFKAg3Pblk_mem_gen_v2_4_xst_compR213R147R5R2R99Z512 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4_xst_comp.vhdZ513 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_4_xst_comp.vhdl0L78Z514 VLQgGIG3mf;CN4oM[LOg311R931R225R32R156R438R10R11Z515 !s100 F@ILkDVKS?XXFBg8E=iT31Eblk_mem_gen_v2_5R99R213R147R5R2Z516 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5.vhdZ517 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5.vhdl0L287Z518 Vnd?A0JKoi8ocX4DAA@c723R931R10R11Z519 !s100 E0<jMP5]zLHj<7^N6@?<[3AbehavioralR427R213R147R5R2Z520 DEx4 work 16 blk_mem_gen_v2_5 0 22 nd?A0JKoi8ocX4DAA@c723l922L361Z521 V8[bS_Ee7dNm1goC=6<WE[3R931R430R15R431R432R433R10R11Z522 !s100 O_>E8:6ebWgHJ@UJjg4R<3Pblk_mem_gen_v2_5_compR213R147R5R2R99Z523 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5_comp.vhdZ524 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5_comp.vhdl0L78Z525 V4VMlfa3NDhE0OVlh=EZhc1R931R225R32R156R438R10R11Z526 !s100 D4fCkkfO^NfHA6EV:kgaJ1Eblk_mem_gen_v2_5_output_stageR99R213R147R5R2R516R517l0L77Z527 VEnEA6zHIRMCK0bOaQIOcQ2R931R10R11Z528 !s100 INVY0bVLWV<K>Y>_^X_3T1AbehavioralR213R147R5R2Z529 DEx4 work 29 blk_mem_gen_v2_5_output_stage 0 22 EnEA6zHIRMCK0bOaQIOcQ2l156L100Z530 VMR3d5LZk>YOzk^3<;YfC11R931R225R32R156R438R10R11Z531 !s100 [BUJ1Pbg>[f`8H]AI9<VS2Eblk_mem_gen_v2_5_xstR99Z532 DPx13 xilinxcorelib 21 blk_mem_gen_v2_5_comp 0 22 4VMlfa3NDhE0OVlh=EZhc1R213R147R5R2Z533 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5_xst.vhdZ534 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5_xst.vhdl0L80Z535 V]=D6VEO1WGKcQZo=HeblY1R931R10R11Z536 !s100 3@Z>dgjI[U7n1dlQzC2QD0AbehavioralR532R213R147R5R2Z537 DEx4 work 20 blk_mem_gen_v2_5_xst 0 22 ]=D6VEO1WGKcQZo=HeblY1l156L154Z538 VS4c6ezE@3:Sfz;B^Z[n2;2R931R430R15R431R432Z539 Mx1 13 xilinxcorelib 21 blk_mem_gen_v2_5_compR10R11Z540 !s100 Blf06`AAG[jR[615G1z`h1Pblk_mem_gen_v2_5_xst_compR213R147R5R2R99Z541 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5_xst_comp.vhdZ542 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_5_xst_comp.vhdl0L78Z543 V8@zj:RUDF]>h]D?gikY[e2R931R225R32R156R438R10R11Z544 !s100 kGKzM_5WFfCiIHI9H_aL]1Eblk_mem_gen_v2_6R99R213R147R5R2Z545 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6.vhdZ546 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6.vhdl0L302Z547 VMfDlX00@RREcl2PYb]g0:2R931R10R11Z548 !s100 LDjgC]@m3cd;Nggf`IW9X0AbehavioralR427R213R147R5R2Z549 DEx4 work 16 blk_mem_gen_v2_6 0 22 MfDlX00@RREcl2PYb]g0:2l948L377Z550 VTjN;o<oa8QUHWY64FA;X;1R931R430R15R431R432R433R10R11Z551 !s100 ]GSEHa:fAJOn?4bEeDnA[1Pblk_mem_gen_v2_6_compR213R147R5R2R99Z552 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6_comp.vhdZ553 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6_comp.vhdl0L78Z554 VMV1L<=oSeeHze?25<g85o2R931R225R32R156R438R10R11Z555 !s100 NSef2cIc4De1;=hA_VYD<1Eblk_mem_gen_v2_6_output_stageR99R213R147R5R2R545R546l0L77Z556 VXGgkeFcg69n:FB4?cTiL82R931R10R11Z557 !s100 g][ZfS5C87oUCgVme^TK13AbehavioralR213R147R5R2Z558 DEx4 work 29 blk_mem_gen_v2_6_output_stage 0 22 XGgkeFcg69n:FB4?cTiL82l156L100Z559 VfzO`1f;HIM[Kaz^?D21dm3R931R225R32R156R438R10R11Z560 !s100 `EYWNC7dcMl7S9aa_3:aT2Eblk_mem_gen_v2_6_xstR99Z561 DPx13 xilinxcorelib 21 blk_mem_gen_v2_6_comp 0 22 MV1L<=oSeeHze?25<g85o2R213R147R5R2Z562 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6_xst.vhdZ563 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6_xst.vhdl0L80Z564 VNC>P6cl^_<Q@d1o<co8nb0R931R10R11Z565 !s100 lXX02^7BVKT[YBo4LGM^13AbehavioralR561R213R147R5R2Z566 DEx4 work 20 blk_mem_gen_v2_6_xst 0 22 NC>P6cl^_<Q@d1o<co8nb0l157L155Z567 V;BYOB:g`>=ajV92<[6G6h0R931R430R15R431R432Z568 Mx1 13 xilinxcorelib 21 blk_mem_gen_v2_6_compR10R11Z569 !s100 ^U[FWLEom;X;Tn[]YamUb0Pblk_mem_gen_v2_6_xst_compR213R147R5R2R99Z570 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6_xst_comp.vhdZ571 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_6_xst_comp.vhdl0L78Z572 VMFcY>Nl>dmRS8BX6EEV6h2R931R225R32R156R438R10R11Z573 !s100 >eiW[8NZL>V[Of?hz=mB<3Eblk_mem_gen_v2_7R99R213R147R5R2Z574 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_7.vhdZ575 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_7.vhdl0L321Z576 V2ineINb1IKAzVDJ4E879W1R931R10R11Z577 !s100 ;cUW_ToEXkPAWKCf8FCWN0AbehavioralR427R213R147R5R2Z578 DEx4 work 16 blk_mem_gen_v2_7 0 22 2ineINb1IKAzVDJ4E879W1l983L396Z579 V@TR5SZDdV;<jbWYAcEGba2R931R430R15R431R432R433R10R11Z580 !s100 g5<@0LfbhR]f`9=KK?a453Pblk_mem_gen_v2_7_compR213R147R5R2R99Z581 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_7_comp.vhdZ582 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_7_comp.vhdl0L78Z583 Vl5C0X9Ci<a_jIY6Bl5of<2R931R225R32R156R438R10R11Z584 !s100 a6JZelS_7Ui;^EFG7e7G>1Eblk_mem_gen_v2_7_output_stageR99R213R147R5R2R574R575l0L84Z585 VVRR]IJ[l3dSoICB]:lE_H2R931R10R11Z586 !s100 ]9B0>7h8LKLfIFYnd5U7S0AbehavioralR213R147R5R2Z587 DEx4 work 29 blk_mem_gen_v2_7_output_stage 0 22 VRR]IJ[l3dSoICB]:lE_H2l172L108Z588 VKELkE[WVi`lMGg3>Lg<6^3R931R225R32R156R438R10R11Z589 !s100 SFWdk39X`>GW7k3hSS<bb0Eblk_mem_gen_v2_7_xstR99Z590 DPx13 xilinxcorelib 21 blk_mem_gen_v2_7_comp 0 22 l5C0X9Ci<a_jIY6Bl5of<2R213R147R5R2Z591 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_7_xst.vhdZ592 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/BLK_MEM_GEN_V2_7_xst.vhdl0L80
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