📄 voptjb9q3b

📁 频率扫描的VHDL完整代码
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R223R224R225R226Z244 Mx2 13 xilinxcorelib 20 bip_bram18k_pkg_v2_2Z245 Mx1 13 xilinxcorelib 24 bip_bram18k_v2_2_sim_pkgR10R11Z246 !s100 h59IIUC[Knj]doACWA?e53Pbip_bram18k_v2_2_sim_pkgR237R2R125R5R1Z247 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_bram18k_v2_2_sim_pkg.vhdZ248 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_bram18k_v2_2_sim_pkg.vhdl0L72Z249 VTk0h0U@=5iN8WGVOe<EhH1R931R15R233R85Z250 Mx1 13 xilinxcorelib 20 bip_bram18k_pkg_v2_2R10R11Z251 !s100 b;iZX@`0LTGKEe;JQf_Q?2Pbip_dsp48_acc_pkg_v1_0Z252 DPx13 xilinxcorelib 26 bip_usecase_utils_pkg_v1_0 0 22 NoQC38GHQ78h_[Y9[f6mI1R2R194R147R5R81Z253 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_acc_pkg_v1_0.vhdZ254 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_acc_pkg_v1_0.vhdl0L54Z255 VeYK:fZ=YhmbnFC`5cBf9M1R931b1Z256 Mx5 4 ieee 14 std_logic_1164Z257 Mx4 4 ieee 15 std_logic_arithZ258 Mx3 13 xilinxcorelib 18 bip_utils_pkg_v1_0R85Z259 Mx1 13 xilinxcorelib 26 bip_usecase_utils_pkg_v1_0R10R11Z260 !s100 @K8BDeGAaMfbh4ORo_>H?2BbodyZ261 DBx4 work 22 bip_dsp48_acc_pkg_v1_0 0 22 eYK:fZ=YhmbnFC`5cBf9M1R252R2R194R147R5l0L201Z262 V]M7[VOlKD<fODDzIbz>Ho3R931R256R257R258R85R259R10R11nbodyZ263 !s100 H8O@16CWb5kSZ4lJ;;7>F3Pbip_dsp48_acc_pkg_v2_0Z264 DPx13 xilinxcorelib 26 bip_usecase_utils_pkg_v2_0 0 22 H]8zL3M2aj[WOFNiE8ZE91R2R125R147R5R1Z265 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_acc_pkg_v2_0.vhdZ266 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_acc_pkg_v2_0.vhdl0L64Z267 V`^DccK0FiW[R1AFa_6bgz2R931b1R256R257R233R85Z268 Mx1 13 xilinxcorelib 26 bip_usecase_utils_pkg_v2_0R10R11Z269 !s100 f5YO21gfPA`blAU7;95AA1BbodyZ270 DBx4 work 22 bip_dsp48_acc_pkg_v2_0 0 22 `^DccK0FiW[R1AFa_6bgz2R264R2R125R147R5l0L211Z271 V3MH2HG5PFOel9n_z_KNmW0R931R256R257R233R85R268R10R11nbodyZ272 !s100 heOzFzc>YPWkhB0=i`KlK1Ebip_dsp48_acc_v2_0_xstR1Z273 DPx13 xilinxcorelib 24 xbip_dsp48_acc_v2_0_comp 0 22 zPJP0TDW^MKM=I0Ca`j3>1R2R125R264R5Z274 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/xbip_dsp48_acc_v2_0_xst.vhdZ275 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/xbip_dsp48_acc_v2_0_xst.vhdl0L58Z276 VcD0hLO:H;7ZT?b8fJOU1b3R931R10R11Z277 !s100 6zMJSK8g?>VC82U73[gO62AbehavioralR273R2R125R264R5Z278 DEx4 work 22 bip_dsp48_acc_v2_0_xst 0 22 cD0hLO:H;7ZT?b8fJOU1b3l88L87Z279 VHi]kncjhen422;MPN_UfR2R931R256Z280 Mx4 13 xilinxcorelib 26 bip_usecase_utils_pkg_v2_0R233R85Z281 Mx1 13 xilinxcorelib 24 xbip_dsp48_acc_v2_0_compR10R11Z282 !s100 >oEkKzQg5ZS?egEIIFCS:0Pbip_dsp48_addsub_pkg_v1_0R252R2R194R147R5R81Z283 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_addsub_pkg_v1_0.vhdZ284 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_addsub_pkg_v1_0.vhdl0L58Z285 V[86?J7gdCj9ag_V2PHI1m2R931b1R256R257R258R85R259R10R11Z286 !s100 0OgD:o4[3LffD4Zn<>I<]3BbodyZ287 DBx4 work 25 bip_dsp48_addsub_pkg_v1_0 0 22 [86?J7gdCj9ag_V2PHI1m2R252R2R194R147R5l0L236Z288 VU3X:7f6MJ6U^IoK;;m@^?1R931R256R257R258R85R259R10R11nbodyZ289 !s100 ML1RRVBg?XO7Ofk60K]?P0Pbip_dsp48_addsub_pkg_v2_0R2R125R264R147R5R1Z290 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_addsub_pkg_v2_0.vhdZ291 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_addsub_pkg_v2_0.vhdl0L67Z292 VoBLd=0kPIYNZ]G8z9:BWG2R931b1R256R257Z293 Mx3 13 xilinxcorelib 26 bip_usecase_utils_pkg_v2_0R129R18R10R11Z294 !s100 ];c:V[>?<SEYGC@OVcg@A3BbodyZ295 DBx4 work 25 bip_dsp48_addsub_pkg_v2_0 0 22 oBLd=0kPIYNZ]G8z9:BWG2R2R125R264R147R5l0L245Z296 V<JllY8AkW2oeSN@jK3C_73R931R256R257R293R129R18R10R11nbodyZ297 !s100 gid9F72U^D0dNJF7Vedh@1Pbip_dsp48_macro_pkg_v2_0R2R125R264R136R5R81Z298 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_macro_pkg_v2_0.vhdZ299 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_macro_pkg_v2_0.vhdl0L58Z300 Vm7hm7lkmOBVCB=525l2<_3R931b1R256Z301 Mx4 4 ieee 11 numeric_stdR293R129R18R10R11Z302 !s100 IH5_CWkdzcIbm_b[U1LJ41BbodyZ303 DBx4 work 24 bip_dsp48_macro_pkg_v2_0 0 22 m7hm7lkmOBVCB=525l2<_3R2R125R264R136R5l0L404Z304 Vb=;`NzTb1XOk]0fPC9@[]0R931R256R301R293R129R18R10R11nbodyZ305 !s100 ehX<IeL<_KkJIUA9ehbZI1Pbip_dsp48_mult_pkg_v1_0R252R2R194R147R5R1Z306 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_mult_pkg_v1_0.vhdZ307 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_mult_pkg_v1_0.vhdl0L56Z308 VACE2Qd1;HfFoLYfbU:@623R931b1R256R257R258R85R259R10R11Z309 !s100 ]`:GKjR>nn:kio17oQ]1i1BbodyZ310 DBx4 work 23 bip_dsp48_mult_pkg_v1_0 0 22 ACE2Qd1;HfFoLYfbU:@623R252R2R194R147R5l0L152Z311 VYVVIZlA_Z?AaaAdFz0^iZ1R931R256R257R258R85R259R10R11nbodyZ312 !s100 THP=FNU3AiZLd_GWiU>K`3Pbip_dsp48_mult_pkg_v2_0R2R125R264R147R5R81Z313 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_mult_pkg_v2_0.vhdZ314 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_mult_pkg_v2_0.vhdl0L65Z315 V;iRk39[nQKV5iC_=N@A5<2R931b1R256R257R293R129R18R10R11Z316 !s100 5kSKG`7QRWT0mR;g>V9eO3BbodyZ317 DBx4 work 23 bip_dsp48_mult_pkg_v2_0 0 22 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bip_dsp48_multacc_pkg_v2_0 0 22 _mWJ978]Q^_8Iz7h2befT3R2R125R264R147R5l0L200Z332 V6zl]@E6Z:=;YzX]8T53[Y1R931R256R257R293R129R18R10R11nbodyZ333 !s100 TLW_mA2kgmPhToS@_zX>G0Ebip_dsp48_multacc_v1_0_xstR1Z334 DPx13 xilinxcorelib 28 xbip_dsp48_multacc_v1_0_comp 0 22 =6=7GB5PBQMLH2BC:SgmQ3R2R194R252R5Z335 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/xbip_dsp48_multacc_v1_0_xst.vhdZ336 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/xbip_dsp48_multacc_v1_0_xst.vhdl0L48Z337 V^IcZb`5ik1f@]m?hfUAIS2R931R10R11Z338 !s100 ?m]b=Ye1Y6>350ZOVc`F[0AbehavioralR334R2R194R252R5Z339 DEx4 work 26 bip_dsp48_multacc_v1_0_xst 0 22 ^IcZb`5ik1f@]m?hfUAIS2l85L84Z340 VhMXSUBbdl;;hoz]zP3T9;3R931R256Z341 Mx4 13 xilinxcorelib 26 bip_usecase_utils_pkg_v1_0R258R85Z342 Mx1 13 xilinxcorelib 28 xbip_dsp48_multacc_v1_0_compR10R11Z343 !s100 OzoZ;?of@jo6^cLIljD1R0Ebip_dsp48_multacc_v2_0_xstR81Z344 DPx13 xilinxcorelib 28 xbip_dsp48_multacc_v2_0_comp 0 22 Y9^K]iY^>CH_>lNj;hk@]2R2R125R264R5Z345 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/xbip_dsp48_multacc_v2_0_xst.vhdZ346 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/xbip_dsp48_multacc_v2_0_xst.vhdl0L58Z347 VQ8hMhj@0i;2:Q>@=aH^_I3R931R10R11Z348 !s100 j]TVlZ:N;5N[PW3_oCAoX0AbehavioralR344R2R125R264R5Z349 DEx4 work 26 bip_dsp48_multacc_v2_0_xst 0 22 Q8hMhj@0i;2:Q>@=aH^_I3l95L94Z350 Vek0`WkK4Ejh<3oAQKal^b2R931R256R280R233R85Z351 Mx1 13 xilinxcorelib 28 xbip_dsp48_multacc_v2_0_compR10R11Z352 !s100 gLY;`ZnnaW@SB:=6TYPmP2Pbip_dsp48_multadd_pkg_v1_0R252R2R194R147R5R81Z353 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_multadd_pkg_v1_0.vhdZ354 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_dsp48_multadd_pkg_v1_0.vhdl0L58Z355 VQZ>LLo7P>kj`ToYm<R=6o1R931b1R256R257R258R85R259R10R11Z356 !s100 jQg>o6]janO8;`@H9dU_N2BbodyZ357 DBx4 work 26 bip_dsp48_multadd_pkg_v1_0 0 22 QZ>LLo7P>kj`ToYm<R=6o1R252R2R194R147R5l0L158Z358 VLX=[REXh>8`^kahk<MP2F0R931R256R257R258R85R259R10R11nbodyZ359 !s100 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8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_usecase_utils_pkg_v2_0.vhdZ388 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_usecase_utils_pkg_v2_0.vhdl0L55Z389 VH]8zL3M2aj[WOFNiE8ZE91R9b1R10R11Z390 !s100 2CfWe5dg]0Ga:92zLBVg:3BbodyZ391 DBx59 d:\Xilinx\12.4\ISE_DS\ISE\vhdl\mti_se\6.5e\nt\xilinxcorelib 26 bip_usecase_utils_pkg_v2_0 0 22 H]8zL3M2aj[WOFNiE8ZE91R381R382R38331R384R385R386l0L99Z392 VUi_1@j98Bm_E[7P4Y>mY50R9R10R11nbodyZ393 !s100 [>C8i^BTnB@hZcL;K`gk21Pbip_utils_pkg_v1_0R2R5R1Z394 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_utils_pkg_v1_0.vhdZ395 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_utils_pkg_v1_0.vhdl0L47Z396 V8CmlDJ;8AmF>1PQeZ20G]0R931b1R52R18R10R11Z397 !s100 `6ogYbBJn?ZniB1l4VFdB3BbodyZ398 DBx4 work 18 bip_utils_pkg_v1_0 0 22 8CmlDJ;8AmF>1PQeZ20G]0R2R5l0L302Z399 VXc[g39SAQLkZED>lOc`Jz3R931R52R18R10R11nbodyZ400 !s100 3Mkjd7OWJf0F`I^BGQ;9T3Pbip_utils_pkg_v2_0R381R38331b1Z401 Mx2 22 D:\modeltech_6.5e\ieee 14 std_logic_1164R386R1Z402 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_utils_pkg_v2_0.vhdZ403 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bip_utils_pkg_v2_0.vhdl0L57Z404 V3cYe8i;bUXLNR2cmab@<83R9b1R10R11Z405 !s100 `SeadB3PjY7ngibSgknSW2BbodyZ406 DBx59 d:\Xilinx\12.4\ISE_DS\ISE\vhdl\mti_se\6.5e\nt\xilinxcorelib 18 bip_utils_pkg_v2_0 0 22 3cYe8i;bUXLNR2cmab@<83R381R38331R401R386l0L355Z407 VcY@@OmzT4AFj`[QkGVNcH0R9R10R11nbodyZ408 !s100 Xdh_8N^SkoQ6V8V_AVUNF2Pbit_correlator_compsZ409 DPx13 xilinxcorelib 8 ul_utils 0 22 KCbEGdfKXm`flz6`@fan>0R5R1Z410 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bit_correlator_comp_v3_0.vhdZ411 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bit_correlator_comp_v3_0.vhdl0L7Z412 VVNnLA?<n9<_YejNJ6cSSM3R931R52Z413 Mx1 13 xilinxcorelib 8 ul_utilsR10R11Z414 !s100 1hfjD?dRGJcI6k_S:@D]o3Pbit_correlator_pack_v3_0R2R147R213R5R1Z415 8d:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bit_correlator_pack_v3_0.vhdZ416 Fd:/Xilinx/12.4/ISE_DS/ISE/vhdl/src/XilinxCoreLib/bit_correlator_pack_v3_0.vhdl0L19Z417 V`e4]2XYDY8HG5SD3C1n]L3R931b1R15Z418 Mx3 4 ieee 18 std_logic_unsignedR156R18R10R11Z419 !s100 lQRK9^2[E4;ePSL6e15kH1BbodyZ420 DBx4 work 24 bit_correlator_pack_v3_0 0 22 `e4]2XYDY8HG5SD3C1n]L3R2R147R213R5
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