📄 des3_top.vhd
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when "010000" =>
Q <= "0001";
when "010001" =>
Q <= "0010";
when "010010" =>
Q <= "1101";
when "010011" =>
Q <= "1000";
when "010100" =>
Q <= "1100";
when "010101" =>
Q <= "0101";
when "010110" =>
Q <= "0111";
when "010111" =>
Q <= "1110";
when "011000" =>
Q <= "1011";
when "011001" =>
Q <= "1100";
when "011010" =>
Q <= "0100";
when "011011" =>
Q <= "1011";
when "011100" =>
Q <= "0010";
when "011101" =>
Q <= "1111";
when "011110" =>
Q <= "1000";
when "011111" =>
Q <= "0001";
when "100000" =>
Q <= "1101";
when "100001" =>
Q <= "0001";
when "100010" =>
Q <= "0110";
when "100011" =>
Q <= "1010";
when "100100" =>
Q <= "0100";
when "100101" =>
Q <= "1101";
when "100110" =>
Q <= "1001";
when "100111" =>
Q <= "0000";
when "101000" =>
Q <= "1000";
when "101001" =>
Q <= "0110";
when "101010" =>
Q <= "1111";
when "101011" =>
Q <= "1001";
when "101100" =>
Q <= "0011";
when "101101" =>
Q <= "1000";
when "101110" =>
Q <= "0000";
when "101111" =>
Q <= "0111";
when "110000" =>
Q <= "1011";
when "110001" =>
Q <= "0100";
when "110010" =>
Q <= "0001";
when "110011" =>
Q <= "1111";
when "110100" =>
Q <= "0010";
when "110101" =>
Q <= "1110";
when "110110" =>
Q <= "1100";
when "110111" =>
Q <= "0011";
when "111000" =>
Q <= "0101";
when "111001" =>
Q <= "1011";
when "111010" =>
Q <= "1010";
when "111011" =>
Q <= "0101";
when "111100" =>
Q <= "1110";
when "111101" =>
Q <= "0010";
when "111110" =>
Q <= "0111";
when "111111" =>
Q <= "1100";
when others =>
null;
end case ;
end process ;
end;
----------------------------------------------------
--
-- Library Name : DES3
-- Unit Name : sbox6_4b
-- Unit Type : Text Unit
--
------------------------------------------------------
------------------------------------------
------------------------------------------
-- Date : Wed Aug 21 17:33:50 2002
--
-- Author : liuyb
--
-- Company : wisdom
--
-- Description :
--
------------------------------------------
------------------------------------------
library ieee; use ieee.STD_LOGIC_1164.all;
library std; use std.STANDARD.all;
entity sbox6_4b is
port (
Q: out STD_LOGIC_VECTOR (3 downto 0) ;
D : in STD_LOGIC_VECTOR (5 downto 0)
);
end;
------------------------------------------
------------------------------------------
-- Date : Wed Aug 21 17:37:56 2002
--
-- Author : liuyb
--
-- Company : wisdom
--
-- Description :
--
------------------------------------------
------------------------------------------
architecture sbox6_4b of sbox6_4b is
begin
process(D)
begin
case D is
when "000000" =>
Q <= "1111";
when "000001" =>
Q <= "0011";
when "000010" =>
Q <= "0001";
when "000011" =>
Q <= "1101";
when "000100" =>
Q <= "1000";
when "000101" =>
Q <= "0100";
when "000110" =>
Q <= "1110";
when "000111" =>
Q <= "0111";
when "001000" =>
Q <= "0110";
when "001001" =>
Q <= "1111";
when "001010" =>
Q <= "1011";
when "001011" =>
Q <= "0010";
when "001100" =>
Q <= "0011";
when "001101" =>
Q <= "1000";
when "001110" =>
Q <= "0100";
when "001111" =>
Q <= "1110";
when "010000" =>
Q <= "1001";
when "010001" =>
Q <= "1100";
when "010010" =>
Q <= "0111";
when "010011" =>
Q <= "0000";
when "010100" =>
Q <= "0010";
when "010101" =>
Q <= "0001";
when "010110" =>
Q <= "1101";
when "010111" =>
Q <= "1010";
when "011000" =>
Q <= "1100";
when "011001" =>
Q <= "0110";
when "011010" =>
Q <= "0000";
when "011011" =>
Q <= "1001";
when "011100" =>
Q <= "0101";
when "011101" =>
Q <= "1011";
when "011110" =>
Q <= "1010";
when "011111" =>
Q <= "0101";
when "100000" =>
Q <= "0000";
when "100001" =>
Q <= "1101";
when "100010" =>
Q <= "1110";
when "100011" =>
Q <= "1000";
when "100100" =>
Q <= "0111";
when "100101" =>
Q <= "1010";
when "100110" =>
Q <= "1011";
when "100111" =>
Q <= "0001";
when "101000" =>
Q <= "1010";
when "101001" =>
Q <= "0011";
when "101010" =>
Q <= "0100";
when "101011" =>
Q <= "1111";
when "101100" =>
Q <= "1101";
when "101101" =>
Q <= "0100";
when "101110" =>
Q <= "0001";
when "101111" =>
Q <= "0010";
when "110000" =>
Q <= "0101";
when "110001" =>
Q <= "1011";
when "110010" =>
Q <= "1000";
when "110011" =>
Q <= "0110";
when "110100" =>
Q <= "1100";
when "110101" =>
Q <= "0111";
when "110110" =>
Q <= "0110";
when "110111" =>
Q <= "1100";
when "111000" =>
Q <= "1001";
when "111001" =>
Q <= "0000";
when "111010" =>
Q <= "0011";
when "111011" =>
Q <= "0101";
when "111100" =>
Q <= "0010";
when "111101" =>
Q <= "1110";
when "111110" =>
Q <= "1111";
when "111111" =>
Q <= "1001";
when others =>
null;
end case ;
end process ;
end;
----------------------------------------------------
--
-- Library Name : DES3
-- Unit Name : sbox6_4a
-- Unit Type : Text Unit
--
------------------------------------------------------
------------------------------------------
------------------------------------------
-- Date : Wed Aug 21 17:33:50 2002
--
-- Author : liuyb
--
-- Company : wisdom
--
-- Description :
--
------------------------------------------
------------------------------------------
library ieee; use ieee.STD_LOGIC_1164.all;
library std; use std.STANDARD.all;
entity sbox6_4a is
port (
Q: out STD_LOGIC_VECTOR (3 downto 0) ;
D : in STD_LOGIC_VECTOR (5 downto 0)
);
end;
------------------------------------------
------------------------------------------
-- Date : Wed Aug 21 17:37:56 2002
--
-- Author : liuyb
--
-- Company : wisdom
--
-- Description :
--
------------------------------------------
------------------------------------------
architecture sbox6_4a of sbox6_4a is
begin
process(D)
begin
case D is
when "000000" =>
Q <= "1110";
when "000001" =>
Q <= "0000";
when "000010" =>
Q <= "0100";
when "000011" =>
Q <= "1111";
when "000100" =>
Q <= "1101";
when "000101" =>
Q <= "0111";
when "000110" =>
Q <= "0001";
when "000111" =>
Q <= "0100";
when "001000" =>
Q <= "0010";
when "001001" =>
Q <= "1110";
when "001010" =>
Q <= "1111";
when "001011" =>
Q <= "0010";
when "001100" =>
Q <= "1011";
when "001101" =>
Q <= "1101";
when "001110" =>
Q <= "1000";
when "001111" =>
Q <= "0001";
when "010000" =>
Q <= "0011";
when "010001" =>
Q <= "1010";
when "010010" =>
Q <= "1010";
when "010011" =>
Q <= "0110";
when "010100" =>
Q <= "0110";
when "010101" =>
Q <= "1100";
when "010110" =>
Q <= "1100";
when "010111" =>
Q <= "1011";
when "011000" =>
Q <= "0101";
when "011001" =>
Q <= "1001";
when "011010" =>
Q <= "1001";
when "011011" =>
Q <= "0101";
when "011100" =>
Q <= "0000";
when "011101" =>
Q <= "0011";
when "011110" =>
Q <= "0111";
when "011111" =>
Q <= "1000";
when "100000" =>
Q <= "0100";
when "100001" =>
Q <= "1111";
when "100010" =>
Q <= "0001";
when "100011" =>
Q <= "1100";
when "100100" =>
Q <= "1110";
when "100101" =>
Q <= "1000";
when "100110" =>
Q <= "1000";
when "100111" =>
Q <= "0010";
when "101000" =>
Q <= "1101";
when "101001" =>
Q <= "0100";
when "101010" =>
Q <= "0110";
when "101011" =>
Q <= "1001";
when "101100" =>
Q <= "0010";
when "101101" =>
Q <= "0001";
when "101110" =>
Q <= "1011";
when "101111" =>
Q <= "0111";
when "110000" =>
Q <= "1111";
when "110001" =>
Q <= "0101";
when "110010" =>
Q <= "1100";
when "110011" =>
Q <= "1011";
when "110100" =>
Q <= "1001";
when "110101" =>
Q <= "0011";
when "110110" =>
Q <= "0111";
when "110111" =>
Q <= "1110";
when "111000" =>
Q <= "0011";
when "111001" =>
Q <= "1010";
when "111010" =>
Q <= "1010";
when "111011" =>
Q <= "0000";
when "111100" =>
Q <= "0101";
when "111101" =>
Q <= "0110";
when "111110" =>
Q <= "0000";
when "111111" =>
Q <= "1101";
when others =>
null;
end case ;
end process ;
end;
----------------------------------------------------
--
-- Library Name : DES3
-- Unit Name : LF
-- Unit Type : Block Diagram
--
------------------------------------------------------
library ieee;use ieee.STD_LOGIC_1164.all;library std;use std.STANDARD.all;use ieee.STD_LOGIC_ARITH.all;entity LF is port ( Ki : in std_logic_vector(47 downto 0 ); L : in std_logic_vector(31 downto 0 ); Qf : out std_logic_vector(31 downto 0 ); R : in std_logic_vector(31 downto 0 ) ); end LF; use work.all;architecture LF of LF is signal QS : std_logic_vector(31 downto 0 ); signal S0 : std_logic; signal S1 : std_logic; signal S10 : std_logic; signal S11 : std_logic; signal S12 : std_logic; signal S13 : std_logic; signal S14 : std_logic; signal S15 : std_logic; signal S16 : std_logic; signal S17 : std_logic; signal S18 : std_logic; signal S19 : std_logic; signal S2 : std_logic; signal S20 : std_logic; signal S21 : std_logic; signal S22 : std_logic; signal S23 : std_logic; signal S24 : std_logic; signal S25 : std_logic; signal S26 : std_logic; signal S27 : std_logic; signal S28 : std_logic; signal S29 : std_logic; signal S3 : std_logic; signal S30 : std_logic; signal S31 : std_logic; signal S4 : std_logic; signal S5 : std_logic; signal S6 : std_logic; signal S7 : std_logic; signal S8 : std_logic; signal S9 : std_logic; signal Si0 : std_logic; signal Si1 : std_logic; signal Si10 : std_logic; signal Si11 : std_logic; sig⌨️ 快捷键说明
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