train.fit.summary

来自「基于FPGA火车状态机的实现方法」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Tue Jul 10 13:11:19 2012
Quartus II Version : 9.0 Build 132 02/25/2009 SJ Full Version
Revision Name : train
Top-level Entity Name : train
Family : Cyclone II
Device : EP2C70F896C6
Timing Models : Final
Total logic elements : 9 / 68,416 ( < 1 % )
    Total combinational functions : 9 / 68,416 ( < 1 % )
    Dedicated logic registers : 5 / 68,416 ( < 1 % )
Total registers : 5
Total pins : 15 / 622 ( 2 % )
Total virtual pins : 0
Total memory bits : 0 / 1,152,000 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 300 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )