train.tmw_info

来自「基于FPGA火车状态机的实现方法」· TMW_INFO 代码 · 共 7 行

start_full_compilation:s:00:00:28
start_analysis_synthesis:s:00:00:03-start_full_compilation
start_analysis_elaboration:s-start_full_compilation
start_fitter:s:00:00:15-start_full_compilation
start_assembler:s:00:00:08-start_full_compilation
start_timing_analyzer:s:00:00:02-start_full_compilation