power.c

smdk2416 wince source code/BSP

	//pIOPort->EXTINT0 = (READEXTINT0(pIOPort->EXTINT0) & ~((1<<31) | (1<<27) | (1<<23) | (1<<19) | (1<<15) | (1<<11) | (1<<7) | (1<<3) ));
	//pIOPort->EXTINT0 = (READEXTINT0(pIOPort->EXTINT0)  | ((1<<31) | (1<<27) | (1<<23) | (1<<19) | (0<<15) | (1<<11) | (1<<7) | (1<<3) )); //rEXTINT0[11] = PD_dis(Because of VBUS_DET)

	pIOPort->GPFDAT &=~ (0xff<<0);
	pIOPort->GPFDAT |= ((0x0<<7)|(0x0<<6)|(0x0<<5)|(0x0<<4)|(0x0<<3)|(0x0<<2)|(0x0<<1)|(0x0<<0));
	
	//GPG
	pIOPort->GPGCON &=~((0x0<<14)|(0x0<<12)|(0x3<<10)|(0x3<<8)|(0x3<<6)|(0x3<<4)|(0x3<<2)|(0x3<<0));
	pIOPort->GPGCON |= ((0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x2<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	           


//	pIOPort->EXTINT1 = (READEXTINT1(pIOPort->EXTINT1) | (0<<31) | (0<<27) | (0<<23) | (0<<19) | (1<<15) | (0<<11) | (0<<7)| (0<<3) );	
	
	pIOPort->GPGDAT &=~ ((0x0<<7)|(0x0<<6)|(0x1<<5)|(0x1<<4)|(0x1<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	pIOPort->GPGDAT |= ((0x1<<7)|(0x1<<6)|(0x1<<5)|(0x1<<4)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	//pIOPort->GPACDH = (READGPACDH(pIOPort->GPACDL,pIOPort->GPACDH) | (1<<16) | (1<<5));	//GPACDH[16] is exclusive use of nRSTOUT and '1' is PRESET

	
	// DP0 / DN0
	pIOPort->MISCCR |= (1<<12); //Set USB port as suspend mode	

	
///////////////////////////////////////////////////////////////////////////////////////////	
	// VDD_OP2 IO
	// GPB[10:0], GPH[12:0], GPE[15:14], GPE[4:0]

	
	//GPB
	pIOPort->GPBCON &= ~((0x3<<20)|(0x3<<18)|(0x3<<16)|(0x3<<14)|(0x3<<12)|(0x3<<10)|(0x3<<8)|(0x3<<6)|(0x0<<4)|(0x3<<2)|(0x3<<0));

	pIOPort->GPBCON |= ((0x0<<20)|(0x0<<18)|(0x0<<16)|(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x1<<4)|(0x0<<2)|(0x3<<0));

	
	pIOPort->GPBUDP &= ~((0x3<<20)|(0x3<<18)|(0x3<<16)|(0x3<<14)|(0x3<<12)|(0x3<<10)|(0x3<<8)|(0x3<<6)|(0x0<<4)|(0x3<<2)|(0x3<<0));

	pIOPort->GPBUDP |= ((0x3<<20)|(0x2<<18)|(0x2<<16)|(0x2<<14)|(0x2<<12)|(0x2<<10)|(0x3<<8)|(0x3<<6)|(0x3<<4)|(0x0<<2)|(0x3<<0));

	
	
	//GPE
	pIOPort->GPECON &=~((0xf<<28)|(0x3ff<<0));	

	pIOPort->GPECON |= ((0x0<<30)|(0x0<<28)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));

	pIOPort->GPEUDP &=~((0xf<<28)|(0x3ff<<0));

	pIOPort->GPEUDP |= ((0x0<<30)|(0x0<<28)|(0x0<<8)|(0x3<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));                

	
	pIOPort->GPEDAT &=~ (0xffff<<0);
	pIOPort->GPEDAT |= ((0x1<<15)|(0x1<<14)|(0x1<<4)|(0x1<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));

	
	
	//GPG
	pIOPort->GPGCON &=~(0xffff<<16);
	pIOPort->GPGCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16));
	
	pIOPort->GPGUDP &=~(0xffff<<16);

	pIOPort->GPGUDP |= ((0x2<<30)|(0x0<<28)|(0x3<<26)|(0x3<<24)|(0x0<<22)|(0x3<<20)|(0x3<<18)|(0x3<<16));

	pIOPort->GPGDAT &=~ (0xff<<8);
	pIOPort->GPGDAT |= ((0x0<<15)|(0x0<<14)|(0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|(0x0<<9)|(0x0<<8));

	
	
	//GPH
	pIOPort->GPHCON &=~(0x3fffffff<<0);

	pIOPort->GPHCON |= ((0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));

	pIOPort->GPHUDP &=~(0x3fffffff<<0);

	pIOPort->GPHUDP |= ((0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x3<<20)|(0x0<<18)|(0x3<<16)|(0x3<<6)|(0x0<<4)|(0x3<<2)|(0x0<<0));

	pIOPort->GPHDAT &=~ (0x7fff<<0);
	pIOPort->GPHDAT |= ((0x0<<14)|(0x1<<13)|(0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));

	

///////////////////////////////////////////////////////////////////////////////////////////
	// VDD_SD IO
	// GPE[13:5], GPL[14:0], GPJ[15:13]
	
	//GPE
	pIOPort->GPECON &=~(0x3ffff<<10);
	pIOPort->GPECON |= ((0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)|(0x0<<14)|(0x0<<12)|(0x0<<10));//Set Input All
	
	pIOPort->GPEUDP &=~(0x3ffff<<10);

	pIOPort->GPEUDP |= ((0x0<<26)|(0x0<<24)|(0x0<<22)|(0x3<<20)|(0x3<<18)|(0x3<<16)|(0x3<<14)|(0x3<<12)|(0x0<<10));

	
	pIOPort->GPEDAT &=~ (0x1ff<<5);
	pIOPort->GPEDAT |= ((0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<7)|(0x1<<6)|(0x1<<5));

	
	//GPL
	pIOPort->GPLCON &=~(0x3fffffff<<0);
	pIOPort->GPLCON |= ((0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)|(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	pIOPort->GPLUDP &=~(0x3fffffff<<0);

	pIOPort->GPLUDP |= ((0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x3<<16)|(0x3<<14)|(0x3<<12)|(0x3<<10)|(0x3<<8)|(0x3<<6)|(0x3<<4)|(0x3<<2)|(0x3<<0));

	pIOPort->GPLDAT &=~ (0x1fff<<0);
	pIOPort->GPLDAT |= ((0x0<<14)|(0x0<<13)|(0x0<<12)|(0x0<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x1<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));
	
	//GPJ
	pIOPort->GPJCON &=~(0x3f<<26);
	pIOPort->GPJCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26));
		
	pIOPort->GPJUDP &=~(0x3f<<26);

	pIOPort->GPJUDP |= ((0x0<<30)|(0x0<<28)|(0x0<<26));

	
	pIOPort->GPJDAT &=~ (0x7<<13);
	pIOPort->GPJDAT |= ((0x1<<15)|(0x1<<14)|(0x1<<13));
	




///////////////////////////////////////////////////////////////////////////////////////////	
	// VDD_LCD IO
	// GPC[15:0], GPD[15:0]
	
	//GPC
	pIOPort->GPCCON &=~(0xffffffff<<0);
	pIOPort->GPCCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	
	pIOPort->GPCUDP &=~(0xffffffff<<0);

	pIOPort->GPCUDP |= ((0x2<<30)|(0x2<<28)|(0x2<<26)|(0x2<<24)|(0x2<<22)|(0x2<<20)|(0x2<<18)|(0x2<<16)
	           |(0x2<<14)|(0x2<<12)|(0x2<<10)|(0x2<<8)|(0x2<<6)|(0x2<<4)|(0x2<<2)|(0x2<<0));

	
	pIOPort->GPCDAT &=~ (0x1fff<<0);
	pIOPort->GPCDAT |= ((0x0<<14)|(0x1<<13)|(0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));

	//GPD
	pIOPort->GPDCON &=~(0xffffffff<<0);
	pIOPort->GPDCON |= ((0x0<<30)|(0x0<<28)|(0x0<<26)|(0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));	           
	
	           
	pIOPort->GPDUDP &=~(0xffffffff<<0);

	pIOPort->GPDUDP |= ((0x2<<30)|(0x2<<28)|(0x2<<26)|(0x2<<24)|(0x2<<22)|(0x2<<20)|(0x2<<18)|(0x2<<16)\
	           |(0x2<<14)|(0x2<<12)|(0x2<<10)|(0x2<<8)|(0x2<<6)|(0x2<<4)|(0x2<<2)|(0x2<<0));

	
	pIOPort->GPDDAT &=~ (0xffff<<0);
	pIOPort->GPDDAT |= ((0x0<<14)|(0x1<<13)|(0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));


///////////////////////////////////////////////////////////////////////////////////////////	
	// VDD_CAM IO
	// GPJ[15:0],
	
	//GPJ
	pIOPort->GPJCON &=~(0x3ffffff<<0);
	pIOPort->GPJCON |= ((0x0<<24)|(0x0<<22)|(0x0<<20)|(0x0<<18)|(0x0<<16)\
	           |(0x0<<14)|(0x0<<12)|(0x0<<10)|(0x0<<8)|(0x0<<6)|(0x0<<4)|(0x0<<2)|(0x0<<0));
	           
	pIOPort->GPJUDP &=~(0x3ffffff<<0);

	pIOPort->GPJUDP |= ((0x2<<24)|(0x2<<22)|(0x2<<20)|(0x2<<18)|(0x2<<16)\
	           |(0x2<<14)|(0x2<<12)|(0x2<<10)|(0x2<<8)|(0x2<<6)|(0x2<<4)|(0x2<<2)|(0x2<<0));

	
	pIOPort->GPJDAT &=~ (0x1fff<<0);
	pIOPort->GPJDAT |= ((0x0<<12)|(0x1<<11)|(0x0<<10)|(0x1<<9)|(0x1<<8)\
	             |(0x0<<7)|(0x1<<6)|(0x1<<5)|(0x1<<4)|(0x0<<3)|(0x1<<2)|(0x1<<1)|(0x1<<0));

///////////////////////////////////////////////////////////////////////////////////////////
	// VDD_RMOP
	pIOPort->MSLCON = 0x0;

///////////////////////////////////////////////////////////////////////////////////////////	
	// VDD_SMOP : sleep wakeup iteration fail or not?
	pIOPort->MSLCON = 0x0;

	pIOPort->DATAPDEN &=~((0x1<<0)|(0x1<<1)|(0x1<<2)|(0x1<<3)|(0x1<<4)|(0x1<<5)); // reset value = 0x3f; --> 0x30 = 2uA
	pIOPort->DATAPDEN = (0x3<<4);

}
#endif

#define USE_2CE_NAND

// NFCONF
#define NF_NANDBOOT	(0x1<<31)
#if (BSP_TYPE == BSP_SMDK2443)
#define NF_1BIT_ECC		(0x0<<24)
#define NF_4BIT_ECC		(0x1<<24)
#elif (BSP_TYPE == BSP_SMDK2450)
#define NF_1BIT_ECC		(0x0<<23)
#define NF_4BIT_ECC		(0x2<<23)
#define NF_8BIT_ECC		(0x1<<23)
#endif
#define NF_TACLS(n)		(((n)&0x7)<<12)
#define NF_TWRPH0(n)	(((n)&0x7)<<8)
#define NF_TWRPH1(n)	(((n)&0x7)<<4)

// NFCONT
#define NF_4BIT_ECC_DEC		(0x0<<18)
#define NF_4BIT_ECC_ENC		(0x1<<18)
#define NF_LOCK_TIGHT_EN		(0x1<<17)
#define NF_SOFT_LOCK_EN		(0x1<<16)
#define NF_ECC_ENC_INT_EN		(0x1<<13)
#define NF_ECC_DEC_INT_EN		(0x1<<12)
#define NF_ILLACC_INT_EN		(0x1<<10)
#define NF_RNB_INT_EN			(0x1<<9)
#define NF_RNB_DETECT_RISE		(0x0<<8)
#define NF_RNB_DETECT_FALL		(0x1<<8)
#define NF_MAIN_ECC_UNLOCK	(0x0<<7)
#define NF_MAIN_ECC_LOCK		(0x1<<7)
#define NF_SPARE_ECC_UNLOCK	(0x0<<6)
#define NF_SPARE_ECC_LOCK		(0x1<<6)
#define NF_INIT_MECC			(0x1<<5)
#define NF_INIT_SECC			(0x1<<4)
#define NF_NFCE1				(0x1<<2)
#define NF_NFCE0				(0x1<<1)
#define NF_NFCON_DIS			(0x0)
#define NF_NFCON_EN			(0x1)

// NFSTAT
#define NF_ECC_ENC_DONE	(0x1<<7)
#define NF_ECC_DEC_DONE	(0x1<<6)
#define NF_ILLEGAL_ACCESS	(0x1<<5)
#define NF_RNB_TRANS            (0x1<<4)
#define NF_NFCE1_HI			(0x1<<3)
#define NF_NFCE0_HI			(0x1<<2)
#define NF_RNB_BUSY			(0x0)
#define NF_RNB_READY		(0x1)

// Default NAND Flash timing @HCLK 133MHz (tHCLK = 7.5ns)
#define	 DEFAULT_TACLS		(1)	// 1 HCLK (7.5ns)
//#define	 DEFAULT_TWRPH0	(3)	// 4 HCLK (30ns)
#define	 DEFAULT_TWRPH0	(4)	// 5 HCLK (37.5ns)
#define	 DEFAULT_TWRPH1	(1)	// 2 HCLK (15ns)

// Initialize nand controller for MLC with support 2CE
VOID InitNAND()
{
#if (BSP_TYPE == BSP_SMDK2443)
	volatile S3C2450_NAND_REG * pNANDFConReg = (volatile S3C2450_NAND_REG *)0xB1400000;			// 0x4E000000
	volatile S3C2450_MATRIX_REG * pMatrixConReg = (volatile S3C2450_MATRIX_REG *)0xB1500000;	
#elif (BSP_TYPE ==BSP_SMDK2450)
	volatile S3C2450_NAND_REG * pNANDFConReg = (volatile S3C2450_NAND_REG *)0xB1500000;			// 0x4E000000
	volatile S3C2450_MATRIX_REG * pMatrixConReg = (volatile S3C2450_MATRIX_REG *)0xB1600000;			// 0x4E800000
#endif
	volatile S3C2450_DMA_REG *pDMAConReg = (volatile S3C2450_DMA_REG *)0xB0E00000;				// 0x4B000000

	pNANDFConReg->NFCONF = NF_4BIT_ECC | NF_TACLS(DEFAULT_TACLS) | NF_TWRPH0(DEFAULT_TWRPH0) | NF_TWRPH1(DEFAULT_TWRPH1);
	pNANDFConReg->NFCONT = NF_MAIN_ECC_LOCK | NF_SPARE_ECC_LOCK | NF_INIT_MECC | NF_INIT_SECC | NF_NFCE1 | NF_NFCE0 | NF_NFCON_EN;
	pNANDFConReg->NFSTAT = NF_RNB_READY;	// Clear RnB Transition Detect Bit	

	// Initialize EBICON for 2nd nCE pin (nFCE1)
#ifdef	USE_2CE_NAND
	pMatrixConReg->EBICON |= (0x1<<8);	// Bank1_Cfg -> NAND
#endif

}

VOID BSPPowerOn()
{
    volatile S3C2450_IOPORT_REG *pIOPort = (S3C2450_IOPORT_REG*)OALPAtoVA(S3C2450_BASE_REG_PA_IOPORT, FALSE);
    volatile S3C2450_LCD_REG *pLCD = (S3C2450_LCD_REG*)OALPAtoVA(S3C2450_BASE_REG_PA_LCD, FALSE);
    volatile S3C2450_CLKPWR_REG *pCLKPWR = (S3C2450_CLKPWR_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_CLOCK_POWER, FALSE);
	volatile BSP_ARGS *pBspArgs = (BSP_ARGS*)OALPAtoVA(IMAGE_SHARE_ARGS_PA_START, FALSE);
	OEMInitDebugSerial();

	InitTimer();			// consume 2us
	//OALTimerInit(RESCHED_PERIOD, (OEM_COUNT_1MS), 0);
	//
#if (BSP_TYPE == BSP_SMDK2443)
	InitLDI_LTV350();
#elif (BSP_TYPE == BSP_SMDK2450)
	InitLDI_LTE480();
#endif

	InitNAND();

    
	// USB2.0 and PHY power
	pIOPort->MISCCR&=~(0x1<<12); //USB port = suspend
	//pCLKPWR->USB_PHYPWR |= (0xf<<0);
	pCLKPWR->PWRCFG |= (0x1<<4);
	//pIOPort->GSTATUS2 = pIOPort->GSTATUS2;

    //pIOPort->MISCCR &= ~(1<<12); //USB port0 = normal mode
    //pIOPort->MISCCR &= ~(1<<13); //USB port1 = normal mode

    /* LCD Controller Enable               */
    SETPORT32(&pIOPort->GPGDAT, 1 << 4);

}

#ifdef VARTICK
void	InitTimer()
{
	S3C2450_PWM_REG *pPWMRegs = (S3C2450_PWM_REG*)OALPAtoUA(S3C2450_BASE_REG_PA_PWM);
    UINT32 countsPerSysTick;
    UINT32 tcon;
    
    // Validate Input parameters
    countsPerSysTick = RESCHED_PERIOD * OEM_COUNT_1MS;    
    // Set prescaler 1 to 1 
    //OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) & ~0x0000FF00);
    //OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) | (250-1) <<8);		// charlie, Timer4 scale value
    
     // Set prescaler 1 to 1 
    OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) & ~0x0000FF00);
    OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) | PRESCALER <<8);
    
    // Select MUX input 1/2
    //OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) & ~(0xF << 16));
    //OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (2 << 16));	// charlie, Timer4 Division    
    
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) & ~(0xF << 16));
#if( SYS_TIMER_DIVIDER == D2 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_2 << 16));
#elif ( SYS_TIMER_DIVIDER == D4 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_4 << 16));
#elif ( SYS_TIMER_DIVIDER == D8 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_8 << 16));
#elif ( SYS_TIMER_DIVIDER == D16 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_16 << 16));
#endif

    // Set timer register
    OUTREG32(&pPWMRegs->TCNTB4, countsPerSysTick);

    // Start timer in auto reload mode
    tcon = INREG32(&pPWMRegs->TCON) & ~(0x0F << 20);
    OUTREG32(&pPWMRegs->TCON, tcon | (0x2 << 20) );
    OUTREG32(&pPWMRegs->TCON, tcon | (0x1 << 20) );	
}
#else 
void	InitTimer()
{
	S3C2450_PWM_REG *pPWMRegs = (S3C2450_PWM_REG*)OALPAtoUA(S3C2450_BASE_REG_PA_PWM);
    UINT32 countsPerSysTick;
    UINT32 tcon;
    
    // Validate Input parameters
    countsPerSysTick = RESCHED_PERIOD * OEM_COUNT_1MS;    
    // Set prescaler 1 to 1 
    //OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) & ~0x0000FF00);
    //OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) | (250-1) <<8);		// charlie, Timer4 scale value
    
     // Set prescaler 1 to 1 
    OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) & ~0x0000FF00);
    OUTREG32(&pPWMRegs->TCFG0, INREG32(&pPWMRegs->TCFG0) | PRESCALER <<8);
    
    // Select MUX input 1/2
    //OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) & ~(0xF << 16));
    //OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (2 << 16));	// charlie, Timer4 Division    
    
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) & ~(0xF << 16));
#if( SYS_TIMER_DIVIDER == D2 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_2 << 16));
#elif ( SYS_TIMER_DIVIDER == D4 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_4 << 16));
#elif ( SYS_TIMER_DIVIDER == D8 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_8 << 16));
#elif ( SYS_TIMER_DIVIDER == D16 )
    OUTREG32(&pPWMRegs->TCFG1, INREG32(&pPWMRegs->TCFG1) | (D1_16 << 16));
#endif

    // Set timer register
    OUTREG32(&pPWMRegs->TCNTB4, countsPerSysTick);

    // Start timer in auto reload mode
    tcon = INREG32(&pPWMRegs->TCON) & ~(0x0F << 20);
    OUTREG32(&pPWMRegs->TCON, tcon | (0x2 << 20) );
    OUTREG32(&pPWMRegs->TCON, tcon | (0x5 << 20) );	
}

#endif