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📄 usb.c

📁 smdk2416 wince source code/BSP
💻 C
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		Outp32(EP_CON_REG, EP_FIFO_FLUSH);
		return;
	}

	if (ep3csr & EP_RX_SUCCESS)
	{
		//EdbgOutputDebugString("EP3_RX_PKT_SUCCESS\n");
		/*
		if (g_uDownloadFileSize==0)
		{
			UINT8  TempBuf[16];
			UINT32 uUploadSize;
			UINT32  uUploadAddr;

			Inp32(BYTE_READ_CNT_REG, fifoCnt);
		
			if (fifoCnt == 5)
			{
				RdPktEp3((UINT8 *)TempBuf, 10);
				temp = *((UINT8 *)(TempBuf+8))+
					(*((UINT8 *)(TempBuf+9))<<8);
				EdbgOutputDebugString("temp: %x\n", temp);
				if (temp==0x1)
				{
					uUploadAddr =
						*((UINT8 *)(TempBuf+0))+
						(*((UINT8 *)(TempBuf+1))<<8)+
						(*((UINT8 *)(TempBuf+2))<<16)+
						(*((UINT8 *)(TempBuf+3))<<24);

					uUploadSize =
						*((UINT8 *)(TempBuf+4))+
						(*((UINT8 *)(TempBuf+5))<<8)+
						(*((UINT8 *)(TempBuf+6))<<16)+
						(*((UINT8 *)(TempBuf+7))<<24);
				
					//EdbgOutputDebugString("UploadAddress : %x, UploadSize: %x\n", uUploadAddr, uUploadSize);
					if (g_eOpMode == USB_CPU)
					{
						//EdbgOutputDebugString("CPU_MODE Bulk In Function\n");
						g_uBulkInCount = uUploadSize;
						PrepareEp1Fifo(uUploadAddr);
					}
					else
					{
						//EdbgOutputDebugString("DMA_MODE Bulk In Function\n");
						Outp32(FCON, DMA_ENABLE);				// USB Dma Enable in Core Outside
						Outp32(INDEX_REG, EP1);					// IN Direction  Device -> Host
						Outp32(DMA_IF_CON_REG, MAX_BURST_INCR16);
						Outp32(BYTE_WRITE_CNT_REG, g_uEp1MaxPktSize);
						Outp32(MAX_PKT_REG, g_uEp1MaxPktSize);
						Outp32(DMA_FIFO_CNT_REG, g_uEp1MaxPktSize);
						Outp32(DMA_CNT_REG, g_uEp1MaxPktSize);
						Outp32(DMA_MEM_BASE_ADDR, uUploadAddr);
						Outp32(DMA_TOTAL_CNT1_REG, (UINT16)uUploadSize);
						Outp32(DMA_TOTAL_CNT2_REG, (UINT16)(uUploadSize>>16));
						Outp32(DMA_CON_REG, DMA_FLY_ENABLE|DMA_TX_START|USB_DMA_MODE);
					}
				}
				g_uDownloadFileSize=0;
				return;
			}
			else
			{
			//	printf("^");
				RdPktEp3((UINT8 *)TempBuf, 8);
				if (ep3csr&(0x1<<4))
					fifoCntByte = fifoCnt * 2 -1;
				else
					fifoCntByte = fifoCnt * 2;
				//EdbgOutputDebugString("downloadFileSize==0, 1'st BYTE_READ_CNT_REG : %x\n", fifoCntByte);
				g_uDownloadAddress=
					*((UINT8 *)(TempBuf+0))+
					(*((UINT8 *)(TempBuf+1))<<8)+
					(*((UINT8 *)(TempBuf+2))<<16)+
					(*((UINT8 *)(TempBuf+3))<<24);

				g_uDownloadFileSize=
					*((UINT8 *)(TempBuf+4))+
					(*((UINT8 *)(TempBuf+5))<<8)+
					(*((UINT8 *)(TempBuf+6))<<16)+
					(*((UINT8 *)(TempBuf+7))<<24);

				g_pDownPt=(UINT8 *)g_uDownloadAddress;
				//EdbgOutputDebugString("downloadAddress : %x, downloadFileSize: %x\n", g_uDownloadAddress, g_uDownloadFileSize);
				//printf("downloadAddress : %x, downloadFileSize: %x\n", g_uDownloadAddress, g_uDownloadFileSize));
				downloadAddress =g_uDownloadAddress; // add by cha
				downloadFileSize =g_uDownloadFileSize; // add by cha
				
				RdPktEp3((UINT8 *)g_pDownPt, fifoCntByte-8); // The first 8-bytes are deleted.

				if (g_eOpMode == USB_CPU)
				{
					if (ep3csr & (0x2<<2))
					{
						Inp32(BYTE_READ_CNT_REG, fifoCnt);
						if (ep3csr&(0x1<<4))
							fifoCntByte = fifoCnt * 2 -1;
						else
							fifoCntByte = fifoCnt * 2;
						//EdbgOutputDebugString("2'd BYTE_READ_CNT_REG : %x\n", fifoCntByte);
						RdPktEp3((UINT8 *)g_pDownPt, fifoCntByte);
					}
				}
				else
				{
					Outp32(FCON, DMA_ENABLE);				// USB Dma Enable in Core Outside
					Outp32(INDEX_REG, EP3);					// OUT Direction  Host -> Device
					Outp32(DMA_IF_CON_REG, MAX_BURST_INCR16);
					Outp32(MAX_PKT_REG, g_uEp3MaxPktSize);
					Outp32(DMA_FIFO_CNT_REG, g_uEp3MaxPktSize);
					Outp32(DMA_CNT_REG, g_uEp3MaxPktSize);
					Outp32(DMA_MEM_BASE_ADDR, g_uDownloadAddress+fifoCntByte-8);
					Inp32(DMA_MEM_BASE_ADDR, temp);
					//EdbgOutputDebugString("DMA_MEM_BASE_ADDR : %x\n", temp);
					Outp32(DMA_TOTAL_CNT1_REG, (UINT16)(g_uDownloadFileSize-fifoCntByte));
					Outp32(DMA_TOTAL_CNT2_REG, (UINT16)(g_uDownloadFileSize>>16));
					//EdbgOutputDebugString("Out Direction DMA RX Start\n");
					Outp32(DMA_CON_REG, DMA_FLY_ENABLE|DMA_RX_START|USB_DMA_MODE);
				}
			}
		}

		else*/
		{
			if (g_eOpMode == USB_CPU)
			{
				Inp32(BYTE_READ_CNT_REG, fifoCnt);
				if (ep3csr&(0x1<<4))
					fifoCntByte = fifoCnt * 2 -1;
				else
					fifoCntByte = fifoCnt * 2;
				//EdbgOutputDebugString("downloadFileSize!=0, 0x%x 1'st BYTE_READ_CNT_REG : %x\n", g_pDownPt, fifoCntByte);
				RdPktEp3((UINT8 *)g_pDownPt, fifoCntByte);

				if (ep3csr & (0x2<<2))
				{
					Inp32(BYTE_READ_CNT_REG, fifoCnt);
					if (ep3csr&(0x1<<4))
						fifoCntByte = fifoCnt * 2 -1;
					else
						fifoCntByte = fifoCnt * 2;
					//EdbgOutputDebugString("2'd BYTE_READ_CNT_REG : %x\n", fifoCntByte);
					RdPktEp3((UINT8 *)g_pDownPt, fifoCntByte);
				}
			}
		}
	}

	if (DMA_TOTAL_COUNT_ZERO & ep3csr)
	{
		//EdbgOutputDebugString("USB_DMA_MODE, DMA RX Done(DMA_TOTAL_COUNT_ZERO) !!\n");
		Outp32(DMA_CON_REG, DMA_RX_STOP|USB_INT_MODE);
		Outp32(FCON, DMA_DISABLE);
	}
}

#define    BIT_ALLMSK       (0xffffffff)
#define    BIT_USBD         (0x1<<IRQ_USBD)

#ifdef _EBOOT_SLEEP_
#define    BIT_EINT0         (0x1<<IRQ_EINT0)
#endif

void Isr_Init(void)
{
   	volatile S3C2450_INTR_REG *s2450INT = (S3C2450_INTR_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_INTR, FALSE);

#if (BSP_TYPE == BSP_SMDK2443)
	s2450INT->INTMOD=0x0;	  // All=IRQ mode
	s2450INT->INTMSK=BIT_ALLMSK;	  // All interrupt is masked.

//	//EdbgOutputDebugString("INFO: (unsigned)IsrUsbd : 0x%x\r\n", (unsigned)IsrUsbd);
//	//EdbgOutputDebugString("INFO: (unsigned)IsrHandler : 0x%x\r\n", (unsigned)IsrHandler);

	// make value to assemble code "b IsrHandler"
//	EdbgOutputDebugString("INFO: (unsigned)pISR : 0x%x\r\n", (unsigned)pISR);
	pISR =(unsigned)(0xEA000000)+(((unsigned)IsrHandler - (0x8C000000 + 0x18 + 0x8) )>>2);

//	EdbgOutputDebugString("INFO: (unsigned)pISR : 0x%x\r\n", (unsigned)pISR);
//	EdbgOutputDebugString("INFO: (unsigned)IsrHandler : 0x%x\r\n", (unsigned)IsrHandler);

	if (s2450INT->SRCPND & BIT_USBD) s2450INT->SRCPND  = BIT_USBD;
	if (s2450INT->INTPND & BIT_USBD) s2450INT->INTPND = BIT_USBD;
	s2450INT->INTMSK &= ~BIT_USBD;		// USB Interrupt enable.

#elif (BSP_TYPE == BSP_SMDK2450)
	s2450INT->INTMOD1=0x0;	  // All=IRQ mode
	s2450INT->INTMSK1=BIT_ALLMSK;	  // All interrupt is masked.
	//	//EdbgOutputDebugString("INFO: (unsigned)IsrUsbd : 0x%x\r\n", (unsigned)IsrUsbd);
//	//EdbgOutputDebugString("INFO: (unsigned)IsrHandler : 0x%x\r\n", (unsigned)IsrHandler);

	// make value to assemble code "b IsrHandler"
//	EdbgOutputDebugString("INFO: (unsigned)pISR : 0x%x\r\n", (unsigned)pISR);
	pISR =(unsigned)(0xEA000000)+(((unsigned)IsrHandler - (0x80000000 + 0x18 + 0x8) )>>2);

//	EdbgOutputDebugString("INFO: (unsigned)pISR : 0x%x\r\n", (unsigned)pISR);
//	EdbgOutputDebugString("INFO: (unsigned)IsrHandler : 0x%x\r\n", (unsigned)IsrHandler);

	if (s2450INT->SRCPND1 & BIT_USBD) s2450INT->SRCPND1  = BIT_USBD;
	if (s2450INT->INTPND1 & BIT_USBD) s2450INT->INTPND1 = BIT_USBD;
	s2450INT->INTMSK1 &= ~BIT_USBD;		// USB Interrupt enable.

#ifdef _EBOOT_SLEEP_
	if (s2450INT->SRCPND1 & BIT_EINT0) s2450INT->SRCPND1  = BIT_EINT0;
	if (s2450INT->INTPND1 & BIT_EINT0) s2450INT->INTPND1 = BIT_EINT0;
	s2450INT->INTMSK1 &= ~BIT_EINT0;	// EINT0 Interrupt enable.
#endif
#endif


}

void IsrUsbd(unsigned int val)
{    
   	volatile S3C2450_INTR_REG *s2450INT = (S3C2450_INTR_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_INTR, FALSE);	
	UINT32 uStatus;
	UINT16 ep_int_status, ep_int;
	
	Inp32(SYS_STATUS_REG, uStatus); // System status read
	//EdbgOutputDebugString("SYS_STATUS_REG : %x \n", uStatus);

	if (uStatus & INT_REG_VBUS)
	{
		Outp32(SYS_STATUS_REG, INT_REG_VBUS); // Interrupt Clear
		//EdbgOutputDebugString("\n [USB_Diag_Log]  :  INT_REG_VBUS\n");
	}

	if (uStatus & 0xff80) 	 // Error interrupt check
	{
		Outp32(SYS_STATUS_REG, INT_ERR); // Interrupt Clear
		//EdbgOutputDebugString("\n [USB_Diag_Log]  :  Error_INT\n");
	}

	// Which USB interrupts happen
	if (uStatus & INT_REG_SUSPEND)
	{
		Outp32(SYS_STATUS_REG, INT_REG_SUSPEND); // Interrupt Clear
		//EdbgOutputDebugString("\n [USB_Diag_Log]  : Suspend Mode");
	}

	if (uStatus & INT_REG_RESUME)
	{
		Outp32(SYS_STATUS_REG, INT_REG_RESUME); // Host software send ClearPortFeature. Interrupt Clear
		//EdbgOutputDebugString("\n [USB_Diag_Log]  : Resume Mode \n");
	}

	if (uStatus & INT_REG_RESET) // Reset interrupt
	{
		Outp32(SYS_STATUS_REG, INT_REG_RESET); // Interrupt Clear
		SetEndpoint();
		g_uEp0State = EP0_STATE_INIT;
		//EdbgOutputDebugString("\n [USB_Diag_Log]  : Reset Mode \n");
	}

	if (uStatus & INT_REG_SDE) // Device Speed Detection interrupt
	{
		Outp32(SYS_STATUS_REG, INT_REG_SDE); // Interrupt Clear
		//EdbgOutputDebugString("\n [USB_Diag_Log]  : Speed Detection interrupt \n");

		if (uStatus & INT_REG_HSP) // Set if Device is High speed or Full speed
		{
			Outp32(SYS_STATUS_REG, INT_REG_HSP); // High Speed Device Interrupt Clear?? may be not.
			//EdbgOutputDebugString("\n [USB_Diag_Log]  : High Speed Detection\n");
			SetMaxPktSizes(USB_HIGH);
			SetDescriptorTable();
		}
		else
		{
			SetMaxPktSizes(USB_FULL);
			SetDescriptorTable();
		}
	}

	Inp32(EP_STATUS_REG, ep_int_status); // EP interrrupt status read
	//EdbgOutputDebugString("EP_STATUS_REG : %x \n", ep_int_status);
	Inp32(EP_INT_REG, ep_int);
	//EdbgOutputDebugString("EP_INT_REG : %x \n", ep_int);

	if (ep_int & INT_REG_EP0)
	{
 		//DbgUsb(("\n [USB_Diag_Log]  :  Control Transfer Interrupt \n"));
		Outp32(EP_INT_REG, INT_REG_EP0); // Interrupt Clear
		HandleEvent_EP0();
	}

	// Endpoint1 bulkIn
	else if (ep_int & INT_REG_EP1)
	{
		Outp32(EP_INT_REG, INT_REG_EP1); // Interrupt Clear
	//	EdbgOutputDebugString("\n [USB_Diag_Log]  :  Ep1 Interrupt  \n");
		HandleEvent_BulkIn();
	}

	// Endpoint2 bulkOut
	else if (ep_int & INT_REG_EP3)
	{
	//	EdbgOutputDebugString("\n [USB_Diag_Log]  :  Bulk Out Transfer Interrupt  \n");
		Outp32(EP_INT_REG, INT_REG_EP3); // Interrupt Clear
	//	printf("*");
		HandleEvent_BulkOut();
	}

#if (BSP_TYPE == BSP_SMDK2443)
	if (s2450INT->INTPND & BIT_USBD)
	{
		s2450INT->SRCPND  = BIT_USBD;
		if (s2450INT->INTPND & BIT_USBD) s2450INT->INTPND = BIT_USBD;
	}	
#elif (BSP_TYPE == BSP_SMDK2450)
if (s2450INT->INTPND1 & BIT_USBD)
	{
		s2450INT->SRCPND1  = BIT_USBD;
		if (s2450INT->INTPND1 & BIT_USBD) s2450INT->INTPND1 = BIT_USBD;
	}	
#endif	
	
	
}

#ifdef _EBOOT_SLEEP_
void IsrPowerButton(void)
{  
   	volatile S3C2450_INTR_REG *s2450INT = (S3C2450_INTR_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_INTR, FALSE);	

	RETAILMSG(1,(TEXT("\nEboot Sleep Button(EINT0) Pressed!!\r\n")));
	if (s2450INT->INTPND1 & BIT_EINT0)
	{
		s2450INT->SRCPND1  = BIT_EINT0;
		if (s2450INT->INTPND1 & BIT_EINT0) s2450INT->INTPND1 = BIT_EINT0;
		OEMPowerOff();
	}
}

extern void OALCPUPowerOff(void);

void OEMPowerOff()
{
	volatile S3C2450_IOPORT_REG *pIOPort = (S3C2450_IOPORT_REG*)OALPAtoVA(S3C2450_BASE_REG_PA_IOPORT, FALSE);
	volatile S3C2450_CLKPWR_REG *pCLKPWR = (S3C2450_CLKPWR_REG*)OALPAtoVA(S3C2450_BASE_REG_PA_CLOCK_POWER, FALSE);
	volatile S3C2450_LCD_REG    *s2450LCD = (S3C2450_LCD_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_LCD, FALSE);

	// Go into power off mode
	pIOPort->GPACON = 0xFFFFFFFF;
	pIOPort->GPADAT = 0x1FFFF;
	
	pCLKPWR->INFORM1 = 0xEB;

    //For USB
    pCLKPWR->USB_CLKCON = (0<<31)|(0<<2)|(0<<1)|(0<<0); //pullup disable
		// disable the PHY Power	
	pCLKPWR->PWRCFG &= ~(1<<4);
	
		// Set the Normal mode regulator disable
	pIOPort->GPHCON = (pIOPort->GPHCON & ~(0x3<<28)) | (0x1<<28);
	pIOPort->GPHUDP = (pIOPort->GPHUDP & ~(0x3<<28)) | (0x2<<28);      
	pIOPort->GPHDAT = (pIOPort->GPHDAT & ~(0x1<<14));  
	pIOPort->MISCCR |= (1<<12);
    
    //For Display
    s2450LCD->WIN0MAP &= ~(1<<24);
	s2450LCD->WIN1MAP &= ~(1<<24);
    s2450LCD->VIDCON0   = 0;
	s2450LCD->VIDCON1   = 0;
	s2450LCD->VIDTCON0   = 0;
	s2450LCD->VIDTCON1   = 0;
	s2450LCD->VIDTCON2   = 0;
	s2450LCD->WINCON0 = 0;
	s2450LCD->WINCON1 = 0;
	s2450LCD->VIDOSD0A = 0;
	s2450LCD->VIDOSD0B    = 0;
	s2450LCD->VIDOSD0C      = 0;
	s2450LCD->VIDW00ADD0B0      = 0;
	s2450LCD->VIDW00ADD1B0      = 0;
	s2450LCD->VIDW00ADD2B0      = 0;	
 
    //Here, Please set the state of GPIO as the lowest power along to your platform 
        
    // For IROM Boot
    pIOPort->GPCCON    &= ~(0x3f<<10);
    pIOPort->GPCUDP &= ~(0x3f<<10);
    
 	OALCPUPowerOff();

	pCLKPWR->RSTCON |= pCLKPWR->RSTCON;		// This is for control GPIO pads.	
}
#endif

#pragma optimize ("",off)
BOOL UbootReadData(DWORD cbData, LPBYTE pbData)
{ 	
   	volatile S3C2450_INTR_REG *s2450INT = (S3C2450_INTR_REG *)OALPAtoVA(S3C2450_BASE_REG_PA_INTR, FALSE);	
   	UINT8* pbuf = NULL;
	//RETAILMSG(1,(TEXT("UbootReadData\n")));
	while(1)
	{
		//RETAILMSG(1,(TEXT("0x%x 0x%x\n"), g_pDownPt, (readPtIndex + cbData)));
		if ((UINT32)g_pDownPt >= readPtIndex + cbData )
		{
			pbuf = (PVOID)readPtIndex;
			memcpy((PVOID)pbData, pbuf, cbData);
			pbuf = (PVOID)OALPAtoUA(readPtIndex);
			// clear partial download memory to 0xff because data is already copied to buffer(pbData)
			memset(pbuf, 0xff, cbData);
			readPtIndex += cbData;
			break;
		}
		else if((UINT32)g_pDownPt == DMABUFFER)
		{
			/*
			if (s2450INT->SRCPND & BIT_USBD) s2450INT->SRCPND  = BIT_USBD;
			if (s2450INT->INTPND & BIT_USBD) s2450INT->INTPND = BIT_USBD;
			s2450INT->INTMSK &= ~BIT_USBD;		// USB Interrupt enable.
			*/
		}
	}
	
	return TRUE;
}
#pragma optimize ("",on)

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