📄 def596.h
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#define CS_WRSS 0x0004 /* Control write status stage */
#define CS_WRDS 0x0003 /* Control write data stage */
#define CS_RDSS 0x0002 /* Control read status stage */
#define CS_RDDS 0x0001 /* Control read data stage */
#define CS_IDST 0x0000 /* Idle or setup stage */
/* Interrupt Status Register 1 */
#define INTSTS1 (*((REGP *)(USB_BASE+0x42)))
#define BCHG (0x4000) /* b14: USB bus chenge interrupt */
#define DTCH (0x1000) /* b12: Detach sense interrupt */
#define SIGN (0x0020) /* b5: SETUP IGNORE interrupt */
#define SACK (0x0010) /* b4: SETUP ACK interrupt */
/* Frame Number Register */
#define FRMNUM (*((REGP *)(USB_BASE+0x4C)))
#define OVRN (0x8000) /* b15: Overrun error */
#define CRCE (0x4000) /* b14: Received data error */
#define SOFRM (0x0800) /* b11: SOF output mode */
#define FRNM (0x07FF) /* b10-0: Frame number */
/* Micro Frame Number Register */
#define UFRMNUM (*((REGP *)(USB_BASE+0x4E)))
#define UFRNM (0x0007) /* b2-0: Micro frame number */
/* USB Address / Low Power Status Recovery Register */
#define RECOVER (*((REGP *)(USB_BASE+0x50)))
#define STSRECOV (0x0700) /* Status recovery */
#define STSR_HI 0x0400 /* FULL(0) or HI(1) Speed */
#define STSR_DEFAULT 0x0100 /* Default state */
#define STSR_ADDRESS 0x0200 /* Address state */
#define STSR_CONFIG 0x0300 /* Configured state */
#define USBADDR (0x007F) /* b6-0: USB address */
/* USB Request Type Register */
#define USBREQ (*((REGP *)(USB_BASE+0x54)))
#define bRequest (0xFF00) /* b15-8: bRequest */
#define GET_STATUS 0x0000
#define CLEAR_FEATURE 0x0100
#define ReqRESERVED 0x0200
#define SET_FEATURE 0x0300
#define ReqRESERVED1 0x0400
#define SET_ADDRESS 0x0500
#define GET_DESCRIPTOR 0x0600
#define SET_DESCRIPTOR 0x0700
#define GET_CONFIGURATION 0x0800
#define SET_CONFIGURATION 0x0900
#define GET_INTERFACE 0x0A00
#define SET_INTERFACE 0x0B00
#define SYNCH_FRAME 0x0C00
#define bmRequestType (0x00FF) /* b7-0: bmRequestType */
#define bmRequestTypeDir (0x0080) /* b7 : Data transfer direction */
#define HOST_TO_DEVICE 0x0000
#define DEVICE_TO_HOST 0x0080
#define bmRequestTypeType (0x0060) /* b6-5: Type */
#define STANDARD 0x0000
#define CLASS 0x0020
#define VENDER 0x0040
#define bmRequestTypeRecip (0x001F) /* b4-0: Recipient */
#define DEVICE 0x0000
#define INTERFACE 0x0001
#define ENDPOINT 0x0002
/* USB Request Value Register */
#define USBVAL (*((REGP *)(USB_BASE+0x56)))
#define wValue (0xFFFF) /* b15-0: wValue */
/* Standard Feature Selector */
#define ENDPOINT_HALT 0x0000
#define DEVICE_REMOTE_WAKEUP 0x0001
#define TEST_MODE 0x0002
/* Descriptor Types */
#define DT_TYPE (0xFF00)
#define DT_DEVICE 0x0100
#define DT_CONFIGURATION 0x0200
#define DT_STRING 0x0300
#define DT_INTERFACE 0x0400
#define DT_ENDPOINT 0x0500
#define DT_DEVICE_QUALIFIER 0x0600
#define DT_OTHER_SPEED_CONFIGURATION 0x0700
#define DT_INTERFACE_POWER 0x0800
#define DT_INDEX (0x00FF)
#define CONF_NUM (0x00FF)
#define ALT_SET (0x00FF)
/* USB Request Index Register */
#define USBINDX (*((REGP *)(USB_BASE+0x58)))
#define wIndex (0xFFFF) /* b15-0: wIndex */
#define TEST_SELECT (0xFF00) /* b15-b8: Test Mode Selectors */
#define TEST_J 0x0100 /* Test_J */
#define TEST_K 0x0200 /* Test_K */
#define TEST_SE0_NAK 0x0300 /* Test_SE0_NAK */
#define TEST_PACKET 0x0400 /* Test_Packet */
#define TEST_FORCE_ENABLE 0x0500 /* Test_Force_Enable */
#define TEST_STSelectors 0x0600 /* Standard test selectors */
#define TEST_Reserved 0x4000 /* Reserved */
#define TEST_VSTModes 0xC000 /* Vendor-specific test modes */
#define EP_DIR (0x0080) /* b7: Endpoint Direction */
#define EP_DIR_IN 0x0080
#define EP_DIR_OUT 0x0000
/* USB Request Length Register */
#define USBLENG (*((REGP *)(USB_BASE+0x5A)))
#define wLength (0xFFFF) /* b15-0: wLength */
/* Default Control Pipe Configuration Register */
#define DCPCFG (*((REGP *)(USB_BASE+0x5C)))
#define CNTMD (0x0100) /* b8: Continuous transfer mode select */
#define DIR (0x0010) /* b4: Control transfer DIR select */
/* Default Control Pipe Maxpacket Size Register */
#define DCPMAXP (*((REGP *)(USB_BASE+0x5E)))
#define DEVSEL (0xC000) /* b15-14: Device address select */
#define DEVICE_0 0x0000 /* Device address 0 */
#define DEVICE_1 0x4000 /* Device address 1 */
#define DEVICE_2 0x8000 /* Device address 2 */
#define DEVICE_3 0xC000 /* Device address 3 */
#define MAXP (0x007F) /* b6-0: Maxpacket size of default control pipe */
/* Default Control Pipe Control Register */
#define DCPCTR_ADR (USB_BASE+0x60)
#define DCPCTR (*((REGP *)(DCPCTR_ADR)))
#define BSTS (0x8000) /* b15: Buffer status */
#define SUREQ (0x4000) /* b14: Send USB request */
#define SQCLR (0x0100) /* b8: Sequence toggle bit clear */
#define SQSET (0x0080) /* b7: Sequence toggle bit set */
#define SQMON (0x0040) /* b6: Sequence toggle bit monitor */
#define CCPL (0x0004) /* b2: Enable control transfer complete */
#define PID (0x0003) /* b1-0: Response PID */
#define PID_STALL 0x0002 /* STALL */
#define PID_BUF 0x0001 /* BUF */
#define PID_NAK 0x0000 /* NAK */
/* Pipe Window Select Register */
#define PIPESEL (*((REGP *)(USB_BASE+0x64)))
#define PIPENM (0x0007) /* b2-0: Pipe select */
#define PIPE0 0x0000 /* PIPE 0 */
#define PIPE1 0x0001 /* PIPE 1 */
#define PIPE2 0x0002 /* PIPE 2 */
#define PIPE3 0x0003 /* PIPE 3 */
#define PIPE4 0x0004 /* PIPE 4 */
#define PIPE5 0x0005 /* PIPE 5 */
#define PIPE6 0x0006 /* PIPE 6 */
#define PIPE7 0x0007 /* PIPE 7 */
/* Pipe Configuration Register */
#define PIPECFG (*((REGP *)(USB_BASE+0x66)))
#define TYP (0xC000) /* b15-14: Transfer type */
#define ISO 0xC000 /* Isochronous */
#define INT 0x8000 /* Interrupt */
#define BULK 0x4000 /* Bulk */
#define BFRE (0x0400) /* b10: Buffer ready interrupt mode select */
#define DBLB (0x0200) /* b9: Double buffer mode select */
#define CNTMD (0x0100) /* b8: Continuous transfer mode select */
#define SHTNAK (0x0080) /* b7: Transfer end NAK */
#define DIR (0x0010) /* b4: Transfer direction select */
#define DIR_H_OUT 0x0010 /* HOST OUT */
#define DIR_P_IN 0x0010 /* PERI IN */
#define DIR_H_IN 0x0000 /* HOST IN */
#define DIR_P_OUT 0x0000 /* PERI OUT */
#define EPNUM (0x000F) /* b3-0: Eendpoint number select */
#define EP1 0x0001
#define EP2 0x0002
#define EP3 0x0003
#define EP4 0x0004
#define EP5 0x0005
#define EP6 0x0006
#define EP7 0x0007
#define EP8 0x0008
#define EP9 0x0009
#define EP10 0x000A
#define EP11 0x000B
#define EP12 0x000C
#define EP13 0x000D
#define EP14 0x000E
#define EP15 0x000F
/* Pipe Buffer Configuration Register */
#define PIPEBUF (*((REGP *)(USB_BASE+0x68)))
#define BUFSIZE (0x7C00) /* b14-10: Pipe buffer size */
#define BUF_SIZE(x) ((((x) / 64) - 1) << 10)
#define BUFNMB (0x00FF) /* b7-0: Pipe buffer number */
/* Pipe Maxpacket Size Register */
#define PIPEMAXP (*((REGP *)(USB_BASE+0x6A)))
#define DEVSEL (0xC000)
#define MXPS (0x07FF) /* b10-0: Maxpacket size */
/* Pipe Cycle Configuration Register */
#define PIPEPERI (*((REGP *)(USB_BASE+0x6C)))
#define IFIS (0x1000) /* b12: Isochronous in-buffer flush mode select */
#define IITV (0x0007) /* b2-0: Isochronous interval */
/* Pipex Control Register */
#define PIPECTR_ADR (USB_BASE+0x70)
#define PIPE1CTR (*((REGP *)(USB_BASE+0x70)))
#define PIPE2CTR (*((REGP *)(USB_BASE+0x72)))
#define PIPE3CTR (*((REGP *)(USB_BASE+0x74)))
#define PIPE4CTR (*((REGP *)(USB_BASE+0x76)))
#define PIPE5CTR (*((REGP *)(USB_BASE+0x78)))
#define PIPE6CTR (*((REGP *)(USB_BASE+0x7A)))
#define PIPE7CTR (*((REGP *)(USB_BASE+0x7C)))
#define BSTS (0x8000) /* b15: Buffer status */
#define INBUFM (0x4000) /* b14: IN buffer monitor (Only for PIPE1 to 5) */
#define ACLRM (0x0200) /* b9: Out buffer auto clear mode */
#define SQCLR (0x0100) /* b8: Sequence toggle bit clear */
#define SQSET (0x0080) /* b7: Sequence toggle bit set */
#define SQMON (0x0040) /* b6: Sequence toggle bit monitor */
#define PID (0x0003) /* b1-0: Response PID */
/* Invalid Register. for CS-return from PCUT */
#define INVALID_REG (*((REGP *)(USB_BASE+0x7E)))
/* GET_STATUS request to a device returns the information */
#define GS_HALT 0x01
#define GS_BUSPOWERD 0x00
#define GS_SELFPOWERD 0x01
#define GS_REMOTEWAKEUP 0x02
/* USB ASSP DEFINE */
#define MAX_EP_NO 15 /* EP0 EP1 ... EP15 */
#define MAX_PIPE_NO 7 /* PIPE0 ... PIPE7 */
#define EPL 5 /* Endpoint Table Length */
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