clock.fit.summary

来自「一些Verilog学习程序A」· SUMMARY 代码 · 共 15 行

Fitter Status : Successful - Sat Aug 15 23:11:21 2009
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : clock
Top-level Entity Name : clock
Family : Cyclone II
Device : EP2C5T144C8
Timing Models : Final
Total logic elements : 172 / 4,608 ( 4 % )
Total registers : 61
Total pins : 33 / 89 ( 37 % )
Total virtual pins : 0
Total memory bits : 0 / 119,808 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )