account.map.qmsg

一些Verilog学习程序A

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Aug 15 23:15:18 2009 " "Info: Processing started: Sat Aug 15 23:15:18 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off account -c account " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off account -c account" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Error" "EVRFX_VERI_SYNTAX_ERROR" "\"3\";  expecting \"@\", or \"end\", or an identifier, or a system task, or \"\{\", or a sequential statement,  account.v(59) " "Error (10170): Verilog HDL syntax error at account.v(59) near text \"3\";  expecting \"@\", or \"end\", or an identifier, or a system task, or \"\{\", or a sequential statement, " {  } { { "account.v" "" { Text "F:/Verilog/电话计费器程序/account.v" 59 0 0 } }  } 0 10170 "Verilog HDL syntax error at %2!s! near text %1!s!" 0 0}
{ "Error" "EVRFX_VERI_SYNTAX_ERROR" "\"else\";  expecting \"endcase\", or an identifier (\"else\" is a reserved keyword ), or a number, or a system task, or \"(\", or \"\{\", or unary operator,  account.v(65) " "Error (10170): Verilog HDL syntax error at account.v(65) near text \"else\";  expecting \"endcase\", or an identifier (\"else\" is a reserved keyword ), or a number, or a system task, or \"(\", or \"\{\", or unary operator, " {  } { { "account.v" "" { Text "F:/Verilog/电话计费器程序/account.v" 65 0 0 } }  } 0 10170 "Verilog HDL syntax error at %2!s! near text %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "account.v 0 0 " "Info: Found 0 design units, including 0 entities, in source file account.v" {  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 2 s 0 s Quartus II " "Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 0 warnings" { { "Error" "EQEXE_END_BANNER_TIME" "Sat Aug 15 23:15:18 2009 " "Error: Processing ended: Sat Aug 15 23:15:18 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Error" "EQEXE_ELAPSED_TIME" "00:00:01 " "Error: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}