90_viic.asm

avr单片机软件模拟viic协议

.device at90s8515
.org $0000
	rjmp main 
.equ	VSCL			=1			; SCL Pin number (port D)
.equ	VSDA			=0			; SDA Pin number (port D)
.equ	ack_symbol   		=0
.equ	data_number		=$063
.equ 	viic_port		=ddra
.equ	slave_write_address	=$060
.equ 	slave_read_address	=$061
.equ	write_start_address	=$088
.equ	read_start_address	=$099
.equ	sph			=0x3e
.equ	spl			=0x3d
.def	viicdelay		= r16			; Delay loop variable
.def	viic_data		= r17			; I2C data transfer register
.def	bit_number		= r18
.org $0010
main:	ldi	r16,$02
	out	sph,r16
	ldi	r16,$5f
	out	spl,r16
	rjmp 	write_byte

;延时	
VIIC_hp_delay:
	ldi	VIICdelay,2
VIIC_hp_delay_loop:
	dec	VIICdelay
	brne	VIIC_hp_delay_loop
	ret

VIIC_qp_delay:
	ldi	VIICdelay,vscl	
VIIC_qp_delay_loop:
	dec	VIICdelay
	brne	VIIC_qp_delay_loop
	ret  
	 
VIIC_START: 
	sbi 	viic_port,vsda
	sbi 	viic_port,vscl
	rcall 	viic_hp_delay
	cbi 	viic_port,vsda
	rcall 	viic_hp_delay
	cbi 	viic_port,vscl
	ret  
	
viic_stop:
	cbi 	viic_port,vsda
	sbi 	viic_port,vscl
	rcall 	viic_hp_delay
	sbi 	viic_port,vsda
	rcall 	viic_hp_delay
	cbi 	viic_port,vscl
	cbi 	viic_port,vsda
	ret
main_ack:
	cbi 	viic_port,vsda
	sbi 	viic_port,vscl
	rcall 	viic_hp_delay
	cbi 	viic_port, vscl
	sbi 	viic_port,vsda
	ret
	
main_no_ack:
	sbi 	viic_port,vsda
	sbi 	viic_port,vscl
	rcall 	viic_hp_delay
	cbi 	viic_port,vscl
	cbi 	viic_port,vsda  
	ret   
	
check_ack:
	sbi 	viic_port,vsda
	sbi	viic_port,vscl
	cbr	r25,ack_symbol
	sbic	viic_port,vsda
	sbr	r25,ack_symbol
check_ack_end:
	cbi	viic_port,vscl
	ret
	
write_one_byte:
              ldi	bit_number,$08
write_loop:              
              rol 	viic_data
              brcc 	write_low
              rjmp	write_high
              dec	bit_number
write_loop1:
	brne	write_loop
	ret
write_high:
	sbi 	viic_port, vsda
	sbi	viic_port,vscl
	rcall	viic_hp_delay
	cbi 	viic_port,vscl
	cbi	viic_port,vsda
	rjmp	write_loop
write_low:
	cbi	viic_port,vsda
	sbi	viic_port,vscl
	rcall	viic_hp_delay
	cbi	viic_port,vscl
	rjmp	write_loop
		
read_one_byte:
	ldi 	bit_number,$08
read_loop:
	sbi	viic_port,vscl
	rcall	viic_hp_delay
	cbi	viic_port,vsda
	rcall	viic_hp_delay
	clc
	sbic	viic_port,vsda
	sec
	rol	viic_data
 	dec 	bit_number
 	brne	read_loop
 	ret
 	
 write_byte:
 	lds	r3,data_number
 	rcall 	viic_start
 	lds 	viic_data,slave_write_address
 	rcall	write_one_byte
 	rcall	check_ack
 	sbrc       r25,ack_symbol
 	rjmp	write_byte
	ldi	r19,write_start_address
 write_byte_loop:
 	lds 	viic_data,write_start_address
 	rcall	write_one_byte
 	rcall	check_ack
 	sbrc	r25,ack_symbol
 	rjmp	write_byte
 	inc	r19
 	dec	r3
 	brne	write_byte_loop
 	rcall	viic_stop
 	ret  
 	
 read_byte:
 	lds	r3,data_number
 	rcall	viic_start
 	lds	viic_data,slave_read_address
 	rcall	write_one_byte
 	rcall	check_ack
 	sbrc	r25,ack_symbol
 	rjmp	read_byte
 	ldi	r19,read_start_address
read_byte_loop:
 	rcall	read_byte
 	sts	read_start_address,viic_data
 	dec	r3
 	brne	read_ack
 	rcall	main_no_ack
 	rcall	viic_stop
 	ret
read_ack:
	rcall	main_ack
	inc 	r1
	rjmp	read_byte_loop