📄 kbd.rpt
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Project Information c:\book_cd\booksoft\chap10\kbd.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 06/20/2003 10:57:51
Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Memory Memory LCs
POF Device Pins Pins Pins Bits % Utilized LCs % Utilized
kbd EPF10K70RC240-4 3 16 0 0 0 % 80 2 %
User Pins: 3 16 0
Project Information c:\book_cd\booksoft\chap10\kbd.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
kbd@91 Clock_25Mhz
kbd@30 KBD_CLK
kbd@31 KBD_DATA
kbd@17 LSD_SEG_A
kbd@18 LSD_SEG_B
kbd@19 LSD_SEG_C
kbd@20 LSD_SEG_D
kbd@25 LSD_SEG_DP
kbd@21 LSD_SEG_E
kbd@23 LSD_SEG_F
kbd@24 LSD_SEG_G
kbd@6 MSD_SEG_A
kbd@7 MSD_SEG_B
kbd@8 MSD_SEG_C
kbd@9 MSD_SEG_D
kbd@14 MSD_SEG_DP
kbd@11 MSD_SEG_E
kbd@12 MSD_SEG_F
kbd@13 MSD_SEG_G
Project Information c:\book_cd\booksoft\chap10\kbd.rpt
** FILE HIERARCHY **
|dec_7seg:33|
|dec_7seg:36|
|keyboard:39|
|keyboard:39|lpm_add_sub:440|
|keyboard:39|lpm_add_sub:440|addcore:adder|
|keyboard:39|lpm_add_sub:440|altshift:result_ext_latency_ffs|
|keyboard:39|lpm_add_sub:440|altshift:carry_ext_latency_ffs|
|keyboard:39|lpm_add_sub:440|altshift:oflow_ext_latency_ffs|
Device-Specific Information: c:\book_cd\booksoft\chap10\kbd.rpt
kbd
***** Logic for device 'kbd' compiled without errors.
Device: EPF10K70RC240-4
FLEX 10K Configuration Scheme: Passive Serial
Device Options:
User-Supplied Start-Up Clock = OFF
Auto-Restart Configuration on Frame Error = OFF
Release Clears Before Tri-States = OFF
Enable Chip_Wide Reset = OFF
Enable Chip-Wide Output Enable = OFF
Enable INIT_DONE Output = OFF
JTAG User Code = 7f
R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R
E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E
S S S S S S S S G S S S S S S S V S S S S S S S G S S S G G G S S S S V S S S S S S S G S S S S S S S V S S S S S S S S
E E E E E E E E N E E E E E E E C E E E E E E E N E E E N N N E E E E C E E E E E E E N E E E E E E E C E E E E E E E E
R R R R R R R R D R R R R R R R C R R R R R R R D R R R D D D R R R R C R R R R R R R D R R R R R R R C R R R R R R R R
V V V V V V V V I V V V V V V V I V V V V V V V I V V V I I I V V V V I V V V V V V V I V V V V V V V I V V V V V V V V
E E E E E E E E N E E E E E E E N E E E E E E E N E E E N N N E E E E N E E E E E E E N E E E E E E E N E E E E E E E E
D D D D D D D D T D D D D D D D T D D D D D D D T D D D T T T D D D D T D D D D D D D T D D D D D D D T D D D D D D D D
--------------------------------------------------------------------------------------------------------------------------_
/ 240 238 236 234 232 230 228 226 224 222 220 218 216 214 212 210 208 206 204 202 200 198 196 194 192 190 188 186 184 182 |_
/ 239 237 235 233 231 229 227 225 223 221 219 217 215 213 211 209 207 205 203 201 199 197 195 193 191 189 187 185 183 181 |
#TCK | 1 180 | ^DATA0
^CONF_DONE | 2 179 | ^DCLK
^nCEO | 3 178 | ^nCE
#TDO | 4 177 | #TDI
VCCINT | 5 176 | GNDINT
MSD_SEG_A | 6 175 | RESERVED
MSD_SEG_B | 7 174 | RESERVED
MSD_SEG_C | 8 173 | RESERVED
MSD_SEG_D | 9 172 | RESERVED
GNDINT | 10 171 | RESERVED
MSD_SEG_E | 11 170 | VCCINT
MSD_SEG_F | 12 169 | RESERVED
MSD_SEG_G | 13 168 | RESERVED
MSD_SEG_DP | 14 167 | RESERVED
RESERVED | 15 166 | RESERVED
VCCINT | 16 165 | GNDINT
LSD_SEG_A | 17 164 | RESERVED
LSD_SEG_B | 18 163 | RESERVED
LSD_SEG_C | 19 162 | RESERVED
LSD_SEG_D | 20 161 | RESERVED
LSD_SEG_E | 21 160 | VCCINT
GNDINT | 22 159 | RESERVED
LSD_SEG_F | 23 158 | RESERVED
LSD_SEG_G | 24 157 | RESERVED
LSD_SEG_DP | 25 156 | RESERVED
RESERVED | 26 155 | GNDINT
VCCINT | 27 154 | RESERVED
RESERVED | 28 153 | RESERVED
RESERVED | 29 152 | RESERVED
KBD_CLK | 30 151 | RESERVED
KBD_DATA | 31 EPF10K70RC240-4 150 | VCCINT
GNDINT | 32 149 | RESERVED
RESERVED | 33 148 | RESERVED
RESERVED | 34 147 | RESERVED
RESERVED | 35 146 | RESERVED
RESERVED | 36 145 | GNDINT
VCCINT | 37 144 | RESERVED
RESERVED | 38 143 | RESERVED
RESERVED | 39 142 | RESERVED
RESERVED | 40 141 | RESERVED
RESERVED | 41 140 | VCCINT
GNDINT | 42 139 | RESERVED
RESERVED | 43 138 | RESERVED
RESERVED | 44 137 | RESERVED
RESERVED | 45 136 | RESERVED
RESERVED | 46 135 | GNDINT
VCCINT | 47 134 | RESERVED
RESERVED | 48 133 | RESERVED
RESERVED | 49 132 | RESERVED
RESERVED | 50 131 | RESERVED
RESERVED | 51 130 | VCCINT
GNDINT | 52 129 | RESERVED
RESERVED | 53 128 | RESERVED
RESERVED | 54 127 | RESERVED
RESERVED | 55 126 | RESERVED
RESERVED | 56 125 | GNDINT
VCCINT | 57 124 | ^MSEL0
#TMS | 58 123 | ^MSEL1
#TRST | 59 122 | VCCINT
^nSTATUS | 60 121 | ^nCONFIG
| 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 _|
\ 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 |
\---------------------------------------------------------------------------------------------------------------------------
R R R R R R R R G R R R R R R R V R R R R R R R G R R R V G C G G R R V R R R R R R R G R R R R R R R V R R R R R R R R
E E E E E E E E N E E E E E E E C E E E E E E E N E E E C N l N N E E C E E E E E E E N E E E E E E E C E E E E E E E E
S S S S S S S S D S S S S S S S C S S S S S S S D S S S C D o D D S S C S S S S S S S D S S S S S S S C S S S S S S S S
E E E E E E E E I E E E E E E E I E E E E E E E I E E E I I c I I E E I E E E E E E E I E E E E E E E I E E E E E E E E
R R R R R R R R N R R R R R R R N R R R R R R R N R R R N N k N N R R N R R R R R R R N R R R R R R R N R R R R R R R R
V V V V V V V V T V V V V V V V T V V V V V V V T V V V T T _ T T V V T V V V V V V V T V V V V V V V T V V V V V V V V
E E E E E E E E E E E E E E E E E E E E E E E E E 2 E E E E E E E E E E E E E E E E E E E E E E E E
D D D D D D D D D D D D D D D D D D D D D D D D D 5 D D D D D D D D D D D D D D D D D D D D D D D D
M
h
z
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.
* = Reserved configuration pin, which drives out in user mode.
PDn = Power Down pin.
@ = Special-purpose pin.
# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration. JTAG pin stability prevents accidental loading of JTAG instructions.
Device-Specific Information: c:\book_cd\booksoft\chap10\kbd.rpt
kbd
** RESOURCE USAGE **
Logic Column Row
Array Interconnect Interconnect Clears/ External
Block Logic Cells Driven Driven Clocks Presets Interconnect
A35 8/ 8(100%) 2/ 8( 25%) 4/ 8( 50%) 0/2 0/2 4/26( 15%)
A42 3/ 8( 37%) 0/ 8( 0%) 3/ 8( 37%) 0/2 0/2 4/26( 15%)
A46 8/ 8(100%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 7/26( 26%)
C28 8/ 8(100%) 1/ 8( 12%) 4/ 8( 50%) 1/2 0/2 4/26( 15%)
C31 6/ 8( 75%) 0/ 8( 0%) 3/ 8( 37%) 1/2 0/2 2/26( 7%)
C33 8/ 8(100%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 7/26( 26%)
C35 7/ 8( 87%) 2/ 8( 25%) 3/ 8( 37%) 0/2 0/2 6/26( 23%)
C36 8/ 8(100%) 0/ 8( 0%) 8/ 8(100%) 1/2 0/2 8/26( 30%)
C41 1/ 8( 12%) 0/ 8( 0%) 1/ 8( 12%) 0/2 0/2 1/26( 3%)
C42 7/ 8( 87%) 0/ 8( 0%) 2/ 8( 25%) 1/2 0/2 3/26( 11%)
C45 8/ 8(100%) 0/ 8( 0%) 1/ 8( 12%) 1/2 0/2 5/26( 19%)
C52 8/ 8(100%) 3/ 8( 37%) 2/ 8( 25%) 1/2 0/2 5/26( 19%)
Embedded Column Row
Array Embedded Interconnect Interconnect Read/ External
Block Cells Driven Driven Clocks Write Interconnect
Total dedicated input pins used: 1/6 ( 16%)
Total I/O pins used: 18/183 ( 9%)
Total logic cells used: 80/3744 ( 2%)
Total embedded cells used: 0/72 ( 0%)
Total EABs used: 0/9 ( 0%)
Average fan-in: 3.42/4 ( 85%)
Total fan-in: 274/14976 ( 1%)
Total input pins required: 3
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