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FPGA直接读取SD卡扇区数据

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 7.094 ns
From           : miso_i
To             : spiMaster:u_spiMaster|readWriteSPIWireData:u_readWriteSPIWireData|rxDataShiftReg[0]
From Clock     : --
To Clock       : clk0
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 8.205 ns
From           : spiMaster:u_spiMaster|readWriteSPIWireData:u_readWriteSPIWireData|spiClkOut
To             : sck_o
From Clock     : clk0
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 2.124 ns
From           : altera_internal_jtag~TDO
To             : altera_reserved_tdo
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 2.999 ns
From           : altera_internal_jtag~TDIUTAP
To             : sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]
From Clock     : --
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Setup: 'clk0'
Slack          : 0.364 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : spiMaster:u_spiMaster|ctrlStsRegBI:u_ctrlStsRegBI|spiClkDelay[1]
To             : spiMaster:u_spiMaster|initSD:u_initSD|spiClkDelayOut[1]
From Clock     : aaa:clk_module|altpll:altpll_component|_clk0
To Clock       : clk0
Failed Paths   : 0

Type           : Clock Setup: 'aaa:clk_module|altpll:altpll_component|_clk0'
Slack          : 0.537 ns
Required Time  : 40.00 MHz ( period = 24.999 ns )
Actual Time    : N/A
From           : spiMaster:u_spiMaster|sm_RxFifo:u_sm_rxFifo|sm_fifoRTL:u_sm_fifo|bufferInIndex[2]
To             : spiMaster:u_spiMaster|sm_RxFifo:u_sm_rxFifo|sm_fifoRTL:u_sm_fifo|bufferInIndexSyncToRdClk[2]
From Clock     : clk0
To Clock       : aaa:clk_module|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack          : 3.524 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : 77.21 MHz ( period = 12.952 ns )
From           : sld_hub:sld_hub_inst|jtag_debug_mode
To             : sld_hub:sld_hub_inst|hub_tdo_reg
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Hold: 'aaa:clk_module|altpll:altpll_component|_clk0'
Slack          : 0.822 ns
Required Time  : 40.00 MHz ( period = 24.999 ns )
Actual Time    : N/A
From           : sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|base_address[0]
To             : sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|base_address[0]
From Clock     : aaa:clk_module|altpll:altpll_component|_clk0
To Clock       : aaa:clk_module|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'clk0'
Slack          : 0.822 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : spiMaster:u_spiMaster|readWriteSPIWireData:u_readWriteSPIWireData|txDataShiftReg[0]
To             : spiMaster:u_spiMaster|readWriteSPIWireData:u_readWriteSPIWireData|txDataShiftReg[0]
From Clock     : clk0
To Clock       : clk0
Failed Paths   : 0

Type           : Clock Hold: 'altera_internal_jtag~TCKUTAP'
Slack          : 0.847 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : N/A
From           : sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[4]
To             : sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[3]
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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