stp1.stp

FPGA直接读取SD卡扇区数据

<session jtag_chain="USB-Blaster [USB-0]" jtag_device="@1: EP1C3 (0x020810DD)" sof_file="" top_level_entity="top">
  <display_tree gui_logging_enabled="0">
    <display_branch instance="auto_signaltap_0" signal_set="USE_GLOBAL_TEMP" trigger="USE_GLOBAL_TEMP"/>
  </display_tree>
  <instance entity_name="sld_signaltap" is_auto_node="yes" is_expanded="true" name="auto_signaltap_0" source_file="sld_signaltap.vhd">
    <node_ip_info instance_id="0" mfg_id="110" node_id="0" version="6"/>
    <position_info>
      <single attribute="active tab" value="1"/>
      <single attribute="setup vertical scroll position" value="0"/>
      <single attribute="setup horizontal scroll position" value="0"/>
    </position_info>
    <signal_set global_temp="1" name="signal_set: 2011/02/28 17:06:16  #0">
      <clock name="ctrl_eth:ctrl_eth|wb_clk_i" polarity="posedge" tap_mode="classic"/>
      <config ram_type="M4K" reserved_data_nodes="0" reserved_trigger_nodes="0" sample_depth="2048" trigger_in_enable="yes" trigger_in_node="ctrl_eth:ctrl_eth|led" trigger_in_tap_mode="classic" trigger_out_enable="no"/>
      <top_entity/>
      <signal_vec>
        <trigger_input_vec>
          <wire name="ctrl_eth:ctrl_eth|cnt[0]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[1]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[2]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[3]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[4]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[5]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[6]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[7]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[8]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|init_sel" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[0]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[1]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[2]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[3]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[4]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[5]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[6]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[7]" tap_mode="classic" type="register"/>
        </trigger_input_vec>
        <data_input_vec>
          <wire name="ctrl_eth:ctrl_eth|cnt[0]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[1]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[2]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[3]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[4]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[5]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[6]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[7]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|cnt[8]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|init_sel" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[0]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[1]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[2]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[3]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[4]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[5]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[6]" tap_mode="classic" type="register"/>
          <wire name="ctrl_eth:ctrl_eth|rw_dat[7]" tap_mode="classic" type="register"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="ctrl_eth:ctrl_eth|rw_dat" order="lsb_to_msb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[0]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[1]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[2]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[3]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[4]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[5]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[6]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[7]"/>
          </bus>
          <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|init_sel"/>
          <bus is_signal_inverted="no" link="all" name="ctrl_eth:ctrl_eth|cnt" order="lsb_to_msb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[0]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[1]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[2]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[3]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[4]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[5]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[6]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[7]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[8]"/>
          </bus>
        </data_view>
        <setup_view>
          <bus is_signal_inverted="no" link="all" name="ctrl_eth:ctrl_eth|rw_dat" order="lsb_to_msb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[0]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[1]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[2]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[3]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[4]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[5]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[6]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|rw_dat[7]"/>
          </bus>
          <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|init_sel"/>
          <bus is_signal_inverted="no" link="all" name="ctrl_eth:ctrl_eth|cnt" order="lsb_to_msb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[0]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[1]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[2]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[3]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[4]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[5]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[6]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[7]"/>
            <net is_signal_inverted="no" name="ctrl_eth:ctrl_eth|cnt[8]"/>
          </bus>
        </setup_view>
      </presentation>
      <trigger attribute_mem_mode="false" global_temp="1" name="trigger: 2011/02/28 17:06:16  #1" position="pre" power_up_trigger_mode="false" segment_size="1" trigger_in="rising edge" trigger_out="active high" trigger_type="circular">
        <power_up_trigger position="pre" trigger_in="dont_care" trigger_out="active high"/>
        <events use_custom_flow_control="no">
          <level enabled="yes" name="condition1" type="basic">
            <power_up enabled="yes">
            </power_up>
            <op_node/>
          </level>
        </events>
      </trigger>
    </signal_set>
  </instance>
  <mnemonics/>
  <global_info>
    <single attribute="active instance" value="0"/>
    <single attribute="lock mode" value="36110"/>
    <multi attribute="window position" size="9" value="1280,828,497,155,445,50,155,0,50"/>
  </global_info>
</session>