📄 7102atest.asm

📁 笙科RF芯片A7102A汇编程序自动发射接收测试程序
💻 ASM
字号:
; FILENAME	: 7102ATEST.ASM 
; AUTHOR	: allan
; REVISION	: 2008/06/02 V1.0	First issue

;*******************************************************************************
;*  (c) Copyright 2004, SONiX TECHNOLOGY CO., LTD.
;*******************************************************************************

CHIP		SN8P2612	; Select the CHIP
//{{SONIX_CODE_OPTION
	.Code_Option	Noise_Filter	Enable
	.Code_Option	Reset_Pin	P15
	.Code_Option	Watch_Dog	Disable		; Disable Watchdog
	.Code_Option	High_Clk	IHRC_16M	; Internal 16M RC Oscillator
	.Code_Option	Fcpu		#2     ; Fcpu = Fosc/4
	.Code_Option	Security	Disable
	.Code_Option	LVD		LVD_H		; 2.4V Reset Enable LVD36 bit of PFLAG for 3.6V Low Voltage Indicator
//}}SONIX_CODE_OPTION

;-------------------------------------------------------------------------------
;			Include Files
;-------------------------------------------------------------------------------
.nolist							; do not list the macro file

	INCLUDESTD		MACRO1.H
	INCLUDESTD		MACRO2.H
	INCLUDESTD		MACRO3.H

.list							; Enable the listing function
	
;-------------------------------------------------------------------------------
;			Constants Definition
;-------------------------------------------------------------------------------

	INCLUDE		EQU.asm
;-------------------------------------------------------------------------------
;			Variables Definition
;-------------------------------------------------------------------------------
.DATA
			org	0h			;Data section start from RAM address 0	
	INCLUDE		RAM.asm
;-------------------------------------------------------------------------------
;			Bit Variables Definition
;-------------------------------------------------------------------------------

;	Wk00B0	    	EQU     Wk00.0 		     	;Bit 0 of Wk00
;	Iwk00B1		EQU     Iwk00.1  	   	;Bit 1 of Iwk00
 
;-------------------------------------------------------------------------------
;			Code section
;-------------------------------------------------------------------------------
.CODE								

		ORG	0				;Code section start
	jmp		Reset				;Reset vector
							;Address 4 to 7 are reserved
		ORG	8				
	jmp		Isr				;Interrupt vector


	INCLUDE		ISR.asm


;		ORG	10h
;-------------------------------------------------------------------------------
; 			Program reset section
;-------------------------------------------------------------------------------
Reset:


	mov 	    	A,#07Fh				;Initial stack pointer and
   	b0mov 		STKP,A				;disable global interrupt	
	clr		PFLAG				;pflag = x,x,x,x,x,c,dc,z
;===========================================
;	INITIAL	OSCM
;===========================================

	CLR	OSCM					

;===========================================
;	INITIAL	INTERRUPT
;===========================================
	CLR	INTEN
	CLR	INTRQ


	CALL	ClrRAM				;Clear RAM
    	call	SysInit				;System initial
    	b0bset  	FGIE				;Enable global interrupt

;	B0BSET	LED1

;-------------------------------------------------------------------------------
; 			Main routine
;-------------------------------------------------------------------------------

main:

	mov		A, #0x5A
	b0mov		WDTR, A				;Clear watchdog timer

	b0bts1		f_key_2
	jmp		main_slaver
	jmp		main_master


main_master:
;-------------------------------------
;INIT RF MASTER
;-------------------------------------
INIT_RF_MASTER:
	b0bCLR	f_key_2
	B0BSET	SCS_M
	B0BSET	SDIO_M
	B0BSET	PWON_M
	B0BSET	SCK_M
	B0BSET	TRS_M
	B0BSET	TRE_M
	B0BCLR	IRQ_M
	CALL	DELAY2US
	CALL	DELAY2US
	CALL	DELAY2US
	CALL	DELAY2US
	CALL	DELAY2US
	B0BSET	SCS
	B0BSET	SDIO
	B0BSET	PWON
	B0BCLR	SCK
	B0BCLR	TRS
	B0BCLR	TRE

	MOV	A,#1
	CALL	DELAY_MS

	B0BCLR	SCS		;7102 RESET
	MOV	A,CMD_RFRESET
	CALL	SUB_BYTE_SEND
	B0BSET	SCS


	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1


	B0BCLR	SCS
	MOV	A,#0X05		;CRYSTAL_REG	
	MOV	address,A
	MOV	A,#0X00
	MOV	DATA_M,A
	MOV	A,#0X11
	MOV	DATA_L,A
	CALL	SUB_WRITE_REG
	B0BSET	SCS


	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1



	B0BCLR	SCS	
	MOV	A,MODE_REG		;MODE_REG	
	MOV	address,A
	MOV	A,#0X00
	MOV	DATA_M,A
	MOV	A,#0XC0
	MOV	DATA_L,A
	CALL	SUB_WRITE_REG

	B0BSET	SCS
	MOV	A,#1
	CALL	DELAY_MS

	CALL	SUB_WRITE_ID
	B0BSET	SCS


	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1



	B0BCLR	SCS
	CALL	SUB_CONFIG_M
	B0BSET	SCS



	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1



	B0BCLR	SCS
	CALL	SUB_CAL
	B0BSET	SCS



	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1



	B0BCLR	SCS
	MOV	A,MODE_REG		
	MOV	address,A
	MOV	A,#0X00
	MOV	DATA_M,A
	MOV	A,#0XC0
	MOV	DATA_L,A
	CALL	SUB_WRITE_REG
	nop
	B0BSET	SCS

	MOV	A,#0X54
	CMPRS	A,TEMP_ID1
	jmp	$+2
	jmp	$+2
	JMP	INIT_RF_MASTER	
	b0bset	f_m_ok

main_m_10:
/*			;tx
	b0bts1	f_key_2
	jmp	$-1	
	b0bCLR	f_key_2

	incms	datax
	mov	a,datax
	xor	a,#20
	b0bts1	fz
	jmp	$+2
	clr	datax
	mov	a,datax
	mov	data1,a
*/
main_m_20:
	CALL	SUB_standby
	
	call	SUB_WRITE_FIFO
	CALL	SUB_TX_EN1
	B0BSET	f_key2
	B0BTS0	IRQ
	JMP	$-1

	mov	a,#00000100b
	xor	p1,a
	
;	CALL	SUB_standby
	CALL	SUB_RX_EN1	
	mov	a,#50
	mov	counter_rx,a

	MOV	A,counter_rx
	b0bts1	FZ
	JMP	$+2	
	JMP	main	
	B0BTS0	IRQ
	jmp	$-5
	CALL	SUB_RX_PACKET
	mov	a,#00001000b
	xor	p1,a
	mov	a,#50
	CALL	DELAY_MS
	JMP	main		






main_slaver:
;-------------------------------------
;INIT RF slave
;-------------------------------------
INIT_RF_SLAVE:
	B0BSET	SCS_M
	B0BSET	SDIO_M
	B0BSET	PWON_M
	B0BSET	SCK_M
	B0BSET	TRS_M
	B0BSET	TRE_M
	B0BCLR	IRQ_M
	CALL	DELAY2US
	CALL	DELAY2US
	CALL	DELAY2US
	CALL	DELAY2US
	CALL	DELAY2US
	B0BSET	SCS
	B0BSET	SDIO
	B0BSET	PWON
	B0BCLR	SCK
	B0BCLR	TRS
	B0BCLR	TRE
	MOV	A,#1
	CALL	DELAY_MS

	B0BCLR	SCS		;7102 RESET
	MOV	A,CMD_RFRESET
	CALL	SUB_BYTE_SEND
	B0BSET	SCS

	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1

	B0BCLR	SCS
	MOV	A,#0X05		;CRYSTAL_REG	
	MOV	address,A
	MOV	A,#0X00
	MOV	DATA_M,A
	MOV	A,#0X11
	MOV	DATA_L,A
	CALL	SUB_WRITE_REG
	B0BSET	SCS

	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1

	B0BCLR	SCS	
	MOV	A,MODE_REG		;MODE_REG	
	MOV	address,A
	MOV	A,#0X00
	MOV	DATA_M,A
	MOV	A,#0XC0
	MOV	DATA_L,A
	CALL	SUB_WRITE_REG
	B0BSET	SCS



	MOV	A,#1
	CALL	DELAY_MS
	CALL	SUB_WRITE_ID
	B0BSET	SCS


	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1



	B0BCLR	SCS
	CALL	SUB_CONFIG_S
	B0BSET	SCS


	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1



	B0BCLR	SCS
	CALL	SUB_CAL
	B0BSET	SCS


	jmp	$+1
	jmp	$+1
	jmp	$+1
	jmp	$+1


	B0BCLR	SCS
	MOV	A,MODE_REG		
	MOV	address,A
	MOV	A,#0X00
	MOV	DATA_M,A
	MOV	A,#0XC0
	MOV	DATA_L,A
	CALL	SUB_WRITE_REG
	nop
	B0BSET	SCS


	MOV	A,#0X54
	CMPRS	A,TEMP_ID1
	jmp	$+2
	jmp	$+2	
	JMP	INIT_RF_SLAVE	
	b0bset	f_s_ok

main_S_10:			;rx
	CALL	SUB_RX_EN
	b0bts1		f_key_2
	jmp		$+2
	jmp		main_master
	B0BTS0	IRQ
	JMP	$-4
	B0BSET	f_key2
	CALL	SUB_RX_PACKET
	mov	a,#00001000b
	xor	p1,a
	nop
;	MOV	A,DATA2
;	CMPRS	A,#0X38
;	JMP	main
	CALL	SUB_standby
	call	SUB_WRITE_FIFO
	CALL	SUB_TX_EN
	B0BTS0	IRQ
	JMP	$-1
	mov	a,#00000100b
	xor	p1,a
	nop
	jmp	main



	INCLUDE		SUB.asm
;----------------------------------------------------------------------------------
	ENDP
💿 文件大小 28 K
👤 上传用户 gjinli88
📂 所属分类汇编语言
🏷️ 相关标签

#A7102A #笙科 #RF芯片 #汇编程序
⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -