📄 crc32.asm
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* ======================================================================== *
* TEXAS INSTRUMENTS, INC. *
* *
* NAME *
* crc32 -- crc32 *
* *
* *
* REVISION DATE *
* 4/15/05 *
* *
* USAGE *
* This routine is C-callable and can be called as: *
* *
* unsigned int crc32(unsigned int power_table, *
* unsigned char * data_in, int nbytes); *
* *
* power_table -- table of powers of alpha^32*i. *
* data_in -- block of data to be crc'd. *
* nbytes --- number of bytes in block *
* *
* (See the C compiler reference guide.) *
* *
* DESCRIPTION *
* *
* CRC is the cyclic redundancy check, the inocming data is thought of a *
* a long polynomial with data bits as coefficients. This is divided by *
* prime polnyomial and the remainder is used as the CRC. This is unqiqu *
* or very unlikely to be the same if data is corrupted. It can detect a *
* error in the message, by redoing the CRC at the receiver and ocmaprin *
* it with the crc sent. *
* *
* 32-bit CRC, The ITU-TSS has defined a 32-bit CRC, Its formula is: *
* *
* 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 *
* d[i]->+0-1+2+3-4+5+6-7+8+9-0+1+2+3-4-5-6+7-8-9-0-1-2+3+4-5-6+7-8-9-0-1- *
* ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ *
* | | | | | | | | | | | | | | *
* `---+-+---+-+---+-+---+-+-+-------+-----------+-+-----+---------- *
* *
* *
* 32 26 23 22 16 12 11 10 8 7 5 4 2 1 *
* G(x)=x +x +x +x +x +x +x +x +x +x +x +x +x +x +1 *
* *
* ASSUMPTIONS *
* n greater than or equal to 16 *
* nx a multiple of 4 *
* Data is LITTLE *
* OPTIMIZATION *
* *
* The data is multiplied by the galois field represented by the CRC *
* polynomial, the message is multiplied by all powers of alpha and summ *
* *
* uint crc32_cn(uint *power, uchar * data_in, int nbytes, *
* unsigned int poly) *
* { *
* int i; *
* uint s0, s1, s2, s3, crc32; *
* unit alpha8 = 0x100; *
* j = 0; *
* s0 = s1 = s2 = s3 = 0; *
* for (i=n/4-1; i >= 0; i--) *
* { *
* uchar b0,b1,b2,b3; *
* *
* b0 = data[4*i+0]; *
* b1 = data[4*i+1]; *
* b2 = data[4*i+2]; *
* b3 = data[4*i+3]; *
* *
* alphai = power[j++]; *
* s0 ^= gmpy(b0, alphai); *
* s1 ^= gmpy(b1, alphai); *
* s2 ^= gmpy(b2, alphai); *
* s3 ^= gmpy(b3, alphai); *
* } *
* s0 = gmpy(alpha8, s0); *
* s0 = gmpy(alpha8, s0); *
* s0 = gmpy(alpha8, s0); *
* *
* s1 = gmpy(alpha8, s1); *
* s1 = gmpy(alpha8, s1); *
* *
* s2 = gmpy(alpha8, s2); *
* crc32 = s0 ^ s1 ^ s2 ^ s3; *
* return(crc32); *
* } *
* PERFORMANCE *
* Cycles: 14 + N/2, N = num of bytes *
* Size: 224 bytes *
* *
* ------------------------------------------------------------------------- *
* Copyright (c) 2005 Texas Instruments, Incorporated. *
* All Rights Reserved. *
* ========================================================================= *
* ===================== SYMBOLIC REGISTER ASSIGNMENTS ===================== *
.asg A4, A_alpha32i
.asg B4, B_data
.asg A6, A_i
.asg B6, B_poly
.asg A9, A_b0b1b2b3
.asg B16, B_b0
.asg A8, A_b1
.asg A7, A_b2
.asg B23, B_ff
.asg B16, B_b3
.asg A17, A_alpha8
.asg B7, B_alphai
.asg A5, A_alphai
.asg B9, B_p0
.asg B6, B_s0
.asg A16, A_p1
.asg A24, A_s1
.asg A16, A_p2
.asg A3, A_s2
.asg B9, B_p3
.asg B5, B_s3
.asg B24, B_i
.asg A4, A_state
* ========================================================================= *
.global _crc32
.text .global _crc32_crc32: SHRU .S2 A_i, 2, B_i ;
|| ADD .L1 A_alpha32i, A_i, A_alpha32i
SUB .S2 B_i, 2, B_i
|| SUB .S1 A_alpha32i, 4, A_alpha32i
;*----------------------------------------------------------------------------*
; PIPE LOOP PROLOG
;*----------------------------------------------------------------------------*
SPLOOPD 2 ;
|| MVC .S2 B_i, ILC
|| ZERO .L1 A_s1
|| ZERO .L2 B_s3
;*----------------------------------------------------------------------------*
; PIPED LOOP KERNEL
;** --------------------------------------------------------------------------*
SPMASK
||^ MVKL .S2 0x00FF, B_ff
||^ ZERO .L1 A_s2
||^ ZERO .L2 B_s0
||^ MV .S1X B_poly, A_p1
SPMASK
||^ MVC .S2x A_p1, GPLYB
|| LDW .D2T1 *B_data++[1], A_b0b1b2b3 ;[ 1,1]
SPMASK
||^ MVC .S2x A_p1, GPLYA
|| LDW .D1T2 *A_alpha32i--[1], B_alphai ;[ 2,1]
NOP
NOP
NOP
AND .D2X A_b0b1b2b3, B_ff, B_b3 ;[ 6,1]
|| EXTU .S1 A_b0b1b2b3, 16, 24, A_b2 ;[ 6,1]
MV .D1X B_alphai, A_alphai ;[ 7,1]
|| EXTU .S1 A_b0b1b2b3, 8, 24, A_b1 ;[ 7,1]
|| SHRU .S2X A_b0b1b2b3, 24, B_b0 ;[ 7,1]
|| GMPY .M2 B_alphai, B_b3, B_p3 ;[ 7,1]
GMPY .M1 A_alphai, A_b2, A_p2 ;[ 8,3]
|| GMPY .M2 B_alphai, B_b0, B_p0 ;[ 8,3]
GMPY .M1 A_alphai, A_b1, A_p1 ;[ 9,3]
NOP
XOR .L2 B_p3, B_s3, B_s3 ;[11,2]
XOR .L1 A_p2, A_s2, A_s2 ;[12,1]
|| XOR .L2 B_p0, B_s0, B_s0 ;[12,1]
SPKERNEL 4,1
|| XOR .L1 A_p1, A_s1, A_s1 ;[13,1]
;** --------------------------------------------------------------------------*
; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
MVKL .S1 0x0100, A_alpha8 ;
GMPY .M2X B_s3, A_alpha8, B_s3 ;little
GMPY .M1 A_s2, A_alpha8, A_s2 ;little
GMPY .M1 A_s1, A_alpha8, A_s1 ;little
NOP 1 ;
GMPY .M2X B_s3, A_alpha8, B_s3 ;little
GMPY .M1 A_s2, A_alpha8, A_s2 ;little
XOR B_s0, A_s1, A_state ;little
B .S2 B3 ;
GMPY .M2X B_s3, A_alpha8, B_s3 ;little
NOP 2 ;
XOR A_state, A_s2, A_state ;little
XOR A_state, B_s3, A_state ;little
;BRANCH OCCURS
.end
* ======================================================================== *
* End of file: crc32.asm *
* ------------------------------------------------------------------------ *
* Copyright (C) 2005 Texas Instruments, Incorporated. *
* All Rights Reserved. *
* ======================================================================== *
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