iir_biquad.asm

davinci技术 源码 视频监控汇编源码

    .map    A_c2/B9
    .map    A_c3/A8
    .map    B_out/A3
    .map    A_insh/A19
    .map    A_input/A7
    .map    A_input'/A4
    .map    B_c4/A6
    .map    A_p2/B17
    .map    B_c5/B8
    .map    B_c6/A5
    .map    B_c7/B7
    .map    A_s0/B6
    .map    A_s1/A17
    .map    A_t0/B18
    .map    A_t2/A20
    .map    B_coeff/A8
    .map    B_p3/A18
    .map    B_s2/A16
    .map    A_coeff/B17
    .map    A_coeff'/A8
    .map    B_s3/B5
    .map    B_t1/A20
    .map    B_t3/B18
    .map    A_in/A19
    .map    A_c0s0/B6
    .map    A_c1s1/A18
    .map    A_c2s0/B6
    .map    B_output/A4
    .map    A_c3s1/A3
    .map    B_nx/B4
    .map    A_output/A6

        .text
        .global _iir_biquad
_iir_biquad:

* ======================================================================== *
* ======================================================================== *
           LDH     .D1T2   *+B_coeff(14),B_c7 ; |138| c7 = coeff[7];

           LDH     .D1T1   *+B_coeff(12),B_c6 ; |137| c6 = coeff[6];
||         MV      .L1     A_input',A_input  ; |98|

           LDH     .D1T1   *+B_coeff(8),B_c4 ; |135| c4 = coeff[4];
||         MV      .L1     A_output,B_output ; |98|
||         MV      .S1X    B_state',A_state  ; |98|

           LDH     .D1T1   *+A_state(2),A_s1 ; |127| s1 = state[1];
||         MV      .L2X    A_coeff',A_coeff  ; |98|
||         SUB     .L1X    B_nx,1,A3

           SPLOOPD 4       ;24               ; (P)
||         LDH     .D1T2   *+B_coeff(10),B_c5 ; |136| c5 = coeff[5];
||         MVC     .S2X    A3,ILC
||         LDH     .D2T1   *+A_coeff(6),A_c3 ; |134| c3 = coeff[3];

;** --------------------------------------------------------------------------*
           SPMASK          D2
||         LDH     .D2T2   *+A_coeff(4),A_c2 ; |133| c2 = coeff[2];
||         LDH     .D1T1   *A_input++,A_in   ; |146| (P) <0,0> in = input[i] << 14;

           SPMASK          D2
||         LDH     .D2T1   *+A_coeff(2),A_c1 ; |132| c1 = coeff[1];

           SPMASK          D1,L2
||         MV      .L2     B_state',B_state  ; |98|
||         LDH     .D1T2   *A_state,A_s0     ; |126| s0 = state[0];

           SPMASK          D2
||         LDH     .D2T2   *A_coeff,A_c0     ; |131| c0 = coeff[0];

;** --------------------------------------------------------------------------*
           NOP             1

           SHL     .S1     A_in,0xe,A_insh   ; |147| (P) <0,5>
||         MPY     .M1     A_c3,A_s1,A_c3s1  ; |152| (P) <0,5>  ^ c3*s1

           MPY     .M1     A_c1,A_s1,A_c1s1  ; |150| (P) <0,6> c1*s1

           MPY     .M2     A_c2,A_s0,A_c2s0  ; |154| (P) <0,7>  ^ c2*s0
||         ADD     .S1     A_insh,A_c3s1,A_t2 ; |153| (P) <0,7>  ^ t2 = in + c3*s1;

;** --------------------------------------------------------------------------*
           SPMASK          D2
||         LDH     .D2T2   *+B_state(6),B_s3 ; |129| s3 = state[3];
||         MPY     .M2     A_c0,A_s0,A_c0s0  ; |149| (P) <0,8> c0*s0
||         MV      .L1X    A_s0,A_s1         ; |167| (P) <0,8>  ^ s1 = s0;

           ADD     .L2X    A_t2,A_c2s0,A_t0  ; |155| (P) <0,9>  ^ t0 = t2 + c2*s0;

           SPMASK          D2
||         LDH     .D2T1   *+B_state(4),B_s2 ; |128| s2 = state[2];
||         ADD     .L2X    A_c0s0,A_c1s1,A_p2 ; |151| (P) <0,10> p2 = c0*s0 + c1*s1;
||         SHR     .S2     A_t0,0xe,A_s0     ; |168| (P) <0,10>  ^ s0 = t0 >> 14;

           ADD     .S2     A_t0,A_p2,A_x     ; |156| (P) <0,11> x  = t0 + p2;
;** --------------------------------------------------------------------------*
           NOP             1
           MPY     .M2     B_c7,B_s3,B_c7s3  ; |161| (P) <0,13>  ^ c7*s3
           MPY     .M2     B_c5,B_s3,B_c5s3  ; |159| (P) <0,14> c5*s3

           ADD     .L2     A_x,B_c7s3,B_t3   ; |162| (P) <0,15>  ^ t3 = x + c7*s3;
||         MPY     .M1     B_c6,B_s2,B_c6s2  ; |163| (P) <0,15>  ^ c6*s2

;** --------------------------------------------------------------------------*
           MV      .L2X    B_s2,B_s3         ; |169| (P) <0,16>  ^ s3 = s2;
||         MPY     .M1     B_c4,B_s2,B_c4s2  ; |158| (P) <0,16> c4*s2

           ADD     .L1X    B_t3,B_c6s2,B_t1  ; |164| (P) <0,17>  ^ t1 = t3 + c6*s2;

           SHR     .S1     B_t1,0xe,B_s2     ; |170| (P) <0,18>  ^ s2 = t1 >> 14;
||         ADD     .L1X    B_c4s2,B_c5s3,B_p3 ; |160| (P) <0,18> p3 = c4*s2 + c5*s3;

           ADD     .L1     B_t1,B_p3,B_out   ; |165| (P) <0,19> out = t1 + p3;
;** --------------------------------------------------------------------------*
           SHR     .S1     B_out,0xe,B_outsh ; |172| <0,20> output[i] = out >> 14;

           SPKERNEL 1,2
||         STH     .D1T1   B_outsh,*B_output++ ; |173| <0,21>

;** --------------------------------------------------------------------------*
$C$L3:    ; PIPED LOOP EPILOG
           STH     .D1T1   A_s1,*+A_state(2) ; |179| state[1] = s1;
           STH     .D1T2   A_s0,*A_state     ; |178| state[0] = s0;
           NOP             4
           RET     .S2     B3                ; |183|
           STH     .D2T2   B_s3,*+B_state(6) ; |181| state[3] = s3;
           NOP             1
           STH     .D2T1   B_s2,*+B_state(4) ; |180| state[2] = s2;
           NOP             2
           ; BRANCH OCCURS {B3}              ; |183|
*----------------------------------------------------------------------------*
                .end

* ======================================================================== *
*  End of file: iir_biquad.asm                                             *
* ------------------------------------------------------------------------ *
*          Copyright (C) 2005 Texas Instruments, Incorporated.             *
*                          All Rights Reserved.                            *
* ======================================================================== *