📄 stm32f10x_gpio.txt
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 903] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\stm32f10x_gpio.o --depend=.\Obj\stm32f10x_gpio.d --device=DARMSTM --apcs=interwork -O2 -I..\..\..\FWLib\library\inc -I..\..\include -IC:\Keil\ARM\INC\ST\STM32F10x -D__MICROLIB -DVECT_TAB_FLASH --omf_browse=.\Obj\stm32f10x_gpio.crf ..\..\..\FWLib\library\src\stm32f10x_gpio.c]
THUMB
AREA ||i.GPIO_DeInit||, CODE, READONLY, ALIGN=2
GPIO_DeInit PROC
;;;52 {
;;;53 switch (*(u32*)&GPIOx)
000000 4a1b LDR r2,|L1.112|
000002 b510 PUSH {r4,lr}
000004 1a81 SUBS r1,r0,r2
000006 1513 ASRS r3,r2,#20
000008 4290 CMP r0,r2
00000a d022 BEQ |L1.82|
00000c dc0b BGT |L1.38|
00000e 4919 LDR r1,|L1.116|
000010 1840 ADDS r0,r0,r1
000012 d017 BEQ |L1.68|
000014 4298 CMP r0,r3
000016 d12a BNE |L1.110|
;;;54 {
;;;55 case GPIOA_BASE:
;;;56 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
;;;57 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
;;;58 break;
;;;59
;;;60 case GPIOB_BASE:
;;;61 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
000018 2101 MOVS r1,#1
00001a 2008 MOVS r0,#8
00001c f7fff7ff BL RCC_APB2PeriphResetCmd
;;;62 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
000020 2100 MOVS r1,#0
000022 2008 MOVS r0,#8
;;;63 break;
000024 e00a B |L1.60|
|L1.38|
000026 4299 CMP r1,r3
000028 d01a BEQ |L1.96|
00002a f5b1f5b1 CMP r1,#0x800
00002e d11e BNE |L1.110|
;;;64
;;;65 case GPIOC_BASE:
;;;66 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
;;;67 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
;;;68 break;
;;;69
;;;70 case GPIOD_BASE:
;;;71 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
;;;72 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
;;;73 break;
;;;74
;;;75 case GPIOE_BASE:
;;;76 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
000030 2101 MOVS r1,#1
000032 2040 MOVS r0,#0x40
000034 f7fff7ff BL RCC_APB2PeriphResetCmd
;;;77 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
000038 2100 MOVS r1,#0
00003a 2040 MOVS r0,#0x40
|L1.60|
00003c e8bde8bd POP {r4,lr}
000040 f7fff7ff B.W RCC_APB2PeriphResetCmd
|L1.68|
000044 2101 MOVS r1,#1
000046 2004 MOVS r0,#4
000048 f7fff7ff BL RCC_APB2PeriphResetCmd
00004c 2100 MOVS r1,#0
00004e 2004 MOVS r0,#4
000050 e7f4 B |L1.60|
|L1.82|
000052 2101 MOVS r1,#1
000054 2010 MOVS r0,#0x10
000056 f7fff7ff BL RCC_APB2PeriphResetCmd
00005a 2100 MOVS r1,#0
00005c 2010 MOVS r0,#0x10
00005e e7ed B |L1.60|
|L1.96|
000060 2101 MOVS r1,#1
000062 2020 MOVS r0,#0x20
000064 f7fff7ff BL RCC_APB2PeriphResetCmd
000068 2100 MOVS r1,#0
00006a 2020 MOVS r0,#0x20
00006c e7e6 B |L1.60|
|L1.110|
;;;78 break;
;;;79
;;;80 default:
;;;81 break;
;;;82 }
;;;83 }
00006e bd10 POP {r4,pc}
ENDP
|L1.112|
000070 40011000 DCD 0x40011000
|L1.116|
000074 bffef800 DCD 0xbffef800
AREA ||i.GPIO_AFIODeInit||, CODE, READONLY, ALIGN=1
GPIO_AFIODeInit PROC
;;;94 void GPIO_AFIODeInit(void)
;;;95 {
000000 b510 PUSH {r4,lr}
;;;96 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
000002 2101 MOVS r1,#1
000004 4608 MOV r0,r1
000006 f7fff7ff BL RCC_APB2PeriphResetCmd
;;;97 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
00000a 2100 MOVS r1,#0
00000c e8bde8bd POP {r4,lr}
000010 2001 MOVS r0,#1
000012 f7fff7ff B.W RCC_APB2PeriphResetCmd
;;;98 }
ENDP
AREA ||i.GPIO_Init||, CODE, READONLY, ALIGN=1
GPIO_Init PROC
;;;111 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
;;;112 {
000000 b5f0 PUSH {r4-r7,lr}
;;;113 u32 currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
;;;114 u32 tmpreg = 0x00, pinmask = 0x00;
;;;115
;;;116 /* Check the parameters */
;;;117 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
;;;118 assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
;;;119
;;;120 /*---------------------------- GPIO Mode Configuration -----------------------*/
;;;121 currentmode = ((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x0F);
000002 78cc LDRB r4,[r1,#3]
000004 2200 MOVS r2,#0
000006 f004f004 AND r3,r4,#0xf
;;;122
;;;123 if ((((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x10)) != 0x00)
00000a 06e4 LSLS r4,r4,#27
00000c d501 BPL |L3.18|
;;;124 {
;;;125 /* Check the parameters */
;;;126 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
;;;127 /* Output mode */
;;;128 currentmode |= (u32)GPIO_InitStruct->GPIO_Speed;
00000e 788c LDRB r4,[r1,#2]
000010 4323 ORRS r3,r3,r4
|L3.18|
;;;129 }
;;;130
;;;131 /*---------------------------- GPIO CRL Configuration ------------------------*/
;;;132 /* Configure the eight low port pins */
;;;133 if (((u32)GPIO_InitStruct->GPIO_Pin & ((u32)0x00FF)) != 0x00)
000012 880c LDRH r4,[r1,#0]
000014 f04ff04f MOV r7,#0xf
000018 f014f014 TST r4,#0xff
00001c f04ff04f MOV r12,#1
000020 d01b BEQ |L3.90|
;;;134 {
;;;135 tmpreg = GPIOx->CRL;
000022 6805 LDR r5,[r0,#0]
|L3.36|
;;;136
;;;137 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
;;;138 {
;;;139 pos = ((u32)0x01) << pinpos;
;;;140 /* Get the port pins position */
;;;141 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
000024 880e LDRH r6,[r1,#0]
000026 fa0cfa0c LSL r4,r12,r2
00002a 4026 ANDS r6,r6,r4
;;;142
;;;143 if (currentpin == pos)
00002c 42a6 CMP r6,r4
00002e d110 BNE |L3.82|
;;;144 {
;;;145 pos = pinpos << 2;
000030 0096 LSLS r6,r2,#2
;;;146 /* Clear the corresponding low control register bits */
;;;147 pinmask = ((u32)0x0F) << pos;
000032 fa07fa07 LSL lr,r7,r6
;;;148 tmpreg &= ~pinmask;
000036 ea25ea25 BIC lr,r5,lr
;;;149
;;;150 /* Write the mode configuration in the corresponding bits */
;;;151 tmpreg |= (currentmode << pos);
00003a fa03fa03 LSL r5,r3,r6
;;;152
;;;153 /* Reset the corresponding ODR bit */
;;;154 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
00003e 78ce LDRB r6,[r1,#3]
000040 ea45ea45 ORR r5,r5,lr
000044 2e28 CMP r6,#0x28
000046 d100 BNE |L3.74|
;;;155 {
;;;156 GPIOx->BRR = (((u32)0x01) << pinpos);
000048 6144 STR r4,[r0,#0x14]
|L3.74|
;;;157 }
;;;158 /* Set the corresponding ODR bit */
;;;159 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00004a 78ce LDRB r6,[r1,#3]
00004c 2e48 CMP r6,#0x48
00004e d100 BNE |L3.82|
;;;160 {
;;;161 GPIOx->BSRR = (((u32)0x01) << pinpos);
000050 6104 STR r4,[r0,#0x10]
|L3.82|
000052 1c52 ADDS r2,r2,#1
000054 2a08 CMP r2,#8
000056 d3e5 BCC |L3.36|
;;;162 }
;;;163 }
;;;164 }
;;;165 GPIOx->CRL = tmpreg;
000058 6005 STR r5,[r0,#0]
|L3.90|
;;;166 tmpreg = 0;
;;;167 }
;;;168
;;;169 /*---------------------------- GPIO CRH Configuration ------------------------*/
;;;170 /* Configure the eight high port pins */
;;;171 if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
00005a 880a LDRH r2,[r1,#0]
00005c 2aff CMP r2,#0xff
00005e d91e BLS |L3.158|
;;;172 {
;;;173 tmpreg = GPIOx->CRH;
000060 6845 LDR r5,[r0,#4]
;;;174 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
000062 2200 MOVS r2,#0
|L3.100|
;;;175 {
;;;176 pos = (((u32)0x01) << (pinpos + 0x08));
000064 f102f102 ADD r6,r2,#8
000068 fa0cfa0c LSL r4,r12,r6
;;;177 /* Get the port pins position */
;;;178 currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
00006c 880e LDRH r6,[r1,#0]
00006e 4026 ANDS r6,r6,r4
;;;179 if (currentpin == pos)
000070 42a6 CMP r6,r4
000072 d110 BNE |L3.150|
;;;180 {
;;;181 pos = pinpos << 2;
000074 0096 LSLS r6,r2,#2
;;;182 /* Clear the corresponding high control register bits */
;;;183 pinmask = ((u32)0x0F) << pos;
000076 fa07fa07 LSL lr,r7,r6
;;;184 tmpreg &= ~pinmask;
00007a ea25ea25 BIC lr,r5,lr
;;;185
;;;186 /* Write the mode configuration in the corresponding bits */
;;;187 tmpreg |= (currentmode << pos);
00007e fa03fa03 LSL r5,r3,r6
;;;188
;;;189 /* Reset the corresponding ODR bit */
;;;190 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
000082 78ce LDRB r6,[r1,#3]
000084 ea45ea45 ORR r5,r5,lr
000088 2e28 CMP r6,#0x28
00008a d100 BNE |L3.142|
;;;191 {
;;;192 GPIOx->BRR = (((u32)0x01) << (pinpos + 0x08));
00008c 6144 STR r4,[r0,#0x14]
|L3.142|
;;;193 }
;;;194 /* Set the corresponding ODR bit */
;;;195 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00008e 78ce LDRB r6,[r1,#3]
000090 2e48 CMP r6,#0x48
000092 d100 BNE |L3.150|
;;;196 {
;;;197 GPIOx->BSRR = (((u32)0x01) << (pinpos + 0x08));
000094 6104 STR r4,[r0,#0x10]
|L3.150|
000096 1c52 ADDS r2,r2,#1
000098 2a08 CMP r2,#8
00009a d3e3 BCC |L3.100|
;;;198 }
;;;199 }
;;;200 }
;;;201 GPIOx->CRH = tmpreg;
00009c 6045 STR r5,[r0,#4]
|L3.158|
;;;202 }
;;;203 }
00009e bdf0 POP {r4-r7,pc}
ENDP
AREA ||i.GPIO_StructInit||, CODE, READONLY, ALIGN=1
GPIO_StructInit PROC
;;;215 /* Reset GPIO init structure parameters values */
;;;216 GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
000000 f64ff64f MOV r1,#0xffff
000004 8001 STRH r1,[r0,#0]
;;;217 GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
000006 2102 MOVS r1,#2
000008 7081 STRB r1,[r0,#2]
;;;218 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
00000a 2104 MOVS r1,#4
00000c 70c1 STRB r1,[r0,#3]
;;;219 }
00000e 4770 BX lr
ENDP
AREA ||i.GPIO_ReadInputDataBit||, CODE, READONLY, ALIGN=1
GPIO_ReadInputDataBit PROC
;;;230 u8 GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin)
;;;231 {
000000 4602 MOV r2,r0
;;;232 u8 bitstatus = 0x00;
;;;233
;;;234 /* Check the parameters */
;;;235 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
;;;236
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