stm32f10x_usart.txt
来自「基于cortex arm stm32f103RB的智能卡（SmartCard）程」· 文本 代码 · 共 844 行 · 第 1/3 页
TXT
844 行
000010 8181 STRH r1,[r0,#0xc]
;;;260 }
;;;261 }
000012 4770 BX lr
ENDP
AREA ||i.USART_ITConfig||, CODE, READONLY, ALIGN=1
USART_ITConfig PROC
;;;284 void USART_ITConfig(USART_TypeDef* USARTx, u16 USART_IT, FunctionalState NewState)
;;;285 {
000000 b510 PUSH {r4,lr}
;;;286 u32 usartreg = 0x00, itpos = 0x00, itmask = 0x00;
;;;287 u32 address = 0x00;
;;;288
;;;289 /* Check the parameters */
;;;290 assert_param(IS_USART_CONFIG_IT(USART_IT));
;;;291 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;292
;;;293 /* Get the USART register index */
;;;294 usartreg = (((u8)USART_IT) >> 0x05);
000002 f3c1f3c1 UBFX r3,r1,#5,#3
;;;295
;;;296 /* Get the interrupt position */
;;;297 itpos = USART_IT & USART_IT_Mask;
000006 f001f001 AND r4,r1,#0x1f
;;;298
;;;299 itmask = (((u32)0x01) << itpos);
00000a 2101 MOVS r1,#1
00000c 40a1 LSLS r1,r1,r4
;;;300 address = *(u32*)&(USARTx);
;;;301
;;;302 if (usartreg == 0x01) /* The IT is in CR1 register */
00000e 2b01 CMP r3,#1
000010 d101 BNE |L5.22|
;;;303 {
;;;304 address += 0x0C;
000012 300c ADDS r0,r0,#0xc
000014 e004 B |L5.32|
|L5.22|
;;;305 }
;;;306 else if (usartreg == 0x02) /* The IT is in CR2 register */
000016 2b02 CMP r3,#2
000018 d101 BNE |L5.30|
;;;307 {
;;;308 address += 0x10;
00001a 3010 ADDS r0,r0,#0x10
00001c e000 B |L5.32|
|L5.30|
;;;309 }
;;;310 else /* The IT is in CR3 register */
;;;311 {
;;;312 address += 0x14;
00001e 3014 ADDS r0,r0,#0x14
|L5.32|
;;;313 }
;;;314 if (NewState != DISABLE)
000020 2a00 CMP r2,#0
000022 6802 LDR r2,[r0,#0]
000024 d001 BEQ |L5.42|
;;;315 {
;;;316 *(u32*)address |= itmask;
000026 430a ORRS r2,r2,r1
000028 e000 B |L5.44|
|L5.42|
;;;317 }
;;;318 else
;;;319 {
;;;320 *(u32*)address &= ~itmask;
00002a 438a BICS r2,r2,r1
|L5.44|
00002c 6002 STR r2,[r0,#0]
;;;321 }
;;;322 }
00002e bd10 POP {r4,pc}
ENDP
AREA ||i.USART_DMACmd||, CODE, READONLY, ALIGN=1
USART_DMACmd PROC
;;;343
;;;344 if (NewState != DISABLE)
000000 2a00 CMP r2,#0
;;;345 {
;;;346 /* Enable the DMA transfer for selected requests by setting the DMAT and/or
;;;347 DMAR bits in the USART CR3 register */
;;;348 USARTx->CR3 |= USART_DMAReq;
000002 8a82 LDRH r2,[r0,#0x14]
000004 d001 BEQ |L6.10|
000006 430a ORRS r2,r2,r1
000008 e000 B |L6.12|
|L6.10|
;;;349 }
;;;350 else
;;;351 {
;;;352 /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
;;;353 DMAR bits in the USART CR3 register */
;;;354 USARTx->CR3 &= (u16)~USART_DMAReq;
00000a 438a BICS r2,r2,r1
|L6.12|
00000c 8282 STRH r2,[r0,#0x14]
;;;355 }
;;;356 }
00000e 4770 BX lr
ENDP
AREA ||i.USART_SetAddress||, CODE, READONLY, ALIGN=1
USART_SetAddress PROC
;;;372 /* Clear the USART address */
;;;373 USARTx->CR2 &= CR2_Address_Mask;
000000 8a02 LDRH r2,[r0,#0x10]
000002 f022f022 BIC r2,r2,#0xf
000006 8202 STRH r2,[r0,#0x10]
;;;374 /* Set the USART address node */
;;;375 USARTx->CR2 |= USART_Address;
000008 8a02 LDRH r2,[r0,#0x10]
00000a 430a ORRS r2,r2,r1
00000c 8202 STRH r2,[r0,#0x10]
;;;376 }
00000e 4770 BX lr
ENDP
AREA ||i.USART_WakeUpConfig||, CODE, READONLY, ALIGN=1
USART_WakeUpConfig PROC
;;;394
;;;395 USARTx->CR1 &= CR3_WAKE_Mask;
000000 8982 LDRH r2,[r0,#0xc]
000002 f422f422 BIC r2,r2,#0x800
000006 8182 STRH r2,[r0,#0xc]
;;;396 USARTx->CR1 |= USART_WakeUp;
000008 8982 LDRH r2,[r0,#0xc]
00000a 430a ORRS r2,r2,r1
00000c 8182 STRH r2,[r0,#0xc]
;;;397 }
00000e 4770 BX lr
ENDP
AREA ||i.USART_ReceiverWakeUpCmd||, CODE, READONLY, ALIGN=1
USART_ReceiverWakeUpCmd PROC
;;;413
;;;414 if (NewState != DISABLE)
000000 2900 CMP r1,#0
;;;415 {
;;;416 /* Enable the mute mode USART by setting the RWU bit in the CR1 register */
;;;417 USARTx->CR1 |= CR1_RWU_Set;
000002 8981 LDRH r1,[r0,#0xc]
000004 d002 BEQ |L9.12|
000006 f041f041 ORR r1,r1,#2
00000a e001 B |L9.16|
|L9.12|
;;;418 }
;;;419 else
;;;420 {
;;;421 /* Disable the mute mode USART by clearing the RWU bit in the CR1 register */
;;;422 USARTx->CR1 &= CR1_RWU_Reset;
00000c f021f021 BIC r1,r1,#2
|L9.16|
000010 8181 STRH r1,[r0,#0xc]
;;;423 }
;;;424 }
000012 4770 BX lr
ENDP
AREA ||i.USART_LINBreakDetectLengthConfig||, CODE, READONLY, ALIGN=1
USART_LINBreakDetectLengthConfig PROC
;;;443
;;;444 USARTx->CR2 &= CR3_LBDL_Mask;
000000 8a02 LDRH r2,[r0,#0x10]
000002 f022f022 BIC r2,r2,#0x20
000006 8202 STRH r2,[r0,#0x10]
;;;445 USARTx->CR2 |= USART_LINBreakDetectLength;
000008 8a02 LDRH r2,[r0,#0x10]
00000a 430a ORRS r2,r2,r1
00000c 8202 STRH r2,[r0,#0x10]
;;;446 }
00000e 4770 BX lr
ENDP
AREA ||i.USART_LINCmd||, CODE, READONLY, ALIGN=1
USART_LINCmd PROC
;;;462
;;;463 if (NewState != DISABLE)
000000 2900 CMP r1,#0
;;;464 {
;;;465 /* Enable the LIN mode by setting the LINE bit in the CR2 register */
;;;466 USARTx->CR2 |= CR2_LINE_Set;
000002 8a01 LDRH r1,[r0,#0x10]
000004 d002 BEQ |L11.12|
000006 f441f441 ORR r1,r1,#0x4000
00000a e001 B |L11.16|
|L11.12|
;;;467 }
;;;468 else
;;;469 {
;;;470 /* Disable the LIN mode by clearing the LINE bit in the CR2 register */
;;;471 USARTx->CR2 &= CR2_LINE_Reset;
00000c f421f421 BIC r1,r1,#0x4000
|L11.16|
000010 8201 STRH r1,[r0,#0x10]
;;;472 }
;;;473 }
000012 4770 BX lr
ENDP
AREA ||i.USART_SendData||, CODE, READONLY, ALIGN=1
USART_SendData PROC
;;;489 /* Transmit Data */
;;;490 USARTx->DR = (Data & (u16)0x01FF);
000000 f3c1f3c1 UBFX r1,r1,#0,#9
000004 8081 STRH r1,[r0,#4]
;;;491 }
000006 4770 BX lr
ENDP
AREA ||i.USART_ReceiveData||, CODE, READONLY, ALIGN=1
USART_ReceiveData PROC
;;;503 /* Receive Data */
;;;504 return (u16)(USARTx->DR & (u16)0x01FF);
000000 8880 LDRH r0,[r0,#4]
000002 f3c0f3c0 UBFX r0,r0,#0,#9
;;;505 }
000006 4770 BX lr
ENDP
AREA ||i.USART_SendBreak||, CODE, READONLY, ALIGN=1
USART_SendBreak PROC
;;;517 /* Send break characters */
;;;518 USARTx->CR1 |= CR1_SBK_Set;
000000 8981 LDRH r1,[r0,#0xc]
000002 f041f041 ORR r1,r1,#1
000006 8181 STRH r1,[r0,#0xc]
;;;519 }
000008 4770 BX lr
ENDP
AREA ||i.USART_SetGuardTime||, CODE, READONLY, ALIGN=1
USART_SetGuardTime PROC
;;;532 /* Clear the USART Guard time */
;;;533 USARTx->GTPR &= GTPR_LSB_Mask;
000000 8b02 LDRH r2,[r0,#0x18]
000002 b2d2 UXTB r2,r2
000004 8302 STRH r2,[r0,#0x18]
;;;534 /* Set the USART guard time */
;;;535 USARTx->GTPR |= (u16)((u16)USART_GuardTime << 0x08);
000006 8b02 LDRH r2,[r0,#0x18]
000008 ea42ea42 ORR r1,r2,r1,LSL #8
00000c 8301 STRH r1,[r0,#0x18]
;;;536 }
00000e 4770 BX lr
ENDP
AREA ||i.USART_SetPrescaler||, CODE, READONLY, ALIGN=1
USART_SetPrescaler PROC
;;;549 /* Clear the USART prescaler */
;;;550 USARTx->GTPR &= GTPR_MSB_Mask;
000000 8b02 LDRH r2,[r0,#0x18]
000002 f402f402 AND r2,r2,#0xff00
000006 8302 STRH r2,[r0,#0x18]
;;;551 /* Set the USART prescaler */
;;;552 USARTx->GTPR |= USART_Prescaler;
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