ethernet.h

网口收发程序

/*-----------------------------------------------------------------------                               
*
* File:  ethernet.h
* Description:  Constants and Definitions for MPC8272 SCC Ethernet Example
*               [Interrupt-driven version].
*
* History:
* 07 JAN 99    pdw     Initial version. Created from 860 SCC Example
* 05 FEB 99    pdw     Updated and re-tested on 8260 ADS board
* 23 NOV 99    jms	   Modified to work on the PILOT revision ADS board.
*                      Code checks board revision via BCSR2.
* 16 JUN 03    ddc     Modified code to work on the PQ27FADS
* 24 JUN 04    ddc	   Modified code to run in MPC8272 environment, and removed
*					   revision modifications
*-----------------------------------------------------------------------*/

/*-----------------------------------------------------------------*/
/*                      CONSTANTS AND DEFINITIONS                  */
/*-----------------------------------------------------------------*/

/*----------------------------------------*/
/* Base Address of Exception Vector Table */
/*----------------------------------------*/

#define BASE_EVT 0x0  

/*------------------------------------------*/
/* Base address of external  interrupt code */
/*------------------------------------------*/

#define EXT_INT_VECTOR ((BASE_EVT) + 0x500)  

#define NEXT_VECTOR (EXT_INT_VECTOR + 0x100)


/*----------------------------------------*/
/*  APPLICATION CONSTANTS AND DEFINITIONS */
/*----------------------------------------*/


/*---------------------------*/
/* Constants and Definitions */
/* for Ethernet              */
/*---------------------------*/

#define ENET_C_PRES    0xFFFFFFFF    /* CRC Preset                */
#define ENET_C_MASK    0xDEBB20E3    /* Constant MASK for CRC     */
#define ENET_MFLR      1518          /* Ethernet Max Frame Length */
#define ENET_MINFLR    64            /* Ethernet Min Frame Length */
#define ENET_MDMA      1520          /* Max DMA length            */
#define ENET_MRBLR     1520          /* Max receive buffer length */
#define ENET_RET_LIM   15            /* Retry Limit Threshold     */
#define ENET_PAD       0x8888        /* Pad Characters            */
#define ENET_DSR       0xD555        /* DSR value for Ethernet    */
#define ENET_PADDR_H   0x5548;       /* Physical Address 1 (MSB)  */
#define ENET_PADDR     0x3322;       /* Physical Address          */
#define ENET_PADDR_L   0x1900;       /* Physical Address 1 (LSB)  */

#define TXBUFINDEX     8


/*------------------------------------------------*/
/* Define Base of BD's at base of Internal Memory */
/*------------------------------------------------*/

#define BASE_OF_BDS 0x04700000

/*--------------------------------------*/
/* Size of Tx/Rx buffers in buffer pool */
/*--------------------------------------*/

#define RX_BUFFER_SIZE 256 
                           

#define TX_BUFFER_SIZE 256

/*---------------------------------------------------*/
/* Number of Receive and Transmit Buffer Descriptors */
/*---------------------------------------------------*/

#define NUM_RXBDS 8
#define NUM_TXBDS 8


/*-------------------------*/
/* Single buffer component */
/*-------------------------*/

typedef UBYTE RXB[RX_BUFFER_SIZE];
typedef UBYTE TXB[TX_BUFFER_SIZE];

typedef struct BufferDescriptor 

{
   UHWORD bd_cstatus;     /* control and status */
   UHWORD bd_length;      /* transfer length    */
   UBYTE  *bd_addr;       /* buffer address     */

} BD;

/*--------------------------*/
/* Buffer Descriptor Format */
/*--------------------------*/

typedef struct BufferDescRings 

{
    BD RxBD[NUM_RXBDS];    /* Rx BD ring */
    BD TxBD[NUM_TXBDS];    /* Tx BD ring */

} BDRINGS;

/*-------------------------------------------------------------------*/
/* Mask for set of Receive Buffer Errors, DE, LG, NO, AB, CR, OV, CD */
/*-------------------------------------------------------------------*/

#define BD_RX_ERROR 0xBF    

/*-----------------------------------------------------------------*/
/* Number of Instructions in Vector Table for particular Interrupt */
/*-----------------------------------------------------------------*/

#define VECTOR_BLOCK_LEN 0x100

/*--------------------------------*/
/* Define Interrupt Code for SCC1 */ 
/*--------------------------------*/

#define SCC1_VECTOR 0x28  


/*----------------------------------------------*/
/* Board Control and Status Register (for VADS) */
/*----------------------------------------------*/

typedef struct bcsr 

{
	UWORD  bcsr0; /* Board Control and Status Register */
	UWORD  bcsr1;
	UWORD  bcsr2;
	UWORD  bcsr3;

} t_BCSR;

/* BCSR bit definitions */ 

#define GREEN 2
#define GP_LED1 0x02000000

#define RED 1
#define GP_LED2 0x01000000