spi4_rx_dl_uc.list

ixp2400的一个小程序

.%type P2 12
.%type P2 12
.%type P2 12
.%type S4 scratch_atomic_ind_t{
__unnamed 0 25;
}
.%type S4 {
__unnamed 0 26;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
reserved 0:12:14 14;
xadd 0:5:7 14;
ov_xadd 0:4:1 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type P2 14
.%type P2 14
.%type P2 14
.%type P2 31
.%type S8 {
even 0 17;
odd 4 17;
}
.%type P2 14
.%type P2 12
.%type S4 sram_read_write_ind_t{
__unnamed 0 35;
}
.%type S4 {
__unnamed 0 36;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
ov_ref_count 0:25:1 14;
ref_count 0:21:4 14;
ov_byte_mask 0:20:1 14;
reserved 0:16:4 14;
byte_mask 0:12:4 14;
xadd 0:5:7 14;
ov_xadd 0:4:1 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type S4 sram_atomic_ind_t{
__unnamed 0 38;
}
.%type S4 {
__unnamed 0 39;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
reserved1 0:21:5 14;
ov_byte_mask 0:20:1 14;
reserved2 0:16:4 14;
byte_mask 0:12:4 14;
xadd 0:5:7 14;
ov_xadd 0:4:1 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type S4 sram_atomic_no_null_ind_t{
__unnamed 0 41;
}
.%type S4 {
__unnamed 0 42;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
ov_int11_hi 0:25:1 14;
enable_no_pull 0:24:1 14;
int11_hi 0:21:3 17;
ov_int11_lo 0:20:1 14;
int11_lo 0:12:8 14;
xadd 0:5:7 14;
ov_xadd 0:4:1 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type S4 sram_enqueue_ind_t{
__unnamed 0 44;
}
.%type S4 {
__unnamed 0 45;
value 0 14;
}
.%type S4 {
reserved1 0:21:11 14;
ov_eop_sop_seg_count 0:20:1 14;
eop 0:19:1 14;
sop 0:18:1 14;
seg_count 0:12:6 14;
reserved2 0:0:12 14;
}
.%type S4 sram_dequeue_ind_t{
__unnamed 0 47;
}
.%type S4 {
__unnamed 0 48;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
reserved 0:4:22 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type P3 12
.%type S4 dram_read_write_ind_t{
__unnamed 0 51;
}
.%type S4 {
__unnamed 0 52;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
ov_ref_count 0:25:1 14;
ref_count 0:21:4 14;
ov_byte_mask 0:20:1 14;
byte_mask 0:12:8 14;
xadd 0:5:7 14;
ov_xadd 0:4:1 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type S4 dram_rbuf_tbuf_ind_t{
__unnamed 0 54;
}
.%type S4 {
__unnamed 0 55;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
ov_ref_count 0:25:1 14;
ref_count 0:21:4 14;
reserved 0:19:2 14;
buf_addr 0:5:14 14;
ov_buf_addr 0:4:1 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type E4 {
sig_initiator 0;
sig_remote 1;
sig_both 2;
}
.%type E4 {
csr_thd_msg 16384;
csr_thd_msg_summary_0_0 16388;
csr_thd_msg_summary_0_1 16392;
csr_thd_msg_summary_1_0 16396;
csr_thd_msg_summary_1_1 16400;
csr_self_destruct_0 16404;
csr_self_destruct_1 16408;
csr_interthread_sig 16412;
csr_thread_interrupt_a 19232;
csr_xscale_int_a 19232;
csr_thread_interrupt_b 19236;
csr_xscale_int_b 19236;
csr_hash_multiplier_48_0 18688;
csr_hash_multiplier_48_1 18692;
csr_hash_multiplier_64_0 18696;
csr_hash_multiplier_64_1 18700;
csr_hash_multiplier_128_0 18704;
csr_hash_multiplier_128_1 18708;
csr_hash_multiplier_128_2 18712;
csr_hash_multiplier_128_3 18716;
csr_thd_msg_clr_0_0_0 16640;
csr_thd_msg_clr_0_0_1 16644;
csr_thd_msg_clr_0_0_2 16648;
csr_thd_msg_clr_0_0_3 16652;
csr_thd_msg_clr_0_0_4 16656;
csr_thd_msg_clr_0_0_5 16660;
csr_thd_msg_clr_0_0_6 16664;
csr_thd_msg_clr_0_0_7 16668;
csr_thd_msg_clr_0_1_0 16672;
csr_thd_msg_clr_0_1_1 16676;
csr_thd_msg_clr_0_1_2 16680;
csr_thd_msg_clr_0_1_3 16684;
csr_thd_msg_clr_0_1_4 16688;
csr_thd_msg_clr_0_1_5 16692;
csr_thd_msg_clr_0_1_6 16696;
csr_thd_msg_clr_0_1_7 16700;
csr_thd_msg_clr_0_2_0 16704;
csr_thd_msg_clr_0_2_1 16708;
csr_thd_msg_clr_0_2_2 16712;
csr_thd_msg_clr_0_2_3 16716;
csr_thd_msg_clr_0_2_4 16720;
csr_thd_msg_clr_0_2_5 16724;
csr_thd_msg_clr_0_2_6 16728;
csr_thd_msg_clr_0_2_7 16732;
csr_thd_msg_clr_0_3_0 16736;
csr_thd_msg_clr_0_3_1 16740;
csr_thd_msg_clr_0_3_2 16744;
csr_thd_msg_clr_0_3_3 16748;
csr_thd_msg_clr_0_3_4 16752;
csr_thd_msg_clr_0_3_5 16756;
csr_thd_msg_clr_0_3_6 16760;
csr_thd_msg_clr_0_3_7 16764;
csr_thd_msg_clr_0_4_0 16768;
csr_thd_msg_clr_0_4_1 16772;
csr_thd_msg_clr_0_4_2 16776;
csr_thd_msg_clr_0_4_3 16780;
csr_thd_msg_clr_0_4_4 16784;
csr_thd_msg_clr_0_4_5 16788;
csr_thd_msg_clr_0_4_6 16792;
csr_thd_msg_clr_0_4_7 16796;
csr_thd_msg_clr_0_5_0 16800;
csr_thd_msg_clr_0_5_1 16804;
csr_thd_msg_clr_0_5_2 16808;
csr_thd_msg_clr_0_5_3 16812;
csr_thd_msg_clr_0_5_4 16816;
csr_thd_msg_clr_0_5_5 16820;
csr_thd_msg_clr_0_5_6 16824;
csr_thd_msg_clr_0_5_7 16828;
csr_thd_msg_clr_0_6_0 16832;
csr_thd_msg_clr_0_6_1 16836;
csr_thd_msg_clr_0_6_2 16840;
csr_thd_msg_clr_0_6_3 16844;
csr_thd_msg_clr_0_6_4 16848;
csr_thd_msg_clr_0_6_5 16852;
csr_thd_msg_clr_0_6_6 16856;
csr_thd_msg_clr_0_6_7 16860;
csr_thd_msg_clr_0_7_0 16864;
csr_thd_msg_clr_0_7_1 16868;
csr_thd_msg_clr_0_7_2 16872;
csr_thd_msg_clr_0_7_3 16876;
csr_thd_msg_clr_0_7_4 16880;
csr_thd_msg_clr_0_7_5 16884;
csr_thd_msg_clr_0_7_6 16888;
csr_thd_msg_clr_0_7_7 16892;
csr_thd_msg_clr_1_0_0 16896;
csr_thd_msg_clr_1_0_1 16900;
csr_thd_msg_clr_1_0_2 16904;
csr_thd_msg_clr_1_0_3 16908;
csr_thd_msg_clr_1_0_4 16912;
csr_thd_msg_clr_1_0_5 16916;
csr_thd_msg_clr_1_0_6 16920;
csr_thd_msg_clr_1_0_7 16924;
csr_thd_msg_clr_1_1_0 16928;
csr_thd_msg_clr_1_1_1 16932;
csr_thd_msg_clr_1_1_2 16936;
csr_thd_msg_clr_1_1_3 16940;
csr_thd_msg_clr_1_1_4 16944;
csr_thd_msg_clr_1_1_5 16948;
csr_thd_msg_clr_1_1_6 16952;
csr_thd_msg_clr_1_1_7 16956;
csr_thd_msg_clr_1_2_0 16960;
csr_thd_msg_clr_1_2_1 16964;
csr_thd_msg_clr_1_2_2 16968;
csr_thd_msg_clr_1_2_3 16972;
csr_thd_msg_clr_1_2_4 16976;
csr_thd_msg_clr_1_2_5 16980;
csr_thd_msg_clr_1_2_6 16984;
csr_thd_msg_clr_1_2_7 16988;
csr_thd_msg_clr_1_3_0 16992;
csr_thd_msg_clr_1_3_1 16996;
csr_thd_msg_clr_1_3_2 17000;
csr_thd_msg_clr_1_3_3 17004;
csr_thd_msg_clr_1_3_4 17008;
csr_thd_msg_clr_1_3_5 17012;
csr_thd_msg_clr_1_3_6 17016;
csr_thd_msg_clr_1_3_7 17020;
csr_thd_msg_clr_1_4_0 17024;
csr_thd_msg_clr_1_4_1 17028;
csr_thd_msg_clr_1_4_2 17032;
csr_thd_msg_clr_1_4_3 17036;
csr_thd_msg_clr_1_4_4 17040;
csr_thd_msg_clr_1_4_5 17044;
csr_thd_msg_clr_1_4_6 17048;
csr_thd_msg_clr_1_4_7 17052;
csr_thd_msg_clr_1_5_0 17056;
csr_thd_msg_clr_1_5_1 17060;
csr_thd_msg_clr_1_5_2 17064;
csr_thd_msg_clr_1_5_3 17068;
csr_thd_msg_clr_1_5_4 17072;
csr_thd_msg_clr_1_5_5 17076;
csr_thd_msg_clr_1_5_6 17080;
csr_thd_msg_clr_1_5_7 17084;
csr_thd_msg_clr_1_6_0 17088;
csr_thd_msg_clr_1_6_1 17092;
csr_thd_msg_clr_1_6_2 17096;
csr_thd_msg_clr_1_6_3 17100;
csr_thd_msg_clr_1_6_4 17104;
csr_thd_msg_clr_1_6_5 17108;
csr_thd_msg_clr_1_6_6 17112;
csr_thd_msg_clr_1_6_7 17116;
csr_thd_msg_clr_1_7_0 17120;
csr_thd_msg_clr_1_7_1 17124;
csr_thd_msg_clr_1_7_2 17128;
csr_thd_msg_clr_1_7_3 17132;
csr_thd_msg_clr_1_7_4 17136;
csr_thd_msg_clr_1_7_5 17140;
csr_thd_msg_clr_1_7_6 17144;
csr_thd_msg_clr_1_7_7 17148;
csr_msf_dll_delay_ctl 17228;
csr_fc_dll_delay_ctl 17268;
csr_thd_msg_0_0_0 17664;
csr_thd_msg_0_0_1 17668;
csr_thd_msg_0_0_2 17672;
csr_thd_msg_0_0_3 17676;
csr_thd_msg_0_0_4 17680;
csr_thd_msg_0_0_5 17684;
csr_thd_msg_0_0_6 17688;
csr_thd_msg_0_0_7 17692;
csr_thd_msg_0_1_0 17696;
csr_thd_msg_0_1_1 17700;
csr_thd_msg_0_1_2 17704;
csr_thd_msg_0_1_3 17708;
csr_thd_msg_0_1_4 17712;
csr_thd_msg_0_1_5 17716;
csr_thd_msg_0_1_6 17720;
csr_thd_msg_0_1_7 17724;
csr_thd_msg_0_2_0 17728;
csr_thd_msg_0_2_1 17732;
csr_thd_msg_0_2_2 17736;
csr_thd_msg_0_2_3 17740;
csr_thd_msg_0_2_4 17744;
csr_thd_msg_0_2_5 17748;
csr_thd_msg_0_2_6 17752;
csr_thd_msg_0_2_7 17756;
csr_thd_msg_0_3_0 17760;
csr_thd_msg_0_3_1 17764;
csr_thd_msg_0_3_2 17768;
csr_thd_msg_0_3_3 17772;
csr_thd_msg_0_3_4 17776;
csr_thd_msg_0_3_5 17780;
csr_thd_msg_0_3_6 17784;
csr_thd_msg_0_3_7 17788;
csr_thd_msg_0_4_0 17792;
csr_thd_msg_0_4_1 17796;
csr_thd_msg_0_4_2 17800;
csr_thd_msg_0_4_3 17804;
csr_thd_msg_0_4_4 17808;
csr_thd_msg_0_4_5 17812;
csr_thd_msg_0_4_6 17816;
csr_thd_msg_0_4_7 17820;
csr_thd_msg_0_5_0 17824;
csr_thd_msg_0_5_1 17828;
csr_thd_msg_0_5_2 17832;
csr_thd_msg_0_5_3 17836;
csr_thd_msg_0_5_4 17840;
csr_thd_msg_0_5_5 17844;
csr_thd_msg_0_5_6 17848;
csr_thd_msg_0_5_7 17852;
csr_thd_msg_0_6_0 17856;
csr_thd_msg_0_6_1 17860;
csr_thd_msg_0_6_2 17864;
csr_thd_msg_0_6_3 17868;
csr_thd_msg_0_6_4 17872;
csr_thd_msg_0_6_5 17876;
csr_thd_msg_0_6_6 17880;
csr_thd_msg_0_6_7 17884;
csr_thd_msg_0_7_0 17888;
csr_thd_msg_0_7_1 17892;
csr_thd_msg_0_7_2 17896;
csr_thd_msg_0_7_3 17900;
csr_thd_msg_0_7_4 17904;
csr_thd_msg_0_7_5 17908;
csr_thd_msg_0_7_6 17912;
csr_thd_msg_0_7_7 17916;
csr_thd_msg_1_0_0 17920;
csr_thd_msg_1_0_1 17924;
csr_thd_msg_1_0_2 17928;
csr_thd_msg_1_0_3 17932;
csr_thd_msg_1_0_4 17936;
csr_thd_msg_1_0_5 17940;
csr_thd_msg_1_0_6 17944;
csr_thd_msg_1_0_7 17948;
csr_thd_msg_1_1_0 17952;
csr_thd_msg_1_1_1 17956;
csr_thd_msg_1_1_2 17960;
csr_thd_msg_1_1_3 17964;
csr_thd_msg_1_1_4 17968;
csr_thd_msg_1_1_5 17972;
csr_thd_msg_1_1_6 17976;
csr_thd_msg_1_1_7 17980;
csr_thd_msg_1_2_0 17984;
csr_thd_msg_1_2_1 17988;
csr_thd_msg_1_2_2 17992;
csr_thd_msg_1_2_3 17996;
csr_thd_msg_1_2_4 18000;
csr_thd_msg_1_2_5 18004;
csr_thd_msg_1_2_6 18008;
csr_thd_msg_1_2_7 18012;
csr_thd_msg_1_3_0 18016;
csr_thd_msg_1_3_1 18020;
csr_thd_msg_1_3_2 18024;
csr_thd_msg_1_3_3 18028;
csr_thd_msg_1_3_4 18032;
csr_thd_msg_1_3_5 18036;
csr_thd_msg_1_3_6 18040;
csr_thd_msg_1_3_7 18044;
csr_thd_msg_1_4_0 18048;
csr_thd_msg_1_4_1 18052;
csr_thd_msg_1_4_2 18056;
csr_thd_msg_1_4_3 18060;
csr_thd_msg_1_4_4 18064;
csr_thd_msg_1_4_5 18068;
csr_thd_msg_1_4_6 18072;
csr_thd_msg_1_4_7 18076;
csr_thd_msg_1_5_0 18080;
csr_thd_msg_1_5_1 18084;
csr_thd_msg_1_5_2 18088;
csr_thd_msg_1_5_3 18092;
csr_thd_msg_1_5_4 18096;
csr_thd_msg_1_5_5 18100;
csr_thd_msg_1_5_6 18104;
csr_thd_msg_1_5_7 18108;
csr_thd_msg_1_6_0 18112;
csr_thd_msg_1_6_1 18116;
csr_thd_msg_1_6_2 18120;
csr_thd_msg_1_6_3 18124;
csr_thd_msg_1_6_4 18128;
csr_thd_msg_1_6_5 18132;
csr_thd_msg_1_6_6 18136;
csr_thd_msg_1_6_7 18140;
csr_thd_msg_1_7_0 18144;
csr_thd_msg_1_7_1 18148;
csr_thd_msg_1_7_2 18152;
csr_thd_msg_1_7_3 18156;
csr_thd_msg_1_7_4 18160;
csr_thd_msg_1_7_5 18164;
csr_thd_msg_1_7_6 18168;
csr_thd_msg_1_7_7 18172;
csr_scratch_ring_base_0 18432;
csr_scratch_ring_head_0 18436;
csr_scratch_ring_tail_0 18440;
csr_scratch_ring_base_1 18448;
csr_scratch_ring_head_1 18452;
csr_scratch_ring_tail_1 18456;
csr_scratch_ring_base_2 18464;
csr_scratch_ring_head_2 18468;
csr_scratch_ring_tail_2 18472;
csr_scratch_ring_base_3 18480;
csr_scratch_ring_head_3 18484;
csr_scratch_ring_tail_3 18488;
csr_scratch_ring_base_4 18496;
csr_scratch_ring_head_4 18500;
csr_scratch_ring_tail_4 18504;
csr_scratch_ring_base_5 18512;
csr_scratch_ring_head_5 18516;
csr_scratch_ring_tail_5 18520;
csr_scratch_ring_base_6 18528;
csr_scratch_ring_head_6 18532;
csr_scratch_ring_tail_6 18536;
csr_scratch_ring_base_7 18544;
csr_scratch_ring_head_7 18548;
csr_scratch_ring_tail_7 18552;
csr_scratch_ring_base_8 18560;
csr_scratch_ring_head_8 18564;
csr_scratch_ring_tail_8 18568;
csr_scratch_ring_base_9 18576;
csr_scratch_ring_head_9 18580;
csr_scratch_ring_tail_9 18584;
csr_scratch_ring_base_10 18592;
csr_scratch_ring_head_10 18596;
csr_scratch_ring_tail_10 18600;
csr_scratch_ring_base_11 18608;
csr_scratch_ring_head_11 18612;
csr_scratch_ring_tail_11 18616;
csr_scratch_ring_base_12 18624;
csr_scratch_ring_head_12 18628;
csr_scratch_ring_tail_12 18632;
csr_scratch_ring_base_13 18640;
csr_scratch_ring_head_13 18644;
csr_scratch_ring_tail_13 18648;
csr_scratch_ring_base_14 18656;
csr_scratch_ring_head_14 18660;
csr_scratch_ring_tail_14 18664;
csr_scratch_ring_base_15 18672;
csr_scratch_ring_head_15 18676;
csr_scratch_ring_tail_15 18680;
csr_product_id 18944;
csr_misc_control 18948;
csr_perf_counter_control 18952;
csr_ixp_reset_0 18956;
csr_ixp_reset_1 18960;
csr_clock_control 18964;
csr_strap_options 18968;
}
.%type P2 12
.%type P2 12
.%type P2 17
.%type P2 12
.%type P2 12
.%type S4 hash_ind_t{
__unnamed 0 64;
}
.%type S4 {
__unnamed 0 65;
value 0 14;
}
.%type S4 {
ov_ueng_addr 0:31:1 14;
ueng_addr 0:26:5 14;
ov_hash_count 0:25:1 14;
reserved1 0:23:2 14;
hash_count 0:21:2 14;
reserved2 0:12:9 14;
xadd 0:5:7 14;
ov_xadd 0:4:1 14;
ov_ctx 0:3:1 14;
ctx 0:0:3 14;
}
.%type P2 12
.%type E4 {
token_none 0;
token_0 1;
token_1 2;
token_0_1 3;
}
.%type S4 generic_ind_t{
dram_rw 0 50;
sram_rw 0 34;
sram_ring 0 18;
pci_rw 0 34;