spi4_rx_dl_uc.list

ixp2400的一个小程序

+version:  10/31/2000
+switches:

+comp_ver Version:       3.5
+Release:       1.4
+Build Number:  8.0.71.3 (v1.4)
+Build Date:    Nov 21 2003 16:15:19

.%bigendian

.cpu_version 0x00000002 16 255
.%num_contexts 8


.%local_mem0_mode rel
.%local_mem1_mode rel
.%init_nn_mode neighbor

.%local_mem dram$tls dram 0 16
.%local_mem sram3$tls sram3 0
.%local_mem sram2$tls sram2 0
.%local_mem sram1$tls sram1 0
.%local_mem sram$tls sram 0
.%local_mem scratch$tls scratch 0
.sig remote _rx_ring_ready_sig
.%init_reg A2 0x0
.%init_reg A7 0x400
.%init_reg B13 0x1000
.%init_reg A13 0x4808
.%init_reg B12 0x4804
.%init_reg A12 0x4800
.%init_reg B11 0x44
.%init_reg A11 0xA0
.%init_reg B10 0x24
.%init_reg A10 0x48
.%init_reg B9 0x8C
.%init_reg A9 0x88
.%init_reg B8 0x84
.%init_reg A8 0x80
.%init_reg B7 0x2000
.%init_reg A6 0x7F0000
.%init_reg B6 0xFFFF
.%init_reg B5 0x0
.%init_reg @B95 0x10080004
.%init_reg @B111 0x80004
.%init_reg @B127 0x2000010
:_dl_sink#	138
:_dl_sink_init#	128
:_main#	0
:_scratch_ring_init#	28
:_scratch_ring_put_buffer#	53
:_spi4_rx#	59
:_spi4_rx_init#	36
:l_100#	15
:l_102#	19
:l_104#	23
:l_1136#	100
:l_1139#	21
:l_1140#	23
:l_1141#	25
:l_1142#	27
:l_1143#	135
:l_1144#	147
:l_130#	66
:l_178#	85
:l_183#	89
:l_207#	96
:l_209#	98
:l_214#	104
:l_246#	127
:l_274#	144
:l_276#	141
:l_869#	137
:start#	0
*a0 gpr_a_rel 00
*a1 gpr_a_rel 01
*a2 gpr_a_rel 02
*a3 gpr_a_rel 03
*a4 gpr_a_rel 04
*a5 gpr_a_rel 05
*a6 gpr_a_rel 06
*a7 gpr_a_rel 07
*a8 gpr_a_rel 08
*a9 gpr_a_rel 09
*a10 gpr_a_rel 0A
*a11 gpr_a_rel 0B
*a12 gpr_a_rel 0C
*a13 gpr_a_rel 0D
*a14 gpr_a_rel 0E
*a15 gpr_a_rel 0F
*b0 gpr_b_rel 00
*b1 gpr_b_rel 01
*b2 gpr_b_rel 02
*b3 gpr_b_rel 03
*b4 gpr_b_rel 04
*b5 gpr_b_rel 05
*b6 gpr_b_rel 06
*b7 gpr_b_rel 07
*b8 gpr_b_rel 08
*b9 gpr_b_rel 09
*b10 gpr_b_rel 0A
*b11 gpr_b_rel 0B
*b12 gpr_b_rel 0C
*b13 gpr_b_rel 0D
*b14 gpr_b_rel 0E
*b15 gpr_b_rel 0F
*$0 sram_rel 000 1 both 0 0
*$1 sram_rel 001 1 both 0 0
*$2 sram_rel 002 1 both 0 0
*$3 sram_rel 003 1 both 0 0
*$4 sram_rel 004 1 both 0 0
*$5 sram_rel 005 1 both 0 0
*$6 sram_rel 006 1 both 0 0
*$7 sram_rel 007 1 both 0 0
*$8 sram_rel 008 1 both 0 0
*$9 sram_rel 009 1 both 0 0
*$10 sram_rel 00A 1 both 0 0
*$11 sram_rel 00B 1 both 0 0
*$12 sram_rel 00C 1 both 0 0
*$13 sram_rel 00D 1 both 0 0
*$14 sram_rel 00E 1 both 0 0
*$15 sram_rel 00F 1 both 0 0
*$$0 dram_rel 000 1 both 0 0
*$$1 dram_rel 001 1 both 0 0
*$$2 dram_rel 002 1 both 0 0
*$$3 dram_rel 003 1 both 0 0
*$$4 dram_rel 004 1 both 0 0
*$$5 dram_rel 005 1 both 0 0
*$$6 dram_rel 006 1 both 0 0
*$$7 dram_rel 007 1 both 0 0
*$$8 dram_rel 008 1 both 0 0
*$$9 dram_rel 009 1 both 0 0
*$$10 dram_rel 00A 1 both 0 0
*$$11 dram_rel 00B 1 both 0 0
*$$12 dram_rel 00C 1 both 0 0
*$$13 dram_rel 00D 1 both 0 0
*$$14 dram_rel 00E 1 both 0 0
*$$15 dram_rel 00F 1 both 0 0
*n$0 neighbor_rel 000
*n$1 neighbor_rel 001
*n$2 neighbor_rel 002
*n$3 neighbor_rel 003
*n$4 neighbor_rel 004
*n$5 neighbor_rel 005
*n$6 neighbor_rel 006
*n$7 neighbor_rel 007
*n$8 neighbor_rel 008
*n$9 neighbor_rel 009
*n$10 neighbor_rel 00A
*n$11 neighbor_rel 00B
*n$12 neighbor_rel 00C
*n$13 neighbor_rel 00D
*n$14 neighbor_rel 00E
*n$15 neighbor_rel 00F
*@b127 gpr_b_abs FF
*@b111 gpr_b_abs EF
*@b95 gpr_b_abs DF
_main#:
.0 FC04400000 common_code
	.%operands 0 0 0 -- -- -- -- -- -- -- --
	.%line 46 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\system_init.h" 1 0
/******/  	if (ctx() == 0 && __ME() == 0)

	local_csr_rd[active_ctx_sts]
.1 F000000300 common_code
	.%operands 0 0 0 -- -- -- -- cgt.12 B0 -- --
	.%line 46 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\system_init.h" 0 0
	immed[b0, 0, <<0]
.2 A440000307 common_code
	.%operands 0 0 0 cgt.12 B0 -- -- a0 A0 -- --
	.%line 46 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\system_init.h" 1 0
	alu[a0, b0, AND, 7]
.3 D804C00101 common_code
	.%operands 0 0 0 -- -- -- -- -- -- -- --
	.%line 46 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\system_init.h" 1 0 19
	bne[l_102#]
.4 843000013F common_code
	.%operands 0 0 0 cgt.12 B0 -- -- a0 A0 -- --
	.%line 46 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\system_init.h" 1 0
	alu_shf[a0, 31, AND, b0, >>3]
.5 D804C00101 common_code
	.%operands 0 0 0 -- -- -- -- -- -- -- --
	.%line 46 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\system_init.h" 1 0 19
	bne[l_102#]
.6 F0000C0180 common_code
	.%operands 0 0 0 -- -- -- -- in_data $W0 -- --
	.%line 543 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 0
/******/  	in_data[0] = 0;

	immed[$0, 0, <<0]
.7 F0000C0181 common_code
	.%operands 0 0 0 -- -- -- -- in_data $W1 -- --
	.%line 544 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 0
/******/  	in_data[1] = 0;

	immed[$1, 0, <<0]
.8 0116003620 common_code
	.%operands 1 4 2 sram_addr B13 -- -- -- -- in_data $W0
	.%line 555 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 2
/******/  	sram_write(&in_data[0], (volatile void __declspec(sram) *)sram_addr, 4, ctx_swap, &sig_buf);

	sram[write, $0, b13, 0, 4], ctx_swap[s1], defer[2]
.9 F0000C0182 common_code
	.%operands 0 0 0 -- -- -- -- in_data $W2 -- --
	.%line 545 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 0 0
/******/  	in_data[2] = 0;

	immed[$2, 0, <<0]
.10 F0000C0183 common_code
	.%operands 0 0 0 -- -- -- -- in_data $W3 -- --
	.%line 546 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 0 0
/******/  	in_data[3] = 0;

	immed[$3, 0, <<0]
.11 0F12048107 common_code
	.%operands 2 2 1 address A7 -- -- -- -- out_data $R0
	.%line 558 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 1
/******/  	sram_read_qdesc_tail(&out_data[0], (volatile void __declspec(sram) *)sram_qa_addr, 2, ctx_swap, &sig_enq);

	sram[rd_qdesc_tail, $0, a7, 0, 2], ctx_swap[s1], defer[1]
.12 F000400300 common_code
	.%operands 0 0 0 -- -- -- -- sram_addr B0 -- --
	.%line 565 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 0 0
/******/  	sram_addr = s_base_lw;

	immed[b0, 1024, <<0]
.13 0F00008307 common_code
	.%operands 0 1 0 address A7 -- -- -- -- -- --
	.%line 559 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 0
/******/  	sram_read_qdesc_other((volatile void __declspec(sram) *)sram_qa_addr);

	sram[rd_qdesc_other, --, a7, 0]
.14 F0001D0000 common_code
	.%operands 0 0 0 -- -- -- -- _buf_fc_cnt A0 -- --
	.%line 561 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 0
/******/  	_buf_fc_cnt = NUM_BUFFERS;

	immed[a0, 320, <<0]
.15 0C00000320 common_code
	.%operands 0 1 0 sram_addr B0 -- -- -- -- -- --
	.%line 580 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 0
/******/  		__asm sram[enqueue, --, sram_addr, 0]

l_100#:
	sram[enqueue, --, b0, 0]
.16 AA800C0400 common_code
	.%operands 0 0 0 _buf_fc_cnt A0 -- -- _buf_fc_cnt A0 -- --
	.%line 583 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 0
/******/  		_buf_fc_cnt = _buf_fc_cnt - 1;

	alu[a0, a0, -, 1]
.17 D803D00101 common_code
	.%operands 0 0 1 -- -- -- -- -- -- -- --
	.%line 574 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 1 1 15
/******/  	while (_buf_fc_cnt)

	bne[l_100#], defer[1]
.18 B0C0000308 common_code
	.%operands 0 0 0 sram_addr B0 -- -- sram_addr B0 -- --
	.%line 582 "G:\IXA_SDK_3.5\src\library\dataplane_library\microC\ixp_buf.c" 0 0
/******/  		sram_addr = sram_addr + s_size_lw;

	alu[b0, b0, +, 8]
.19 D820100018 common_code
	.%operands 0 0 1 -- -- -- -- -- -- -- --
	.%line 44 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 1 1 128
/******/  	dl_sink_init();

l_102#:
	br[_dl_sink_init#], defer[1]
.20 F0000C5400 common_code
	.%operands 0 0 0 -- -- -- -- a0 A0 -- --
	.%line 44 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 0 0
	load_addr[a0, l_1139#]
.21 D809100018 common_code
	.%operands 0 0 1 -- -- -- -- -- -- -- --
	.%line 47 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 1 1 36
/******/  	spi4_rx_init();

l_1139#:
	br[_spi4_rx_init#], defer[1]
.22 F000000317 common_code
	.%operands 0 0 0 -- -- -- -- b0 B0 -- --
	.%line 47 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 0 0
	load_addr[b0, l_1140#]
.23 D80ED00018 common_code
	.%operands 0 0 1 -- -- -- -- -- -- -- --
	.%line 55 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 1 1 59
/******/  		spi4_rx();

l_104#:
	br[_spi4_rx#], defer[1]
.24 F0000C6403 common_code
	.%operands 0 0 0 -- -- -- -- a3 A3 -- --
	.%line 55 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 0 0
	load_addr[a3, l_1141#]
.25 D822900018 common_code
	.%operands 0 0 1 -- -- -- -- -- -- -- --
	.%line 58 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 1 1 138
/******/  		dl_sink();

l_1141#:
	br[_dl_sink#], defer[1]
.26 F00000071B common_code
	.%operands 0 0 0 -- -- -- -- b1 B1 -- --
	.%line 58 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 0 0
	load_addr[b1, l_1142#]
.27 D805C00018 common_code
	.%operands 0 0 0 -- -- -- -- -- -- -- --
	.%line 58 "G:\IXA_SDK_3.5\modify_c_hw3\dispatch_loop\spi4_rx_dl.c" 1 0 23
l_1142#:
	br[l_104#]
_scratch_ring_init#:
.28 8A28008201 common_code
	.%operands 0 0 0 ring_base A1 -- -- ring_init $W0 -- --
	.%line 52 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	ring_init = ring_base | 

	alu_shf[$0, a1, OR, 0, <<30]
.29 3F3004830C common_code
	.%operands 1 1 0 address A12 -- -- -- -- ring_init $W0
	.%line 55 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	cap_write(&ring_init,

	cap[write, $0, a12, 0, 1], sig_done[s3], sig_initiator
.30 F0000C0181 common_code
	.%operands 0 0 0 -- -- -- -- ring_head $W1 -- --
	.%line 63 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	ring_head = 0;

	immed[$1, 0, <<0]
.31 3F20143320 common_code
	.%operands 1 1 0 address B12 -- -- -- -- ring_head $W1
	.%line 64 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	cap_write(&ring_head,

	cap[write, $1, b12, 0, 1], sig_done[s2], sig_initiator
.32 F0000C0182 common_code
	.%operands 0 0 0 -- -- -- -- ring_tail $W2 -- --
	.%line 72 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	ring_tail = 0;

	immed[$2, 0, <<0]
.33 3F1024830D common_code
	.%operands 1 1 0 address A13 -- -- -- -- ring_tail $W2
	.%line 73 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	cap_write(&ring_tail,

	cap[write, $2, a13, 0, 1], sig_done[s1], sig_initiator
.34 E00000000E common_code
	.%operands 0 0 0 -- -- -- -- -- -- -- --
	.%line 81 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	wait_for_all(&ring_init_sig, 

	ctx_arb[s1, s2, s3], all
.35 E800000300 common_code
	.%operands 0 0 0 b0 B0 -- -- b0 B0 -- --
	.%line 87 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0 0 B0
/******/  }

	rtn[b0]
_spi4_rx_init#:
.36 A01803BC00 common_code
	.%operands 0 0 0 @b111 @B111 -- -- rx_ctl $W0 -- --
	.%line 116 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	rx_ctl = RX_CONTROL_VAL;

	alu[$0, --, B, @b111]
.37 3D10001420 common_code
	.%operands 1 1 0 address B5 -- -- -- -- rx_ctl $W0
	.%line 118 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	msf_write(&rx_ctl, addr, 1, ctx_swap, &msf_rx_ctl_sig);

	msf[write, $0, b5, 0, 1], ctx_swap[s1]
.38 F0000CC580 common_code
	.%operands 0 0 0 -- -- -- -- rx_ctl $W0 -- --
	.%line 121 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/      rx_ctl= RX_UP_CONTROL_VAL;

	immed[$0, 49, <<0]
.39 3D10008008 common_code
	.%operands 1 1 0 address A8 -- -- -- -- rx_ctl $W0
	.%line 123 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/      msf_write(&rx_ctl,addr,1,ctx_swap,&msf_rx_ctl_sig);

	msf[write, $0, a8, 0, 1], ctx_swap[s1]
.40 3D10002020 common_code
	.%operands 1 1 0 address B8 -- -- -- -- rx_ctl $W0
	.%line 126 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/      msf_write(&rx_ctl,addr,1,ctx_swap,&msf_rx_ctl_sig);

	msf[write, $0, b8, 0, 1], ctx_swap[s1]
.41 3D10008009 common_code
	.%operands 1 1 0 address A9 -- -- -- -- rx_ctl $W0
	.%line 129 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/      msf_write(&rx_ctl,addr,1,ctx_swap,&msf_rx_ctl_sig);

	msf[write, $0, a9, 0, 1], ctx_swap[s1]
.42 3D10002420 common_code
	.%operands 1 1 0 address B9 -- -- -- -- rx_ctl $W0
	.%line 132 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/      msf_write(&rx_ctl,addr,1,ctx_swap,&msf_rx_ctl_sig);

	msf[write, $0, b9, 0, 1], ctx_swap[s1]
.43 F0000C0580 common_code
	.%operands 0 0 0 -- -- -- -- rx_ctl $W0 -- --
	.%line 135 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	rx_ctl = 1;

	immed[$0, 1, <<0]
.44 3D1000800A common_code
	.%operands 1 1 0 address A10 -- -- -- -- rx_ctl $W0
	.%line 138 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	msf_write(&rx_ctl, addr, 1, ctx_swap, &msf_rx_ctl_sig);

	msf[write, $0, a10, 0, 1], ctx_swap[s1]
.45 F0000C4180 common_code
	.%operands 0 0 0 -- -- -- -- rx_ctl $W0 -- --
	.%line 142 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	rx_ctl = MST_HWM_CONTROL__RBUF_S_HWM__01;

	immed[$0, 16, <<0]
.46 3D10002820 common_code
	.%operands 1 1 0 address B10 -- -- -- -- rx_ctl $W0
	.%line 144 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	msf_write(&rx_ctl, addr, 1, ctx_swap, &msf_rx_ctl_sig);

	msf[write, $0, b10, 0, 1], ctx_swap[s1]
.47 F00F9CED80 common_code
	.%operands 0 0 0 -- -- -- -- rx_ctl $W0 -- --
	.%line 147 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/   	rx_ctl = MSF_TRAIN_DATA__RSTAT_EN;

	immed[$0, 63803, <<0]
.48 3D1000800B common_code
	.%operands 1 1 0 address A11 -- -- -- -- rx_ctl $W0
	.%line 150 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	msf_write(&rx_ctl, addr, 1, ctx_swap, &msf_rx_ctl_sig);

	msf[write, $0, a11, 0, 1], ctx_swap[s1]
.49 3D00042F20 common_code
	.%operands 0 1 0 address B11 -- -- -- -- -- --
	.%line 86 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	msf_fast_write(val_and_addr);

	msf[fast_wr, --, b11, 0, 1]
.50 A018037C00 common_code
	.%operands 0 0 0 @b95 @B95 -- -- rx_ctl $W0 -- --
	.%line 156 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	rx_ctl=	RX_CONTROL_VAL_SECOND;

	alu[$0, --, B, @b95]
.51 3D10001420 common_code
	.%operands 1 1 0 address B5 -- -- -- -- rx_ctl $W0
	.%line 158 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	msf_write(&rx_ctl,addr,1,ctx_swap,&msf_rx_ctl_sig);

	msf[write, $0, b5, 0, 1], ctx_swap[s1]
.52 E800000300 common_code
	.%operands 0 0 0 b0 B0 -- -- b0 B0 -- --
	.%line 159 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0 0 B0
/******/  } 

	rtn[b0]
_scratch_ring_put_buffer#:
.53 A058000001 common_code
	.%operands 0 0 0 _dlBufHandle A1 -- -- packet $W0 -- --
	.%line 209 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
/******/  	packet = data;

	alu[$0, --, B, a1]
.54 A058100000 common_code
	.%operands 0 0 0 r_data A0 -- -- packet $W1 -- --
	.%line 209 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0
	alu[$1, --, B, a0]
.55 1A16001620 common_code
	.%operands 1 4 2 ring_addr B5 -- -- -- -- packet $W0
	.%line 210 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 2
/******/  	scratch_put_ring(&packet,

	scratch[put, $0, b5, 0, 4], ctx_swap[s1], defer[2]
.56 A018200000 common_code
	.%operands 0 0 0 r_data B0 -- -- packet $W2 -- --
	.%line 209 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 0 0
/******/  	packet = data;

	alu[$2, --, B, b0]
.57 A018300400 common_code
	.%operands 0 0 0 r_data B1 -- -- packet $W3 -- --
	.%line 209 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 0 0
	alu[$3, --, B, b1]
.58 E800000B00 common_code
	.%operands 0 0 0 b2 B2 -- -- b2 B2 -- --
	.%line 215 "G:\IXA_SDK_3.5\modify_c_hw3\scratch_rings.c" 1 0 0 B2
/******/  }

	rtn[b2]
_spi4_rx#:
.59 F0000C0001 common_code
	.%operands 0 0 0 -- -- -- -- _dlBufHandle A1 -- --
	.%line 327 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	dlBufHandle.value 	  = 0;

	immed[a1, 0, <<0]
.60 8900201A02 common_code
	.%operands 0 0 0 _dlMeta A2 b6 B6 _dlMeta A2 -- --
	.%line 328 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  	dlMeta.bufferSize 	  = 0;

	alu_shf[a2, a2, AND~, b6, <<16]
.61 FC04400000 common_code
	.%operands 0 0 0 -- -- -- -- -- -- -- --
	.%line 226 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
/******/  }

	local_csr_rd[active_ctx_sts]
.62 F000000300 common_code
	.%operands 0 0 0 -- -- -- -- b0 B0 -- --
	.%line 226 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 0 0
	immed[b0, 0, <<0]
.63 843000013F common_code
	.%operands 0 0 0 b0 B0 -- -- a0 A0 -- --
	.%line 226 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
	alu_shf[a0, 31, AND, b0, >>3]
.64 B4003C7C00 common_code
	.%operands 0 0 0 a0 A0 -- -- b3 B3 -- --
	.%line 226 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0
	alu[b3, a0, AND, 31]
.65 B440200307 common_code
	.%operands 0 0 0 b0 B0 -- -- b2 B2 -- --
	.%line 226 "G:\IXA_SDK_3.5\modify_c_hw3\spi4_rx.c" 1 0