modify_c.dwp

ixp2400的一个小程序

# Developer Workbench Project File
# Format Version 32.16
#********  Do not edit this file ***********

# Begin Project modify_c
CHIP_FAMILY = 0x2
CHIP_REVISION_NUMBER = 0x10
DEBUG_ONLY = FALSE
PROJECT_PATH = G:\IXA_SDK_3.5\modify_c_hw3\
MIN_REVISION_NUM = 16
MAX_REVISION_NUM = -1
COMPILER_INCLUDE = .\
COMPILER_INCLUDE = .\dispatch_loop\
COMPILER_INCLUDE = ..\MicroengineC\include\
COMPILER_INCLUDE = ..\MicroengineC\src\
COMPILER_INCLUDE = ..\src\library\microblocks_library\microc\
COMPILER_INCLUDE = ..\src\library\dataplane_library\microC\

# Begin Group Source Files

# Begin Compiler Source File
PATH = .\count.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\count.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\count_dl.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\dispatch_loop.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\src\library\microblocks_library\microc\dl_buf.c
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\src\library\microblocks_library\microc\dl_buf.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\src\library\microblocks_library\microc\dl_meta.c
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\src\library\microblocks_library\microc\dl_meta.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\dl_source.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\dl_source.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\dl_system.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\MicroengineC\include\errcode.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\ethernet.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\ethernet.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\ethernet_internal.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\MicroengineC\src\intrinsic.c
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\MicroengineC\include\ixp.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\src\library\dataplane_library\microC\ixp_buf.c
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\src\library\dataplane_library\microC\ixp_lib.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\MicroengineC\include\ixptypes.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\MicroengineC\include\mutexlv.h
# End Compiler Source File

# Begin Compiler Source File
PATH = ..\MicroengineC\src\rtl.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\rx.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\scratch_rings.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\scratch_rings.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\spi4_rx.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\spi4_rx.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\spi4_rx_dl.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\spi4_tx.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\spi4_tx.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\spi4_tx_dl.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\dispatch_loop\system_init.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\tos.c
# End Compiler Source File

# Begin Compiler Source File
PATH = .\tos.h
# End Compiler Source File

# Begin Compiler Source File
PATH = .\tx.h
# End Compiler Source File
# End Group Source Files

# Begin Group Script Files

# Begin Script File
PATH = .\rx_start.ind
# End Script File
# End Group Script Files

# Begin Debug Startup Options
DO_MODEL_INIT = TRUE
SCRIPT_FILE = rx_start.ind
# End Debug Startup Options

# Begin Chip mychip2004

# Begin Chip Configuration Info

# Begin Clock Frequencies
USE_STANDARD_FREQ = TRUE
STANDARD_FREQ_INDEX = 1
CUSTOM_CLK_FREQ = 1200
SRAM0_DIVISOR = 0
SRAM1_DIVISOR = 0
DRAM_DIVISOR = 0
PCI_BUS_CLK_FREQ = 66
MSF_CCR = 0x00ff0000
# End Clock Frequencies

# Begin Memory Configuration Info
DRAM_SIZE = 64
SRAM_CHANNEL0_PART_COUNT = 1
SRAM_CHANNEL0_PART_SIZE = 64
SRAM_CHANNEL1_PART_COUNT = 1
SRAM_CHANNEL1_PART_SIZE = 64
# End Memory Configuration Info
# End Chip Configuration Info

# Begin MicroEngine 0
# End MicroEngine

# Begin MicroEngine 1
# End MicroEngine

# Begin MicroEngine 2
# End MicroEngine

# Begin MicroEngine 3
# End MicroEngine

# Begin MicroEngine 4
# End MicroEngine

# Begin MicroEngine 5
# End MicroEngine

# Begin MicroEngine 6
# End MicroEngine

# Begin MicroEngine 7
# End MicroEngine
# End Chip

# Begin Compiler Settings
COMPILE_REQUIRED = FALSE
OUTPUT = .\count_us.list
OBJ_TARGET = FALSE
C_SOURCE_FILE = .\count.c
C_SOURCE_FILE = .\dispatch_loop\count_dl.c
C_SOURCE_FILE = .\dispatch_loop\dl_source.c
C_SOURCE_FILE = .\ethernet.c
C_SOURCE_FILE = ..\MicroengineC\src\intrinsic.c
C_SOURCE_FILE = ..\MicroengineC\src\rtl.c
C_SOURCE_FILE = .\scratch_rings.c
C_SOURCE_FILE = .\tos.c
OPTIMIZE = 2
INLINING = 1
ENDIAN_MODE = 1
DEBUG_INFO = TRUE
ASM_CODE_FILE = FALSE
WARNING_LEVEL = 3
NUMBER_OF_CONTEXTS = 8
CONTEXT_MODE = 8
NEIGHBOR_MODE = 0
LOCAL_MEMORY_START = 0
SPILL_CONTROL = 1
MIXED_MODE = FALSE
DEFINE = MICRO_C
DEFINE = __UENGINE_ID=1
DEFINE = RING_CONSUMER_ME=0x2
DEFINE = RING_CONSUMER_CTX=0
DEFINE = PROCESSING_DL
DEFINE = ETHERNET_DATA=0x6000
DEFINE = IP_FIVE_TUPLE_DATA=0x7000
ADDITIONAL_OPTIONS = -Qperfinfo=1
# End Compiler Settings

# Begin Compiler Settings
COMPILE_REQUIRED = FALSE
OUTPUT = .\spi4_rx_dl_uc.list
OBJ_TARGET = FALSE
C_SOURCE_FILE = .\dispatch_loop\dl_source.c
C_SOURCE_FILE = ..\MicroengineC\src\intrinsic.c
C_SOURCE_FILE = .\scratch_rings.c
C_SOURCE_FILE = .\spi4_rx.c
C_SOURCE_FILE = .\dispatch_loop\spi4_rx_dl.c
OPTIMIZE = 2
INLINING = 1
ENDIAN_MODE = 1
DEBUG_INFO = TRUE
ASM_CODE_FILE = FALSE
WARNING_LEVEL = 3
NUMBER_OF_CONTEXTS = 8
CONTEXT_MODE = 8
NEIGHBOR_MODE = 0
LOCAL_MEMORY_START = 0
SPILL_CONTROL = 1
MIXED_MODE = FALSE
DEFINE = UENGINE_ID=0
DEFINE = MICRO_C
DEFINE = RX_DL
DEFINE = RING_CONSUMER_CTX=0
DEFINE = RING_CONSUMER_ME=0x1
ADDITIONAL_OPTIONS = -Qperfinfo=0x1
# End Compiler Settings

# Begin Compiler Settings
COMPILE_REQUIRED = FALSE
OUTPUT = .\spi4_tx_dl_uc.list
OBJ_TARGET = FALSE
C_SOURCE_FILE = .\dispatch_loop\dl_source.c
C_SOURCE_FILE = ..\MicroengineC\src\intrinsic.c
C_SOURCE_FILE = .\scratch_rings.c
C_SOURCE_FILE = .\spi4_tx.c
C_SOURCE_FILE = .\dispatch_loop\spi4_tx_dl.c
OPTIMIZE = 2
INLINING = 1
ENDIAN_MODE = 1
DEBUG_INFO = TRUE
ASM_CODE_FILE = FALSE
WARNING_LEVEL = 3
NUMBER_OF_CONTEXTS = 8
CONTEXT_MODE = 8
NEIGHBOR_MODE = 0
LOCAL_MEMORY_START = 0
SPILL_CONTROL = 1
MIXED_MODE = FALSE
DEFINE = MICRO_C
DEFINE = __UENGINE_ID=0x17
DEFINE = TX_DL
ADDITIONAL_OPTIONS = -Qperfinfo=1
# End Compiler Settings

# Begin Linker Settings
LINK_REQUIRED = FALSE
CHIP_NAME = mychip2004
OUTPUT = .\mychip2004
DEBUG_INFO = TRUE
GEN_HEX_C_FILE = FALSE
SCRATCH_BASE_ADDR = 0x00000004
SCRATCH_SIZE = 0x00003ffc
SDRAM_BASE_ADDR = 0x00000010
SDRAM_SIZE = 0x7ffffff0
SRAM_BANK0_BASE_ADDR = 0x00000004
SRAM_BANK0_SIZE = 0x03fffffc
SRAM_BANK1_BASE_ADDR = 0x00000004
SRAM_BANK1_SIZE = 0x03fffffc
SRAM_BANK2_BASE_ADDR = 0x00000000
SRAM_BANK2_SIZE = 0x04000000
SRAM_BANK3_BASE_ADDR = 0x00000000
SRAM_BANK3_SIZE = 0x04000000
GEN_SEG_H_FILE = FALSE
GEN_MEM_MAP_FILE = FALSE
MAP_FILE = .\modify_c_mychip2004
# Begin Linker Map
MICROENGINE_NUMBER = 0
MICROENGINE_LIST_FILE = .\spi4_rx_dl_uc.list
# End Linker Map
# Begin Linker Map
MICROENGINE_NUMBER = 1
MICROENGINE_LIST_FILE = .\count_us.list
# End Linker Map
# Begin Linker Map
MICROENGINE_NUMBER = 2
MICROENGINE_LIST_FILE = .\spi4_tx_dl_uc.list
# End Linker Map
# End Linker Settings
# End Project