intrinsic.dbg

ixp2400的一个小程序

.%scope end
.%scope function sram_csr_read_D_ind _sram_csr_read_D_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 4979 5018
.%arg data 21 data_1077_V$8f8
.%arg address 3 address_1077_V$8f9
.%arg ind 13 ind_1077_V$8fa
.%arg sync 4 sync_1077_V$905
.%arg sig_ptr 5 sig_ptr_1077_V$906
.%scope end
.%scope function sram_csr_write _sram_csr_write "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5023 5052
.%arg data 16 data_1081_V$907
.%arg address 3 address_1081_V$908
.%arg sync 4 sync_1081_V$909
.%arg sig_ptr 5 sig_ptr_1081_V$90a
.%scope end
.%scope function sram_csr_write_D _sram_csr_write_D "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5055 5086
.%arg data 17 data_1085_V$90b
.%arg address 3 address_1085_V$90c
.%arg sync 4 sync_1085_V$90d
.%arg sig_ptr 5 sig_ptr_1085_V$90e
.%scope end
.%scope function sram_csr_write_ind _sram_csr_write_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5091 5129
.%arg data 16 data_1089_V$90f
.%arg address 3 address_1089_V$910
.%arg ind 13 ind_1089_V$911
.%arg sync 4 sync_1089_V$91c
.%arg sig_ptr 5 sig_ptr_1089_V$91d
.%scope end
.%scope function sram_csr_write_D_ind _sram_csr_write_D_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5132 5172
.%arg data 17 data_1093_V$91e
.%arg address 3 address_1093_V$91f
.%arg ind 13 ind_1093_V$920
.%arg sync 4 sync_1093_V$92b
.%arg sig_ptr 5 sig_ptr_1093_V$92c
.%scope end
.%scope function sram_read_qdesc_head _sram_read_qdesc_head "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5177 5240
.%arg data 0 data_1097_V$92d
.%arg address 22 address_1097_V$92e
.%arg count 3 count_1097_V$92f
.%arg sync 4 sync_1097_V$930
.%arg sig_ptr 5 sig_ptr_1097_V$931
.%scope block 5216 5236
.%var ind 7 ind_1105 LIX
.%scope end
.%scope end
.%scope function sram_read_qdesc_head_D _sram_read_qdesc_head_D "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5243 5307
.%arg data 10 data_1108_V$942
.%arg address 22 address_1108_V$943
.%arg count 3 count_1108_V$944
.%arg sync 4 sync_1108_V$945
.%arg sig_ptr 5 sig_ptr_1108_V$946
.%scope block 5283 5303
.%var ind 7 ind_1116 LIX
.%scope end
.%scope end
.%scope function sram_read_qdesc_head_ind _sram_read_qdesc_head_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5312 5349
.%arg data 0 data_1119_V$956
.%arg address 22 address_1119_V$957
.%arg max_nn 3 max_nn_1119_V$958
.%arg ind 7 ind_1119_V$959
.%arg sync 4 sync_1119_V$966
.%arg sig_ptr 5 sig_ptr_1119_V$967
.%scope end
.%scope function sram_read_qdesc_head_D_ind _sram_read_qdesc_head_D_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5352 5390
.%arg data 10 data_1123_V$968
.%arg address 22 address_1123_V$969
.%arg max_nn 3 max_nn_1123_V$96a
.%arg ind 7 ind_1123_V$96b
.%arg sync 4 sync_1123_V$978
.%arg sig_ptr 5 sig_ptr_1123_V$979
.%scope end
.%scope function sram_read_qdesc_tail _sram_read_qdesc_tail "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5395 5458
.%arg data 0 data_1127_V$97a
.%arg address 22 address_1127_V$97b
.%arg count 3 count_1127_V$97c
.%arg sync 4 sync_1127_V$97d
.%arg sig_ptr 5 sig_ptr_1127_V$97e
.%scope block 5434 5454
.%var ind 7 ind_1135 LIX
.%scope end
.%scope end
.%scope function sram_read_qdesc_tail_D _sram_read_qdesc_tail_D "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5461 5525
.%arg data 10 data_1138_V$98d
.%arg address 22 address_1138_V$98e
.%arg count 3 count_1138_V$98f
.%arg sync 4 sync_1138_V$990
.%arg sig_ptr 5 sig_ptr_1138_V$991
.%scope block 5501 5521
.%var ind 7 ind_1146 LIX
.%scope end
.%scope end
.%scope function sram_read_qdesc_tail_ind _sram_read_qdesc_tail_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5530 5567
.%arg data 0 data_1149_V$9a0
.%arg address 22 address_1149_V$9a1
.%arg max_nn 3 max_nn_1149_V$9a2
.%arg ind 7 ind_1149_V$9a3
.%arg sync 4 sync_1149_V$9b0
.%arg sig_ptr 5 sig_ptr_1149_V$9b1
.%scope end
.%scope function sram_read_qdesc_tail_D_ind _sram_read_qdesc_tail_D_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5570 5608
.%arg data 10 data_1153_V$9b2
.%arg address 22 address_1153_V$9b3
.%arg max_nn 3 max_nn_1153_V$9b4
.%arg ind 7 ind_1153_V$9b5
.%arg sync 4 sync_1153_V$9c2
.%arg sig_ptr 5 sig_ptr_1153_V$9c3
.%scope end
.%scope function sram_read_qdesc_other _sram_read_qdesc_other "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5613 5622
.%arg address 22 address_1157_V$9c4
.%scope end
.%scope function sram_read_qdesc_other_ind _sram_read_qdesc_other_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5627 5641
.%arg address 22 address_1159_V$9c5
.%arg ind 7 ind_1159_V$9c6
.%scope end
.%scope function sram_write_qdesc _sram_write_qdesc "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5646 5654
.%arg address 22 address_1161_V$9d3
.%scope end
.%scope function sram_write_qdesc_count _sram_write_qdesc_count "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5662 5670
.%arg address 22 address_1163_V$9d4
.%scope end
.%scope function sram_enqueue _sram_enqueue "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5677 5685
.%arg address 22 address_1165_V$9d5
.%scope end
.%scope function sram_enqueue_ind _sram_enqueue_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5690 5703
.%arg address 22 address_1167_V$9d6
.%arg ind 32 ind_1167_V$9d7
.%scope end
.%scope function sram_enqueue_tail _sram_enqueue_tail "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5708 5716
.%arg address 22 address_1169_V$9e1
.%scope end
.%scope function sram_enqueue_tail_ind _sram_enqueue_tail_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5721 5734
.%arg address 22 address_1171_V$9e2
.%arg ind 32 ind_1171_V$9e3
.%scope end
.%scope function sram_dequeue _sram_dequeue "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5739 5764
.%arg data 0 data_1173_V$9ed
.%arg address 22 address_1173_V$9ee
.%arg sync 4 sync_1173_V$9ef
.%arg sig_ptr 5 sig_ptr_1173_V$9f0
.%scope end
.%scope function sram_dequeue_D _sram_dequeue_D "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5767 5793
.%arg data 10 data_1177_V$9f1
.%arg address 22 address_1177_V$9f2
.%arg sync 4 sync_1177_V$9f3
.%arg sig_ptr 5 sig_ptr_1177_V$9f4
.%scope end
.%scope function sram_dequeue_ind _sram_dequeue_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5798 5832
.%arg data 0 data_1181_V$9f5
.%arg address 22 address_1181_V$9f6
.%arg ind 35 ind_1181_V$9f7
.%arg sync 4 sync_1181_V$a00
.%arg sig_ptr 5 sig_ptr_1181_V$a01
.%scope end
.%scope function sram_dequeue_D_ind _sram_dequeue_D_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5835 5870
.%arg data 10 data_1185_V$a02
.%arg address 22 address_1185_V$a03
.%arg ind 35 ind_1185_V$a04
.%arg sync 4 sync_1185_V$a0d
.%arg sig_ptr 5 sig_ptr_1185_V$a0e
.%scope end
.%scope function sram_journal _sram_journal "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5875 5937
.%arg data 11 data_1189_V$a0f
.%arg address 22 address_1189_V$a10
.%arg count 3 count_1189_V$a11
.%arg sync 4 sync_1189_V$a12
.%arg sig_ptr 5 sig_ptr_1189_V$a13
.%scope block 5913 5933
.%var ind 7 ind_1197 LIX
.%scope end
.%scope end
.%scope function sram_journal_D _sram_journal_D "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 5940 6004
.%arg data 12 data_1200_V$a22
.%arg address 22 address_1200_V$a23
.%arg count 3 count_1200_V$a24
.%arg sync 4 sync_1200_V$a25
.%arg sig_ptr 5 sig_ptr_1200_V$a26
.%scope block 5980 6000
.%var ind 7 ind_1208 LIX
.%scope end
.%scope end
.%scope function sram_journal_ind _sram_journal_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6009 6046
.%arg data 11 data_1211_V$a35
.%arg address 22 address_1211_V$a36
.%arg max_nn 3 max_nn_1211_V$a37
.%arg ind 7 ind_1211_V$a38
.%arg sync 4 sync_1211_V$a45
.%arg sig_ptr 5 sig_ptr_1211_V$a46
.%scope end
.%scope function sram_journal_D_ind _sram_journal_D_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6049 6088
.%arg data 12 data_1215_V$a47
.%arg address 22 address_1215_V$a48
.%arg max_nn 3 max_nn_1215_V$a49
.%arg ind 7 ind_1215_V$a4a
.%arg sync 4 sync_1215_V$a57
.%arg sig_ptr 5 sig_ptr_1215_V$a58
.%scope end
.%scope function sram_fast_journal _sram_fast_journal "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6093 6102
.%arg address 22 address_1219_V$a59
.%scope end
.%scope function sram_fast_journal_ind _sram_fast_journal_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6107 6121
.%arg address 22 address_1221_V$a5a
.%arg ind 7 ind_1221_V$a5b
.%scope end
.%scope function dram_read _dram_read "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6126 6170
.%arg data 10 data_1223_V$a68
.%arg address 38 address_1223_V$a69
.%arg count 3 count_1223_V$a6a
.%arg sync 4 sync_1223_V$a6b
.%arg sig_pair_ptr 19 sig_pair_ptr_1223_V$a6c
.%scope block 6157 6166
.%var ind 39 ind_1229 LIX
.%scope end
.%scope end
.%scope function dram_read_S _dram_read_S "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6173 6218
.%arg data 0 data_1230_V$a7c
.%arg address 38 address_1230_V$a7d
.%arg count 3 count_1230_V$a7e
.%arg sync 4 sync_1230_V$a7f
.%arg sig_pair_ptr 19 sig_pair_ptr_1230_V$a80
.%scope block 6205 6214
.%var ind 39 ind_1236 LIX
.%scope end
.%scope end
.%scope function dram_read_ind _dram_read_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6223 6249
.%arg data 10 data_1237_V$a90
.%arg address 38 address_1237_V$a91
.%arg max_nn 3 max_nn_1237_V$a92
.%arg ind 39 ind_1237_V$a93
.%arg sync 4 sync_1237_V$aa1
.%arg sig_pair_ptr 19 sig_pair_ptr_1237_V$aa2
.%scope end
.%scope function dram_read_S_ind _dram_read_S_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6252 6279
.%arg data 0 data_1239_V$aa3
.%arg address 38 address_1239_V$aa4
.%arg max_nn 3 max_nn_1239_V$aa5
.%arg ind 39 ind_1239_V$aa6
.%arg sync 4 sync_1239_V$ab4
.%arg sig_pair_ptr 19 sig_pair_ptr_1239_V$ab5
.%scope end
.%scope function dram_write _dram_write "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6284 6328
.%arg data 12 data_1241_V$ab6
.%arg address 38 address_1241_V$ab7
.%arg count 3 count_1241_V$ab8
.%arg sync 4 sync_1241_V$ab9
.%arg sig_pair_ptr 19 sig_pair_ptr_1241_V$aba
.%scope block 6315 6324
.%var ind 39 ind_1247 LIX
.%scope end
.%scope end
.%scope function dram_write_S _dram_write_S "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6331 6377
.%arg data 11 data_1248_V$aca
.%arg address 38 address_1248_V$acb
.%arg count 3 count_1248_V$acc
.%arg sync 4 sync_1248_V$acd
.%arg sig_pair_ptr 19 sig_pair_ptr_1248_V$ace
.%scope block 6364 6373
.%var ind 39 ind_1254 LIX
.%scope end
.%scope end
.%scope function dram_write_ind _dram_write_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6382 6408
.%arg data 12 data_1255_V$ade
.%arg address 38 address_1255_V$adf
.%arg max_nn 3 max_nn_1255_V$ae0
.%arg ind 39 ind_1255_V$ae1
.%arg sync 4 sync_1255_V$aef
.%arg sig_pair_ptr 19 sig_pair_ptr_1255_V$af0
.%scope end
.%scope function dram_write_S_ind _dram_write_S_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6411 6439
.%arg data 11 data_1257_V$af1
.%arg address 38 address_1257_V$af2
.%arg max_nn 3 max_nn_1257_V$af3
.%arg ind 39 ind_1257_V$af4
.%arg sync 4 sync_1257_V$b02
.%arg sig_pair_ptr 19 sig_pair_ptr_1257_V$b03
.%scope end
.%scope function dram_write_push _dram_write_push "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6444 6489
.%arg data 12 data_1259_V$b04
.%arg address 38 address_1259_V$b05
.%arg count 3 count_1259_V$b06
.%arg sync 4 sync_1259_V$b07
.%arg sig_pair_ptr 19 sig_pair_ptr_1259_V$b08
.%scope block 6476 6485
.%var ind 39 ind_1265 LIX
.%scope end
.%scope end
.%scope function dram_write_push_ind _dram_write_push_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6496 6523
.%arg data 12 data_1266_V$b19
.%arg address 38 address_1266_V$b1a
.%arg max_nn 3 max_nn_1266_V$b1b
.%arg ind 39 ind_1266_V$b1c
.%arg sync 4 sync_1266_V$b2a
.%arg sig_pair_ptr 19 sig_pair_ptr_1266_V$b2b
.%scope end
.%scope function dram_rbuf_read_ind _dram_rbuf_read_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6532 6554
.%arg address 38 address_1268_V$b2c
.%arg max_nn 3 max_nn_1268_V$b2d
.%arg ind 42 ind_1268_V$b2e
.%arg sync 4 sync_1268_V$b3b
.%arg sig_pair_ptr 19 sig_pair_ptr_1268_V$b3c
.%scope end
.%scope function dram_rbuf_read_push_ind _dram_rbuf_read_push_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6559 6582
.%arg address 38 address_1270_V$b3d
.%arg max_nn 3 max_nn_1270_V$b3e
.%arg ind 42 ind_1270_V$b3f
.%arg sync 4 sync_1270_V$b4c
.%arg sig_pair_ptr 19 sig_pair_ptr_1270_V$b4d
.%scope end
.%scope function dram_tbuf_write_ind _dram_tbuf_write_ind "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6589 6611
.%arg address 38 address_1272_V$b4e
.%arg max_nn 3 max_nn_1272_V$b4f
.%arg ind 42 ind_1272_V$b50
.%arg sync 4 sync_1272_V$b5d
.%arg sig_pair_ptr 19 sig_pair_ptr_1272_V$b5e
.%scope end
.%scope function cap_read _cap_read "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6616 6741
.%arg data 0 data_1274_V$b5f
.%arg address 3 address_1274_V$b60
.%arg count 3 count_1274_V$b61
.%arg reflect_sig 45 reflect_sig_1274_V$b62
.%arg sync 4 sync_1274_V$b63
.%arg sig_ptr 5 sig_ptr_1274_V$b64
.%scope block 6679 6737
.%var ind 7 ind_1284 LIX
.%scope end
.%scope end
.%scope function cap_read_D _cap_read_D "G:\IXA_SDK_3.5\MicroengineC\src\intrinsic.c" 6744 6870
.%arg data 10 data_1289_V$b77
.%arg address 3 address_1289_V$b78
.%arg count 3 count_1289_V$b79
.%arg reflect_sig 45 reflect_sig_1289_V$b7a
.%arg sync 4 sync_1289_V$b7b
.%arg sig_ptr 5 sig_ptr_1289_V$b7c
.%scope block 6808 6866