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📄 pcan_main.h

📁 linux下的CAN BUS驱动代码。适合在arm平台使用。
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#ifndef __PCAN_MAIN_H__#define __PCAN_MAIN_H__//****************************************************************************// Copyright (C) 2001-2007  PEAK System-Technik GmbH//// linux@peak-system.com// www.peak-system.com//// This program is free software; you can redistribute it and/or modify// it under the terms of the GNU General Public License as published by// the Free Software Foundation; either version 2 of the License, or// (at your option) any later version.//// This program is distributed in the hope that it will be useful,// but WITHOUT ANY WARRANTY; without even the implied warranty of// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the// GNU General Public License for more details.//// You should have received a copy of the GNU General Public License// along with this program; if not, write to the Free Software// Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.//// Maintainer(s): Klaus Hitschler (klaus.hitschler@gmx.de)//// Major contributions by://                Edouard Tisserant (edouard.tisserant@lolitech.fr) XENOMAI//                Laurent Bessard   (laurent.bessard@lolitech.fr)   XENOMAI//                Oliver Hartkopp   (oliver.hartkopp@volkswagen.de) socketCAN//                     // Contributions: Marcel Offermans (marcel.offermans@luminis.nl)//                Philipp Baer (philipp.baer@informatik.uni-ulm.de)//                Marc Sowen (Marc.Sowen@ibeo-as.com)//****************************************************************************//****************************************************************************//// pcan_main.h - global defines to include in all files this module is made of//// $Id: pcan_main.h 535 2008-02-11 20:36:03Z ohartkopp $////****************************************************************************//----------------------------------------------------------------------------// INCLUDES#include <src/pcan_common.h>#include <linux/types.h>#include <linux/list.h>#include <linux/wait.h>#include <linux/interrupt.h>#include <linux/time.h>#ifdef LINUX_26#include <linux/device.h>#endif#ifdef PCI_SUPPORT#include <linux/pci.h>#endif#include <linux/spinlock.h>#include <asm/atomic.h>#ifdef PARPORT_SUBSYSTEM#include <linux/parport.h>#endif#ifdef PCCARD_SUPPORT#include <pcmcia/cs_types.h>#include <pcmcia/cs.h>#include <pcmcia/cistpl.h>#include <pcmcia/ds.h>#endif#ifdef USB_SUPPORT#include <linux/usb.h>#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,19)typedef struct urb urb_t, *purb_t;#endif#endif#ifndef NO_RT#include <rtdm/rtdm_driver.h>struct pcanctx_rt;#endif/* PF_CAN is part of the Linux Mainline Kernel since v2.6.25 *//* For older Kernels the PCAN driver includes the needed *//* defines from private files src/can.h and src/error.h  */#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)#include <linux/can.h>#include <linux/can/error.h>#include <linux/if_arp.h>#include <linux/if_ether.h>#else /* before 2.6.25 pcan netdev contains private includes */#include <src/can.h>#include <src/error.h>#define ARPHRD_CAN	280	/* to be moved to include/linux/if_arp.h */#define ETH_P_CAN	0x000C	/* to be moved to include/linux/if_ether.h */#endif/* fix overlap in namespace between socketcan can/error.h and pcan.h */#define CAN_ERR_BUSOFF_NETDEV CAN_ERR_BUSOFF#undef CAN_ERR_BUSOFF#include <pcan.h>//----------------------------------------------------------------------------// DEFINES#define CHANNEL_SINGLE 0                                   // this is a single channel device#define CHANNEL_MASTER 1                                   // multi channel device, this device is master#define CHANNEL_SLAVE  2                                   // multi channel device, this is slave#define READBUFFER_SIZE      80                            // buffers used in read and write call#define WRITEBUFFER_SIZE     80#define PCAN_MAJOR            0                            // use dynamic major allocation, else use 91#define READ_MESSAGE_COUNT  500                            // max read message count#define WRITE_MESSAGE_COUNT  50                            // max write message count// parameter wBTR0BTR1// bitrate codes of BTR0/BTR1 registers#define CAN_BAUD_1M     0x0014                             //   1 MBit/s#define CAN_BAUD_500K   0x001C                             // 500 kBit/s#define CAN_BAUD_250K   0x011C                             // 250 kBit/s#define CAN_BAUD_125K   0x031C                             // 125 kBit/s#define CAN_BAUD_100K   0x432F                             // 100 kBit/s#define CAN_BAUD_50K    0x472F                             //  50 kBit/s#define CAN_BAUD_20K    0x532F                             //  20 kBit/s#define CAN_BAUD_10K    0x672F                             //  10 kBit/s#define CAN_BAUD_5K     0x7F7F                             //   5 kBit/s// maximum allocated number of endpoints (w.o. control endpoints) of pcan-usb#define PCAN_USB_MAX_ENDPOINTS 4// Activity states#define ACTIVITY_NONE        0          // LED off           - set when the channel is created or deleted#define ACTIVITY_INITIALIZED 1          // LED on            - set when the channel is initialized#define ACTIVITY_IDLE        2          // LED slow blinking - set when the channel is ready to receive or transmit#define ACTIVITY_XMIT        3          // LED fast blinking - set when the channel has received or transmitted#define CAN_ERROR_ACTIVE     0          // CAN-Bus error states for busStatus - initial and normal state#define CAN_ERROR_PASSIVE    1          // receive only state#define CAN_BUS_OFF          2          // switched off from Bustypedef struct chn_props                                   // this structure holds various channel properties {  u8 ucExternalClock : 1;                                  // this device is supplied with a external clock  u8 ucMasterDevice  : 2;                                  // this channel is a clock master, slave, single } CHN_PROPS;// a helper for fast conversion between 'SJA1000' data ordering and host data ordertypedef union{  u8  uc[4];  u32 ul;} ULCONV;typedef union{  u8  uc[2];  u16 uw;} UWCONV;typedef struct{  u16        wStepSize;                                    // size of bytes to step to next entry  u16        wCopySize;                                    // size of bytes to copy  void       *bufferBegin;                                 // points to first element  void       *bufferEnd;                                   // points to the last element  u32        nCount;                                       // max count of elements in fifo  u32        nStored;                                      // count of currently received and stored messages  u32        dwTotal;                                      // received messages  void       *r;                                           // points to the next Msg to read into the read buffer  void       *w;                                           // points to the next Msg to write into read buffer  spinlock_t lock;                                         // mutual exclusion lock} FIFO_MANAGER;typedef struct{  u32  dwPort;                                             // the port of the transport layer  u32  dwConfigPort;                                       // the confiuration port, PCI only  void *pvVirtPort;                                        // virtual address of port  void *pvVirtConfigPort;                                  // only PCI, the virtual address of the config port  u16  wIrq;                                               // the associated irq level  int  nChannel;                                           // associated channel of the card - channel #0 is special} PCI_PORT;typedef struct{  u32  dwPort;                                             // the port of the transport layer  u16  wIrq;                                               // the associated irq   #ifdef PARPORT_SUBSYSTEM  struct pardevice *pardev;                                // points to the associated parallel port (PARPORT subsytem)  #endif  u16  wEcr;                                               // ECR register in case of EPP  u8   ucOldDataContent;                                   // the overwritten contents of the port registers  u8   ucOldControlContent;  u8   ucOldECRContent;  spinlock_t lock;                                         // a helper to manage interfering access to chip registers} DONGLE_PORT;#ifdef NO_RTtypedef struct{  struct list_head item;                                   // link anchor for a item with the same irq level  struct pcandev   *dev;                                   // points to the device to be handled with the same irq level} SAME_IRQ_ITEM;            typedef struct {  struct list_head same_irq_items;                         // base of list of SAME_IRQ_ITEM's  u16  same_irq_count;                                     // count of devices with the same irq level to handle  u16  same_irq_active;                                     // count of armed (active) irqs} SAME_IRQ_LIST;#endiftypedef struct{  u32  dwPort;                                             // the port of the transport layer  u16  wIrq;                                               // the associated irq level#ifdef NO_RT  SAME_IRQ_ITEM same;                                      // each ISA_PORT should belong to one SAME_IRQ_LIST  SAME_IRQ_LIST anchor;                                    // the anchor for one irq level (not used with every ISA_PORT)  SAME_IRQ_LIST *my_anchor;                                // points to the list of items for the same irq (SAME_IRQ_LIST)#endif  } ISA_PORT;#ifdef PCCARD_SUPPORT

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