📄 bsp.txt
字号:
;;;503 IO1CLR = are_on;
;;;504 IO1SET = are_off;
;;;505
;;;506 case 1:
;;;507 if ((IO1PIN & GPIO1_LED1) == 0) {
;;;508 IO1CLR = GPIO1_LED1;
;;;509 } else {
;;;510 IO1SET = GPIO1_LED1;
;;;511 }
;;;512 break;
;;;513
;;;514 case 2:
;;;515 if ((IO1PIN & GPIO1_LED2) == 0) {
;;;516 IO1CLR = GPIO1_LED2;
;;;517 } else {
;;;518 IO1SET = GPIO1_LED2;
;;;519 }
;;;520 break;
;;;521
;;;522 case 3:
;;;523 if ((IO1PIN & GPIO1_LED3) == 0) {
;;;524 IO1CLR = GPIO1_LED3;
;;;525 } else {
;;;526 IO1SET = GPIO1_LED3;
;;;527 }
;;;528 break;
;;;529
;;;530 case 4:
;;;531 if ((IO1PIN & GPIO1_LED4) == 0) {
;;;532 IO1CLR = GPIO1_LED4;
;;;533 } else {
;;;534 IO1SET = GPIO1_LED4;
;;;535 }
;;;536 break;
;;;537
;;;538 case 5:
;;;539 if ((IO1PIN & GPIO1_LED5) == 0) {
;;;540 IO1CLR = GPIO1_LED5;
;;;541 } else {
;;;542 IO1SET = GPIO1_LED5;
;;;543 }
;;;544 break;
;;;545
;;;546 case 6:
;;;547 if ((IO1PIN & GPIO1_LED6) == 0) {
;;;548 IO1CLR = GPIO1_LED6;
;;;549 } else {
;;;550 IO1SET = GPIO1_LED6;
;;;551 }
;;;552 break;
;;;553
;;;554 case 7:
;;;555 if ((IO1PIN & GPIO1_LED7) == 0) {
;;;556 IO1CLR = GPIO1_LED7;
;;;557 } else {
;;;558 IO1SET = GPIO1_LED7;
;;;559 }
;;;560 break;
;;;561
;;;562 case 8:
;;;563 if ((IO1PIN & GPIO1_LED8) == 0) {
;;;564 IO1CLR = GPIO1_LED8;
;;;565 } else {
;;;566 IO1SET = GPIO1_LED8;
;;;567 }
;;;568 break;
;;;569 }
;;;570 }
0003b4 e12fff1e BX lr
0003b8 ea000007 B |L1.988|
0003bc ea00000e B |L1.1020|
0003c0 ea000015 B |L1.1052|
0003c4 ea000018 B |L1.1068|
0003c8 ea00001b B |L1.1084|
0003cc ea00001e B |L1.1100|
0003d0 ea000021 B |L1.1116|
0003d4 ea000024 B |L1.1132|
0003d8 ea000027 B |L1.1148|
|L1.988|
0003dc e5910010 LDR r0,[r1,#0x10] ;501
0003e0 e5913010 LDR r3,[r1,#0x10] ;502
0003e4 e3a028ff MOV r2,#0xff0000 ;501
0003e8 e1c20000 BIC r0,r2,r0 ;501
0003ec e22338ff EOR r3,r3,#0xff0000 ;502
0003f0 e1c22003 BIC r2,r2,r3 ;502
0003f4 e581201c STR r2,[r1,#0x1c] ;503
0003f8 e5810014 STR r0,[r1,#0x14] ;504
|L1.1020|
0003fc e5910010 LDR r0,[r1,#0x10] ;507
000400 e2002801 AND r2,r0,#0x10000 ;507
000404 e3a00801 MOV r0,#0x10000 ;507
000408 ea00001e B |L1.1160|
|L1.1036|
00040c e581001c STR r0,[r1,#0x1c] ;508
000410 e12fff1e BX lr
|L1.1044|
000414 e5810014 STR r0,[r1,#0x14] ;510
000418 e12fff1e BX lr
|L1.1052|
00041c e5910010 LDR r0,[r1,#0x10] ;515
000420 e2002802 AND r2,r0,#0x20000 ;515
000424 e3a00802 MOV r0,#0x20000 ;515
000428 ea000016 B |L1.1160|
|L1.1068|
00042c e5910010 LDR r0,[r1,#0x10] ;523
000430 e2002701 AND r2,r0,#0x40000 ;523
000434 e3a00701 MOV r0,#0x40000 ;523
000438 ea000012 B |L1.1160|
|L1.1084|
00043c e5910010 LDR r0,[r1,#0x10] ;531
000440 e2002702 AND r2,r0,#0x80000 ;531
000444 e3a00702 MOV r0,#0x80000 ;531
000448 ea00000e B |L1.1160|
|L1.1100|
00044c e5910010 LDR r0,[r1,#0x10] ;539
000450 e2002601 AND r2,r0,#0x100000 ;539
000454 e3a00601 MOV r0,#0x100000 ;539
000458 ea00000a B |L1.1160|
|L1.1116|
00045c e5910010 LDR r0,[r1,#0x10] ;547
000460 e2002602 AND r2,r0,#0x200000 ;547
000464 e3a00602 MOV r0,#0x200000 ;547
000468 ea000006 B |L1.1160|
|L1.1132|
00046c e5910010 LDR r0,[r1,#0x10] ;555
000470 e2002501 AND r2,r0,#0x400000 ;555
000474 e3a00501 MOV r0,#0x400000 ;555
000478 ea000002 B |L1.1160|
|L1.1148|
00047c e5910010 LDR r0,[r1,#0x10] ;563
000480 e2002502 AND r2,r0,#0x800000 ;563
000484 e3a00502 MOV r0,#0x800000 ;563
|L1.1160|
000488 e3520000 CMP r2,#0 ;563
00048c 1affffe0 BNE |L1.1044|
000490 eaffffdd B |L1.1036|
;;;571
ENDP
PB_GetStatus PROC
;;;588 CPU_BOOLEAN PB_GetStatus (CPU_INT08U pb)
;;;589 {
000494 e1a01000 MOV r1,r0
;;;590 CPU_BOOLEAN status;
;;;591
;;;592
;;;593 status = DEF_FALSE;
;;;594
;;;595 switch (pb) {
000498 e3510001 CMP r1,#1
;;;596 case 1:
;;;597 if ((IO0PIN & GPIO0_INT1) == 0) {
00049c 059f1134 LDREQ r1,|L1.1496|
0004a0 e3a00000 MOV r0,#0 ;593
0004a4 05911000 LDREQ r1,[r1,#0]
0004a8 03110901 TSTEQ r1,#0x4000
;;;598 return (DEF_TRUE);
0004ac 03a00001 MOVEQ r0,#1
;;;599 }
;;;600 break;
;;;601
;;;602 default:
;;;603 break;
;;;604 }
;;;605
;;;606 return (status);
;;;607 }
0004b0 e12fff1e BX lr
;;;608
ENDP
ADC_GetStatus PROC
;;;660 {
;;;661 if (adc == 1) {
0004b4 e3500001 CMP r0,#1
;;;662 return ((ADDR1 >> 6) & 0x03FF);
0004b8 059f0124 LDREQ r0,|L1.1508|
;;;663 } else {
;;;664 return (0);
0004bc 13a00000 MOVNE r0,#0
0004c0 05900014 LDREQ r0,[r0,#0x14] ;662
0004c4 01a00800 LSLEQ r0,r0,#16 ;662
0004c8 01a00b20 LSREQ r0,r0,#22 ;662
;;;665 }
;;;666 }
0004cc e12fff1e BX lr
;;;667
ENDP
VIC_Init PROC
0004d0 e3e01000 MVN r1,#0 ;0
0004d4 e3a00000 MOV r0,#0 ;0
0004d8 e5001fec STR r1,[r0,#-0xfec] ;0
0004dc e5000fe0 STR r0,[r0,#-0xfe0] ;0
0004e0 e24f1fd7 ADR r1,VIC_DummyWDT
0004e4 e5001efc STR r1,[r0,#-0xefc] ;0
0004e8 e24f1fdd ADR r1,VIC_DummyTIMER0
0004ec e5001ef8 STR r1,[r0,#-0xef8] ;0
0004f0 e24f1fe3 ADR r1,VIC_DummyTIMER1
0004f4 e5001ef4 STR r1,[r0,#-0xef4] ;0
0004f8 e24f1fe9 ADR r1,VIC_DummyUART0
0004fc e5001ef0 STR r1,[r0,#-0xef0] ;0
000500 e24f1fef ADR r1,VIC_DummyUART1
000504 e5001eec STR r1,[r0,#-0xeec] ;0
000508 e24f1ff5 ADR r1,VIC_DummyPWM0
00050c e5001ee8 STR r1,[r0,#-0xee8] ;0
000510 e24f1ffb ADR r1,VIC_DummyI2C
000514 e5001ee4 STR r1,[r0,#-0xee4] ;0
000518 e59f10c8 LDR r1,|L1.1512|
00051c e5001ee0 STR r1,[r0,#-0xee0] ;0
000520 e59f10c4 LDR r1,|L1.1516|
000524 e5001edc STR r1,[r0,#-0xedc] ;0
000528 e59f10c0 LDR r1,|L1.1520|
00052c e5001ed8 STR r1,[r0,#-0xed8] ;0
000530 e59f10bc LDR r1,|L1.1524|
000534 e5001ed4 STR r1,[r0,#-0xed4] ;0
000538 e59f10b8 LDR r1,|L1.1528|
00053c e5001ed0 STR r1,[r0,#-0xed0] ;0
000540 e12fff1e BX lr ;0
ENDP
BSP_PLL_Init PROC
000544 e92d4070 PUSH {r4-r6,lr} ;0
000548 e59f407c LDR r4,|L1.1484|
00054c e3a00023 MOV r0,#0x23 ;0
000550 e5c40084 STRB r0,[r4,#0x84] ;0
000554 e5d40080 LDRB r0,[r4,#0x80] ;0
000558 e3800001 ORR r0,r0,#1 ;0
00055c e5c40080 STRB r0,[r4,#0x80] ;0
000560 ebfffffe BL OS_CPU_SR_Save
000564 e3a050aa MOV r5,#0xaa ;0
000568 e5c4508c STRB r5,[r4,#0x8c] ;0
00056c e3a06055 MOV r6,#0x55 ;0
000570 e5c4608c STRB r6,[r4,#0x8c] ;0
000574 ebfffffe BL OS_CPU_SR_Restore
000578 e59f007c LDR r0,|L1.1532|
00057c ea000002 B |L1.1420|
|L1.1408|
000580 e2400001 SUB r0,r0,#1 ;0
000584 e1a00800 LSL r0,r0,#16 ;0
000588 e1a00820 LSR r0,r0,#16 ;0
|L1.1420|
00058c e1d418b8 LDRH r1,[r4,#0x88] ;0
000590 e3110b01 TST r1,#0x400 ;0
000594 1a000001 BNE |L1.1440|
000598 e3500000 CMP r0,#0 ;0
00059c 1afffff7 BNE |L1.1408|
|L1.1440|
0005a0 e5d40080 LDRB r0,[r4,#0x80] ;0
0005a4 e3800002 ORR r0,r0,#2 ;0
0005a8 e5c40080 STRB r0,[r4,#0x80] ;0
0005ac ebfffffe BL OS_CPU_SR_Save
0005b0 e5c4508c STRB r5,[r4,#0x8c] ;0
0005b4 e5c4608c STRB r6,[r4,#0x8c] ;0
0005b8 ebfffffe BL OS_CPU_SR_Restore
0005bc e3a00002 MOV r0,#2 ;0
0005c0 e5c40100 STRB r0,[r4,#0x100] ;0
0005c4 e8bd4070 POP {r4-r6,lr} ;0
0005c8 e12fff1e BX lr ;0
ENDP
|L1.1484|
0005cc e01fc000 DCD 0xe01fc000
|L1.1488|
0005d0 00b71b00 DCD 0x00b71b00
|L1.1492|
0005d4 e0004000 DCD 0xe0004000
|L1.1496|
0005d8 e0028000 DCD 0xe0028000
|L1.1500|
0005dc 00000000 DCD ||.data||
|L1.1504|
0005e0 0044aa20 DCD 0x0044aa20
|L1.1508|
0005e4 e0034000 DCD 0xe0034000
|L1.1512|
0005e8 00000000 DCD VIC_DummySPI
|L1.1516|
0005ec 00000000 DCD VIC_DummyRTC
|L1.1520|
0005f0 00000000 DCD VIC_DummyEINT0
|L1.1524|
0005f4 00000000 DCD VIC_DummyEINT1
|L1.1528|
0005f8 00000000 DCD VIC_DummyEINT2
|L1.1532|
0005fc 00002710 DCD 0x00002710
AREA ||.data||, DATA, ALIGN=2
VIC_SpuriousInt
000000 00000000 DCD 0x00000000
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -