📄 cpu4.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 01/02/2008 13:34:57
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "cpu4"
BEGIN
DEVICE = "EPF10K30ETC144-1";
"clk" : INPUT_PIN = 55 ;
"reset" : INPUT_PIN = 54 ;
"acc0" : OUTPUT_PIN = 12 ;
"acc1" : OUTPUT_PIN = 29 ;
"acc2" : OUTPUT_PIN = 69 ;
"acc3" : OUTPUT_PIN = 67 ;
"acc4" : OUTPUT_PIN = 119 ;
"acc5" : OUTPUT_PIN = 110 ;
"acc6" : OUTPUT_PIN = 62 ;
"acc7" : OUTPUT_PIN = 116 ;
"ck" : OUTPUT_PIN = 109 ;
"cy" : OUTPUT_PIN = 68 ;
"i_reg0" : OUTPUT_PIN = 43 ;
"i_reg1" : OUTPUT_PIN = 136 ;
"i_reg2" : OUTPUT_PIN = 70 ;
"i_reg3" : OUTPUT_PIN = 36 ;
"i_reg4" : OUTPUT_PIN = 83 ;
"i_reg5" : OUTPUT_PIN = 121 ;
"i_reg6" : OUTPUT_PIN = 87 ;
"i_reg7" : OUTPUT_PIN = 78 ;
"o_a0" : OUTPUT_PIN = 135 ;
"o_a1" : OUTPUT_PIN = 137 ;
"o_a2" : OUTPUT_PIN = 80 ;
"o_a3" : OUTPUT_PIN = 143 ;
"o_a4" : OUTPUT_PIN = 91 ;
"o_a5" : OUTPUT_PIN = 99 ;
"o_a6" : OUTPUT_PIN = 65 ;
"o_a7" : OUTPUT_PIN = 118 ;
"pc0" : OUTPUT_PIN = 13 ;
"pc1" : OUTPUT_PIN = 14 ;
"pc2" : OUTPUT_PIN = 114 ;
"pc3" : OUTPUT_PIN = 28 ;
"pc4" : OUTPUT_PIN = 90 ;
"pc5" : OUTPUT_PIN = 22 ;
"pc6" : OUTPUT_PIN = 20 ;
"pc7" : OUTPUT_PIN = 64 ;
"rc" : OUTPUT_PIN = 122 ;
"tp0" : OUTPUT_PIN = 27 ;
"tp1" : OUTPUT_PIN = 44 ;
"tp2" : OUTPUT_PIN = 18 ;
"tp3" : OUTPUT_PIN = 96 ;
"tp4" : OUTPUT_PIN = 89 ;
"tp5" : OUTPUT_PIN = 73 ;
"tp6" : OUTPUT_PIN = 23 ;
"tp7" : OUTPUT_PIN = 117 ;
"t0" : OUTPUT_PIN = 100 ;
"t1" : OUTPUT_PIN = 102 ;
"t2" : OUTPUT_PIN = 101 ;
"wc" : OUTPUT_PIN = 82 ;
"o_d0" : BIDIR_PIN = 11 ;
"o_d1" : BIDIR_PIN = 17 ;
"o_d2" : BIDIR_PIN = 95 ;
"o_d3" : BIDIR_PIN = 97 ;
"o_d4" : BIDIR_PIN = 19 ;
"o_d5" : BIDIR_PIN = 92 ;
"o_d6" : BIDIR_PIN = 21 ;
"o_d7" : BIDIR_PIN = 88 ;
"|lpm_add_sub:492|addcore:adder|pcarry1" : LOCATION = LC8_C29;
"|lpm_add_sub:492|addcore:adder|pcarry2" : LOCATION = LC5_C8 ;
"|lpm_add_sub:492|addcore:adder|pcarry3" : LOCATION = LC2_C8 ;
"|lpm_add_sub:492|addcore:adder|pcarry4" : LOCATION = LC4_D2 ;
"|lpm_add_sub:492|addcore:adder|pcarry5" : LOCATION = LC8_D2 ;
"|lpm_add_sub:492|addcore:adder|pcarry6" : LOCATION = LC3_D8 ;
"|lpm_add_sub:492|addcore:adder|pcarry7" : LOCATION = LC7_D8 ;
"|lpm_add_sub:492|addcore:adder|~115~1" : LOCATION = LC3_C29;
"|lpm_add_sub:492|addcore:adder|:116" : LOCATION = LC3_C6 ;
"|lpm_add_sub:492|addcore:adder|:117" : LOCATION = LC7_C8 ;
"|lpm_add_sub:492|addcore:adder|:118" : LOCATION = LC3_D14;
"|lpm_add_sub:492|addcore:adder|:119" : LOCATION = LC5_D2 ;
"|lpm_add_sub:492|addcore:adder|:120" : LOCATION = LC2_D11;
"|lpm_add_sub:492|addcore:adder|:121" : LOCATION = LC4_D8 ;
"|lpm_add_sub:493|addcore:adder|:129" : LOCATION = LC1_C35;
"|lpm_add_sub:493|addcore:adder|:133" : LOCATION = LC1_D17;
"|lpm_add_sub:493|addcore:adder|:137" : LOCATION = LC7_D17;
"|lpm_add_sub:493|addcore:adder|:141" : LOCATION = LC7_D9 ;
"|lpm_add_sub:493|addcore:adder|:150" : LOCATION = LC6_C30;
"|lpm_add_sub:493|addcore:adder|:151" : LOCATION = LC6_C35;
"reset~1" : LOCATION = LC1_B6 ;
":77" : LOCATION = LC5_A1 ; -- q2
":78" : LOCATION = LC2_A1 ; -- q1
":79" : LOCATION = LC7_A1 ; -- q0
":86" : LOCATION = LC2_A2 ;
"~100~1" : LOCATION = LC4_A1 ;
":117" : LOCATION = LC6_A1 ;
":118" : LOCATION = LC1_A1 ;
":119" : LOCATION = LC8_A1 ;
":120" : LOCATION = LC3_A1 ;
"~159~1" : LOCATION = LC5_D8 ;
"~160~1" : LOCATION = LC8_D11;
"~161~1" : LOCATION = LC7_D2 ;
"~162~1" : LOCATION = LC6_D14;
"~163~1" : LOCATION = LC8_C8 ;
"~164~1" : LOCATION = LC5_C6 ;
"~165~1" : LOCATION = LC5_C29;
"~166~1" : LOCATION = LC4_C29;
":167" : LOCATION = LC8_D8 ; -- ac7
"~167~1" : LOCATION = LC6_D8 ; -- ac7~1
":168" : LOCATION = LC4_D11; -- ac6
"~168~1" : LOCATION = LC6_D11; -- ac6~1
":169" : LOCATION = LC1_D2 ; -- ac5
"~169~1" : LOCATION = LC2_D2 ; -- ac5~1
":170" : LOCATION = LC1_D14; -- ac4
"~170~1" : LOCATION = LC4_D14; -- ac4~1
":171" : LOCATION = LC1_C8 ; -- ac3
"~171~1" : LOCATION = LC3_C8 ; -- ac3~1
":172" : LOCATION = LC8_C6 ; -- ac2
"~172~1" : LOCATION = LC6_C6 ; -- ac2~1
":173" : LOCATION = LC6_C29; -- ac1
"~173~1" : LOCATION = LC7_C29; -- ac1~1
":174" : LOCATION = LC1_C29; -- ac0
"~174~1" : LOCATION = LC2_C35; -- ac0~1
":183" : LOCATION = LC5_D11;
":214" : LOCATION = LC1_D8 ; -- tmp7
":215" : LOCATION = LC7_D11; -- tmp6
":216" : LOCATION = LC3_D2 ; -- tmp5
":217" : LOCATION = LC6_D2 ; -- tmp4
":218" : LOCATION = LC4_C8 ; -- tmp3
":219" : LOCATION = LC6_C8 ; -- tmp2
":220" : LOCATION = LC2_C29; -- tmp1
":221" : LOCATION = LC3_C35; -- tmp0
":243" : LOCATION = LC2_D8 ; -- cy_reg
":245" : LOCATION = LC6_A2 ;
":274" : LOCATION = LC8_D9 ; -- irh7
":275" : LOCATION = LC1_D11; -- irh6
":276" : LOCATION = LC8_D17; -- irh5
":277" : LOCATION = LC8_D14; -- irh4
":278" : LOCATION = LC4_C35; -- irh3
":279" : LOCATION = LC2_C6 ; -- irh2
":280" : LOCATION = LC1_C30; -- irh1
":281" : LOCATION = LC3_C30; -- irh0
":302" : LOCATION = LC3_D11;
":327" : LOCATION = LC1_D9 ;
":339" : LOCATION = LC5_D17;
":348" : LOCATION = LC2_D9 ;
"~375~1" : LOCATION = LC4_D17;
"~376~1" : LOCATION = LC7_D14;
"~377~1" : LOCATION = LC8_C35;
"~378~1" : LOCATION = LC7_C6 ;
"~379~1" : LOCATION = LC7_C30;
":381" : LOCATION = LC5_D9 ; -- pc_o7
":382" : LOCATION = LC2_D17; -- pc_o6
":383" : LOCATION = LC6_D17; -- pc_o5
":384" : LOCATION = LC5_D14; -- pc_o4
":385" : LOCATION = LC5_C35; -- pc_o3
":386" : LOCATION = LC1_C6 ; -- pc_o2
":387" : LOCATION = LC4_C30; -- pc_o1
":388" : LOCATION = LC2_C30; -- pc_o0
":389" : LOCATION = LC4_D9 ;
":390" : LOCATION = LC3_D9 ;
":444" : LOCATION = LC3_D17;
"~444~1" : LOCATION = LC6_D9 ;
":445" : LOCATION = LC2_D14;
":446" : LOCATION = LC7_C35;
":447" : LOCATION = LC4_C6 ;
":448" : LOCATION = LC5_C30;
":449" : LOCATION = LC8_C30;
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