k9f5608.h

这是英贝特试验箱jiffs测试代码 喊难找的啊

// "k9f5608.h"

#define EDUKIT44b0

#define K9F5608_ID (0xec75)
#define VERIFY_WR  (1)  //Verifing is enable when writing flash

/* K9F5608 pins */
	/*   7		6		5		4		3		2		1		0	*/
	/*   I		I		I		I		O		O		O		I	*/
	/*   NC		NC		NC		NC		SMCALE	SMCCLE	SMCCE	SMCRB*/
#define RB	(1<<2) //GPF2 - input
#define CE	(1<<9) //GPB9 - output
#define CLE	(1<<9) //GPC9 - output
#define ALE	(1<<8) //GPC8 - output
#define pK9F5608_DATA	   (*(volatile unsigned char *)0x04500000)	//bank2              
#define rPDATC			   (*(volatile unsigned *)0x01d20014)
#define rPDATB			   (*(volatile unsigned *)0x01d2000c)
#define rPDATF			   (*(volatile unsigned *)0x01d20038)

#define rPCONC			   (*(volatile unsigned *)0x01d20010)
#define rPCONB			   (*(volatile unsigned *)0x01d20008)
#define rPCONF			   (*(volatile unsigned *)0x01d20034)

/*
 * Values specific to the s3c44b0 board (used with EP7212 processor)
 * /
#define S3C44B0X_PCONF			0x01d20034
#define S3C44B0X_PDATF			0x01d20038
#define S3C44B0X_PCONB			0x01d20008
#define S3C44B0X_PDATB			0x01d2000c
#define S3C44B0X_PCONC			0x01d20010
#define S3C44B0X_PDATC			0x01d20014
*/
#define S3C44B0_IO_BASE		0x01d20000	/* Start of EP7212 IO address space */
/*
* IO offset to Port data register
* where the CLE, ALE and NCE pins
* are wired to.
*/
#define PD_CE				0x0000000c /* the data register offset connect CE pin */
#define PD_ALE				0x00000014 /* the data register offset connect ALE pin */
#define PD_CLE				0x00000014 /* the data register offset connect CLE pin */
#define PD_RB				0x00000038 /* the data register offset connect RB pin */
/*
* IO offset to Port control register
* so we can control the IO lines.
*/
#define PA_CE				0x00000008 /* the control register offset connect CE pin */
#define PA_ALE				0x00000010 /* the control register offset connect ALE pin */
#define PA_CLE				0x00000010 /* the control register offset connect CLE pin */
#define PA_RB				0x00000034 /* the control register offset connect RB pin */

#define S3C44B0_FIO_BASE	0x04400000	/* Address where flash is mapped */

/* K9F5608 command */
#define CMD_ALE0_CE0_CLE1		{rPDATC |= CLE;	rPDATC &= ~ALE; rPDATB &= ~CE;}
#define ADDR_ALE1_CE0_CLE0		{rPDATC &= ~CLE; rPDATC |= ALE;	rPDATB &= ~CE;}
#define DATA_ALE0_CE0_CLE0      {rPDATC &= ~(CLE|ALE);	rPDATB &= ~CE;}
#define INACTIVE_ALE0_CE1_CLE0	{rPDATC &= ~(CLE|ALE);	rPDATB |= CE;}       
#define WAITRB1		while(!(rPDATF & RB))  //wait tWB and check R/B pin.  
 
/* K9F5608 functions declare */
void nand_reset(void);//flash reset
unsigned int check_flash_id(void);