em78p860.h

用在EM78860单片机制作的摩斯密码机源文件

/*
*	head file for elan emc78p860 chip
*	em78p860.h
*	author :sunny.qin [e-mail]
*	time:	2006-6-6
*	version v1.0
*/
typedef unsigned char 	uchar;
typedef unsigned short  ushort;
typedef unsigned int  	uint;
typedef unsigned long	ulong;
typedef uchar				bool;
#define	TRUE	1
#define	FALSE	0
#define	true	1
#define	false	0
#define DISI()	_asm{disi}
#define ENI()		_asm{eni}
#define SLEP()	_asm{slep}
#define NOP()	_asm{nop}
//#define	_Nop()	NOP();NOP();NOP();NOP()
#define	_Nop()	NOP();NOP();NOP();NOP();NOP();NOP();NOP();NOP();NOP();NOP();NOP();NOP()

indir char regdata;

static unsigned int TCC		@0x01;
static unsigned int PC      @0x02;
static unsigned int STATUS  @0x03;
static unsigned int RSR		@0x04;
static unsigned int R5	   @0x05;	//ROM PAGE
static unsigned int PORT6   @0x06;	//R6
static unsigned int PORT7   @0x07;
static unsigned int PORT8	@0x08;
static unsigned int PORT9	@0x09;
static unsigned int	RA		@0x0A;
static unsigned int	RB		@0x0B;//empty reg
static unsigned int	RC		@0x0C;//2.5k ram adress
static unsigned int	RD		@0x0D;//2.5k ram data
static unsigned int	RE		@0x0E;//LCD Driver WDT control
static unsigned int ISR		@0x0F;//interrupt sstatus reg,RF


static io unsigned int	IOC6 	@0x06:iopage 0;//I/O port Control reg
static io unsigned int	IOC7	@0x07:iopage 0;
static io unsigned int	IOC8	@0x08:iopage 0;
static io unsigned int	IOC9	@0x09:iopage 0;
static io unsigned int	IOCA	@0x0A:iopage 0;
static io unsigned int	IOCB	@0x0B:iopage 0;//LCD address
static io unsigned int	IOCC	@0x0C:iopage 0;//LCD data
static io unsigned int	IOCD	@0x0D:iopage 0;//PULL	HIGH
static io unsigned int	IOCE	@0x0E:iopage 0;//IO,LCD
static io unsigned int	IOCF	@0x0F:iopage 0;//Int control

static io unsigned int 	IOCB_COUNTER1	@0x0B:iopage 1;//counter 1
static io unsigned int 	IOCC_COUNTER2	@0x0C:iopage 1;//conuter 2
static io unsigned int	IOCE_PAGE1		@0x0E:iopage 1;

/*	STATUS bits	*/
static bit	C @0x03@0:rpage 0;
static bit	DC	@0x03@1:rpage 0;
static bit	Z	@0x03@2:rpage 0;
static bit	P	@0x03@3:rpage 0;
static bit	T	@0x03@4:rpage 0;
static bit	PS	@0x03@6:rpage 0;

/*R5 bits*/
static bit	PS0	@0x05@0:rpage 0;
static bit	PS1	@0x05@1:rpage 0;
static bit	PS2	@0x05@2:rpage 0;
static bit	PS3	@0x05@3:rpage 0;

/*R6 bits*/
static bit	R60	@0x06@0:rpage 0;
static bit	R61	@0x06@1:rpage 0;
static bit	R62	@0x06@2:rpage 0;
static bit	R63	@0x06@3:rpage 0;
static bit	R64	@0x06@4:rpage 0;
static bit	R65	@0x06@5:rpage 0;
static bit	R66	@0x06@6:rpage 0;
static bit	R67	@0x06@7:rpage 0;

/*R7 bits*/
static bit	R70	@0x07@0:rpage 0;
static bit	R71	@0x07@1:rpage 0;
static bit	R72	@0x07@2:rpage 0;
static bit	R73	@0x07@3:rpage 0;	
static bit	R74	@0x07@4:rpage 0;
static bit	R75	@0x07@5:rpage 0;
static bit	R76	@0x07@6:rpage 0;
static bit	R77	@0x07@7:rpage 0;
/*R8 bits*/
static bit	R80	@0x08@0:rpage 0;
static bit	R81	@0x08@1:rpage 0;
static bit	R82	@0x08@2:rpage 0;
static bit	R83	@0x08@3:rpage 0;
static bit	R84	@0x08@4:rpage 0;
static bit	R85	@0x08@5:rpage 0;
static bit	R86	@0x08@6:rpage 0;
static bit	R87	@0x08@7:rpage 0;
/*R9 bits*/
static bit	R90	@0x09@0:rpage 0;
static bit	R91	@0x09@1:rpage 0;
static bit	R92	@0x09@2:rpage 0;
static bit	R93	@0x09@3:rpage 0;
static bit	R94	@0x09@4:rpage 0;
static bit	R95	@0x09@5:rpage 0;
static bit	R96	@0x09@6:rpage 0;
static bit	R97	@0x09@7:rpage 0;
/* RA bits*/
static bit	RA4_LOWBAT	@0x0A@4:rpage 0;//vol<3.6,RA4=0
static bit	RA5_ENABLE_DETECT	@0x0A@5:rpage 0;//enable detect low battery
static bit	RA6_ENABLE_PLL	@0x0A@6:rpage 0;//0=32.768k,1=3.679M
static bit	RA7_IDLE	@0x0A@7:rpage 0;//0=sleep mode,1=idle mode
/*RC bits*/
static bit	RC0_CIDA0	@0x0C@0:rpage 0;	//select CALLER ID RAM address up to 256??
static bit	RC1_CIDA1	@0x0C@1:rpage 0;
static bit	RC2_CIDA2	@0x0C@2:rpage 0;
static bit	RC3_CIDA3	@0x0C@3:rpage 0;
static bit	RC4_CIDA4	@0x0C@4:rpage 0;
static bit	RC5_CIDA5	@0x0C@5:rpage 0;
static bit	RC6_CIDA6	@0x0C@6:rpage 0;
static bit	RC7_CIDA7	@0x0C@7:rpage 0;
/*RD bits*/
/*RE */
/*
	RE_LCD_C2 RE_LCD_1	LCD display control	     RE_LCD_M	duty bias
	0			0		change duty,				0		1/16	1/4
						turn off lcd  				1		1/8		1/4
	0			1		blanking
	1			1		LCD display enable
*/
static bit	RE_LCD_M	@0x0E@0:rpage 0;
static bit	RE_LCD_1	@0x0E@1:rpage 0;
static bit	RE_LCD_C2	@0x0E@2:rpage 0;
static bit	RE_WUP9L	@0x0E@4:rpage 0;
static bit	RE_WUP9H	@0x0E@5:rpage 0;
static bit	RE_WDTE		@0x0E@6:rpage 0;

/*RF bits*/
static bit	RF_TCIF		@0x0F@0:rpage 0;
static bit	RF_INT0		@0x0F@1:rpage 0;
static bit	RF_INT1		@0x0F@2:rpage 0;
static bit	RF_INT2		@0x0F@3:rpage 0;
static bit	RF_C8_1		@0x0F@4:rpage 0;
static bit	RF_C8_2		@0x0F@5:rpage 0;
static bit	RF_6		@0x0F@6:rpage 0;
static bit	RF_INT3		@0x0F@7:rpage 0;

/*Special purpose Reg*/
/*CONT bits*/
//need by test reg addrr......???
static bit	CONT_PSR0	@0x02@0:rpage 0;
static bit	CONT_PSR1	@0x02@1:rpage 0;
static bit	CONT_PSR2	@0x02@2:rpage 0;
static bit	CONT_PAB	@0x02@3:rpage 0;
static bit	CONT_TS		@0x02@5:rpage 0;//0 =internal instruction cycle clock,1 =16.38k
static bit	CONT_INT	@0x02@6:rpage 0;

/*IOC6-IOC9*/
static bit	IOC60		@0x06@0:rpage 0;
static bit	IOC61		@0x06@1:rpage 0;
static bit	IOC62		@0x06@2:rpage 0;
static bit	IOC63		@0x06@3:rpage 0;
static bit	IOC64		@0x06@4:rpage 0;
static bit	IOC65		@0x06@5:rpage 0;
static bit	IOC66		@0x06@6:rpage 0;
static bit	IOC67		@0x06@7:rpage 0;

static bit	IOC70		@0x07@0:rpage 0;
static bit	IOC71		@0x07@1:rpage 0;
static bit	IOC72		@0x07@2:rpage 0;
static bit	IOC73		@0x07@3:rpage 0;
static bit	IOC74		@0x07@4:rpage 0;
static bit	IOC75		@0x07@5:rpage 0;
static bit	IOC76		@0x07@6:rpage 0;
static bit	IOC77		@0x07@7:rpage 0;


static bit	IOC80		@0x08@0:rpage 0;
static bit	IOC81		@0x08@1:rpage 0;
static bit	IOC82		@0x08@2:rpage 0;
static bit	IOC83		@0x08@3:rpage 0;
static bit	IOC84		@0x08@4:rpage 0;
static bit	IOC85		@0x08@5:rpage 0;
static bit	IOC86		@0x08@6:rpage 0;
static bit	IOC87		@0x08@7:rpage 0;

static bit	IOC90		@0x09@0:rpage 0;
static bit	IOC91		@0x09@1:rpage 0;
static bit	IOC92		@0x09@2:rpage 0;
static bit	IOC93		@0x09@3:rpage 0;
static bit	IOC94		@0x09@4:rpage 0;
static bit	IOC95		@0x09@5:rpage 0;
static bit	IOC96		@0x09@6:rpage 0;
static bit	IOC97		@0x09@7:rpage 0;

/*IOCA bits*/

static bit	IOCA_CALL_1	@0x0A@1:rpage 0;
static bit	IOCA_CALL_2	@0x0A@2:rpage 0;
static bit	IOCA_CALL_3	@0x0A@3:rpage 0;
static bit	IOCA_CALL_4	@0x0A@4:rpage 0;
static bit	IOCA_5		@0x0A@5:rpage 0;
static bit	IOCA_P8SL	@0x0A@6:rpage 0;
static bit	IOCA_P8SH	@0x0A@7:rpage 0;
/*IOCB bits*/
//in page 0,bit6-bit0=LCDA6-LCDA0
//in page 1 ,COUNTER1..
/*IOCC bits*/
//page 0 bit7-bit0= LCD RAM data reg
//page 1 8bit COUNTER2
/*IOCD bits*/
static bit	IOCD_PH0	@0x0D@0:rpage 0;//port 7 pin 0 1=enable internal pull high
static bit	IOCD_PH1	@0x0D@1:rpage 0;
static bit	IOCD_PH2	@0x0D@2:rpage 0;
static bit	IOCD_PH3	@0x0D@3:rpage 0;
static bit	IOCD_PH4	@0x0D@4:rpage 0;
static bit	IOCD_PH5	@0x0D@5:rpage 0;
static bit	IOCD_PH6	@0x0D@6:rpage 0;
static bit	IOCD_PH7	@0x0D@7:rpage 0;

/*IOCE bits*/
/*when acess this reg ,use asm

static bit	IOCE_SC		@0x0E@0:rpage 0;//1=enable SCAN KEY signal,note!!!!!!!
static bit	IOCE_BIAS1	@0x0E@2:rpage 0;//counter1 prescaler
static bit	IOCE_BIAS2	@0x0E@3:rpage 0;
static bit	IOCE_BIAS3	@0x0E@4:rpage 0;
static bit	IOCE_P6S	@0x0E@5:rpage 0;//0=normal i/o ,1=COMMON port
static bit	IOCE_P9SL	@0x0E@6:rpage 0;//port9,0=normal i/o,1=SEGMENT output
static bit	IOCE_P9SH	@0x0E@7:rpage 0;

//this define have a problem???,use rpage
static bit	IOCE_PSC0	@0x0E@2:rpage 1;
static bit	IOCE_PSC1	@0x0E @3:rpage 0;
static bit	IOCE_C1S	@0x0E@4:rpage 0;
static bit	IOCE_C2S	@0x0E@5:rpage 0;
static bit	IOCE_OP76	@0x0E@6:rpage 0;//0=disable opendrain,test ???
static bit	IOCE_OP77	@0x0E@7:rpage 0;
*/



/*IOCF bits*/
static bit	IOCF_TCIF	@0x0F@0:rpage 0;//0=disable interrupt,1=enable
static bit	IOCF_INT0	@0x0F@1:rpage 0;
static bit	IOCF_INT1	@0x0F@2:rpage 0;
static bit	IOCF_INT2	@0x0F@3:rpage 0;
static bit	IOCF_C8_1	@0x0F@4:rpage 0;
static bit	IOCF_C8_2	@0x0F@5:rpage 0;
static bit	IOCF_6	@0x0F@6:rpage 0;
static bit	IOCF_INT3	@0x0F@7:rpage 0;