📄 pfc_ctrl.h
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(Start_pll_32_mega(), \
Wait_pll_ready(), \
Psc0_use_pll_clock() )
//! No PSC0prescaler
#define Disable_psc0_prescaler() \ //PCTL0是PSC 0控制寄存器,进行预分频
(PCTL0 &= ~( (1<<PPRE01) | (1<<PPRE00) ) )
//! PSC0 clock is internally divided by 4
#define Divide_psc0_input_clock_by_4() \
(PCTL0 &= ~(1<<PPRE01), \
PCTL0 |= (1<<PPRE00) )
//! PSC0 clock is internally divided by 16
#define Divide_psc0_input_clock_by_16() \
(PCTL0 |= (1<<PPRE01), \
PCTL0 &= ~(1<<PPRE00) )
//! PSC0 clock is internally divided by 64
#define Divide_psc0_input_clock_by_64() \
(PCTL0 |= ((1<<PPRE01) | (1<<PPRE00)) )
//! @}
#define Psc0_in_1_ramp_mode() \//单斜坡模式
(PCNF0 &= ~( (1<<PMODE01) | (1<<PMODE00) ) )
//! PSC0 is configured in two ramp mode, it means that the internal counter
//! counts from 0 up to OCR0RA then from 0 to OCR0RB
#define Psc0_in_2_ramps_mode() \//双斜坡模式
(PCNF0 &= ~(1<<PMODE01), \
PCNF0 |= (1<<PMODE00) )
//! PSC0 is configured in four ramp mode, it means that the internal counter
//! counts from 0 up to OCR0SA then from 0 to OCR0RA then from 0 to OCR0SB then from 0 to OCR0RB
#define Psc0_in_4_ramps_mode() \//四斜坡模式
(PCNF0 |= (1<<PMODE01), \
PCNF0 &= ~(1<<PMODE00) )
//! PSC0 is configured in Center Aligned mode, it means that the internal counter
//! counts from 0 up to OCR0RB then from OCR0RB downto 0
#define Psc0_in_centered_aligned_mode() \//中心对齐模式
(PCNF0 |= ( (1<<PMODE01) | (1<<PMODE00) ) )
//! @}
#define Psc0_symetrical_flank_width_modulation() (PCTL0 |= (1<<PBFM0) ) //面宽度调制在On-Time 0 和 On-Time //1上操作!< PSC0 Flank width modulation, operates on both OCR0RA and OCR0RB
#define Psc0_end_of_cycle_flank_width_modulation() (PCTL0 &= ~(1<<PBFM0) ) //!< PSC0 Flank width modulation operates only on OCR0RB
//! The PSC0 synchronization signal is sent to the ADC/Amplifier on waveform generator A leading edge
#define Psc0_synchro_on_waveform_generator_a_leading_edge() \ //同步源传送
(PSOC0 &= ~( (1<<PSYNC01) | (1<<PSYNC00) ) )
//! The PSC0 synchronization signal is sent to the ADC/Amplifier on waveform generator A trailing edge
#define Psc0_synchro_on_waveform_generator_a_trailing_edge() \
(PSOC0 &= ~(1<<PSYNC01), \
PSOC0 |= (1<<PSYNC00) )
//! The PSC0 synchronization signal is sent to the ADC/Amplifier on waveform generator B leading edge
#define Psc0_synchro_on_waveform_generator_b_leading_edge() \
(PSOC0 |= (1<<PSYNC01), \
PSOC0 &= ~(1<<PSYNC00) )
//! The PSC0 synchronization signal is sent to the ADC/Amplifier on waveform generator B trailing edge
#define Psc0_synchro_on_waveform_generator_b_trailing_edge() \
(PSOC0 |= ( (1<<PSYNC01) | (1<<PSYNC00) ) )
//! @}
#define Start_psc0() (PCTL0 |= (1<<PRUN0) ) //!< Turn On PSC0
#define Stop_psc0() (PCTL0 &= ~(1<<PRUN0) ) //!< Turn Off PSC0
//! Turn Off PSC0 and the end of cycle
#define Psc0_complete_waveform_and_stop() (PCTL0 |= (1<<PCCYC0), \
PCTL0 &= ~(1<<PRUN0) )
#define Is_psc0_started() (PCTL0 & (1<<PRUN0) )
//! @}
#define Enable_pscout00_fault_mode() (PCTL0 |= (1<<PAOC0A) ) //!< Fault input select to block A can act directly to PSCOUT00 output
#define Disable_pscout00_fault_mode() (PCTL0 &= ~(1<<PAOC0A) ) //!< No fault or retrigger management on PSCOUT00
#define Enable_pscout01_fault_mode() (PCTL0 |= (1<<PAOC0B) ) //!< Fault input select to block A can act directly to PSCOUT00 output
#define Disable_pscout01_fault_mode() (PCTL0 &= ~(1<<PAOC0B) ) //!< No fault or retrigger management on PSCOUT01
#define Enable_psc0_autorun() (PCTL0 |= (1<<PARUN0) ) //!< Setting PRUN2 in PCTL2 register or setting both PARUN2 in PCTL2 register and PRUN1 in PCTL1 register will make the two PSC start simultaneously
#define Disable_psc0_autorun() (PCTL0 &= ~(1<<PARUN0) ) //!< No synchronization between PSC2 and PSC0 exists
//! @}
#define Enable_psc0_synchro_error_interrupt() (PIM0 |= (1<<PSEIE0) ) //PIM0中断屏蔽寄存器产生中断!< An interrupt is generated,when the PSEI0 bit is set
#define Disable_psc0_synchro_error_interrupt() (PIM0 &= ~(1<<PSEIE0) ) //!< No interrupt is generated when the PSEI0 bit is set
#define Enable_psc0_external_event_a_interrupt() (PIM0 |= (1<<PEVE0A) ) //!< An external event which can generate a capture from retrigger/fault block A generates an interrupt
#define Disable_psc0_external_event_a_interrupt() (PIM0 &= ~(1<<PEVE0A) ) //!< An external event which can generate a capture from retrigger/fault block A doesn't generate any interrupt
#define Enable_psc0_external_event_b_interrupt() (PIM0 |= (1<<PEVE0B) ) //!< An external event which can generate a capture from retrigger/fault block B generates an interrupt
#define Disable_psc0_external_event_b_interrupt() (PIM0 &= ~(1<<PEVE0B) ) //!< An external event which can generate a capture from retrigger/fault block B doesn't generate any interrupt
#define Enable_psc0_end_of_cycle_interrupt() (PIM0 |= (1<<PEOPE0) ) //!< An interrupt is generated when PSC0 reaches the end of the whole cycle
#define Disable_psc0_end_of_cycle_interrupt() (PIM0 &= ~(1<<PEOPE0) ) //!< No interrupt is generated when PSC0 reaches the end of the whole cycle
//! @}
#define Is_psc0_synchro_error_interrupt_flag_set() (PIFR0 & (1<<PSEI0) ) //!< Return 1 if the PSEI0 bit in PIFR0 is set
#define Clear_psc0_synchro_error_interrupt_flag() (PIFR0 &= ~(1<<PSEI0) ) //!< Clear PSEI0 bit in PIFR0 register
#define Is_psc0_external_event_a_interrupt_flag_set() (PIFR0 & (1<<PEV0A) ) //!< Return 1 if the PEV0A bit in PIFR0 is set
#define Clear_psc0_external_event_a_interrupt_flag() (PIFR0 &= ~(1<<PEV0A) ) //!< Clear PEV0A bit in PIFR0 register
#define Is_psc0_external_event_b_interrupt_flag_set() (PIFR0 & (1<<PEV0B) ) //!< Return 1 if the PEV0B bit in PIFR0 is set
#define Clear_psc0_external_event_b_interrupt_flag() (PIFR0 &= ~(1<<PEV0B) ) //!< Clear PEV0B bit in PIFR0 register
#define Is_psc0_end_of_cycle_interrupt_flag_set() (PIFR0 & (1<<PEOP2) ) //!< Return 1 if the PE0P2 bit in PIFR0 is set
#define Clear_psc0_end_of_cycle_interrupt_flag() (PIFR0 &= ~(1<<PEOP2) ) //!< Clear PEOP2 bit in PIFR0 register
//变量声明
extern unsigned int psc_ontime0; //更新 PSC 的OCR0SA值
extern unsigned int psc_deadtime0; //更新 PSC 的OCR0RA值
extern unsigned int psc_ontime1; //更新 PSC 的OCR0SB值
extern unsigned int psc_deadtime1; //更新 PSC 的OCR0RB值
extern unsigned int comparison_ontime0; //更新 psc_ontime0的临时寄存器
extern unsigned char gvs_zcd_occures; //电感过零标志
extern unsigned char gvs_pfc_soft_start_shots; //PSC驱动中断标志
extern unsigned int gs_v_haversine_peak ; //输入峰值电压
extern volatile unsigned int g_max_pulse_width ; //PFC最大脉宽值
//_____ 功能函数 __________________________________________________
void pfc_fun(void); //pfc功能控制流程
void init_psc0(void); // psc控制初始化
void ACMP0_init(void); // 模拟比较器初始化
//extern void ANACOMP_0_interrupt(void);// 模拟比较匹配中断程序
//extern void PSC0EC_interrupt(void); //PSC匹配事件中断
void update_psc0 (unsigned int deadtime0,unsigned int ontime0,unsigned int deadtime1,unsigned int ontime1);//更新计数器参数
void pfc_run_start(unsigned int last_ontime);
void pfc_run_update(unsigned int last_ontime);
void pfc_run_off(void);
#endif //__PFC_CTRL_H
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