📄 disp_br3.h
字号:
0x4a,0x8b,0x00,0x00,0x01,0x01,0x01,0x01,
0x1e,0x0c,0x01,0x01,0x0e,0x24,0x1b,0x78,
0xe8,0x8a,0x01,0x9a,0x58,0x52,0x8b,0x28,
0x1e,0x50,0x54,0xff,0xff,0x80,0x61,0x40,
0x61,0x4f,0x61,0x59,0x71,0x4f,0x81,0x40,
0x81,0x59,0x81,0x99,0xa9,0x40,0x00,0x00,
0x00,0xfc,0x00,0x31,0x37,0x27,0x27,0x20,
0x4c,0x43,0x44,0x0a,0x20,0x20,0x20,0x20,
0x00,0x00,0x00,0xfc,0x00,0x4d,0x6f,0x6e,
0x69,0x74,0x6f,0x72,0x0a,0x20,0x20,0x20,
0x20,0x20,0x00,0x00,0x00,0xfd,0x00,0x2b,
0x55,0x14,0x5c,0x0e,0x00,0x0a,0x20,0x20,
0x20,0x20,0x20,0x20,0x00,0x00,0x00,0xff,
0x00,0x30,0x30,0x30,0x30,0x30,0x31,0x0a,
0x20,0x20,0x20,0x20,0x20,0x20,0x00,0xbd,
4, N_INC, DDC_ENABLE_FC, 0x05, // Enable the DDC channel of VGA
#if(TMDS_ENABLE)
5, Y_INC, DDC_ENABLE_BC, 0x00,0x00, // Disable the DDC channel of DVI
131, N_INC, DDC_ACCESS_PORT_BE, 0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00,
0x26,0xCD,0x68,0x46,0x00,0x00,0x00,0x00,
0x23,0x0c,0x01,0x03,0x81,0x24,0x1D,0x78,
0xeF,0x0D,0xC2,0xa0,0x57,0x47,0x98,0x27,
0x12,0x48,0x4F,0xBF,0xEF,0x00,0x81,0x80,
0x81,0x8F,0x61,0x40,0x61,0x59,0x45,0x40,
0x45,0x59,0x31,0x40,0x31,0x59,0xBC,0x34,
0x00,0x98,0x51,0x00,0x2A,0x40,0x10,0x90,
0x13,0x00,0x68,0x22,0x11,0x00,0x00,0x1e,
0x00,0x00,0x00,0xFF,0x00,0x30,0x0A,0x20,
0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,
0x20,0x20,0x00,0x00,0x00,0xFC,0x00,0x41,
0x53,0x34,0x36,0x33,0x37,0x20,0x20,0x20,
0x20,0x20,0x20,0x20,0x00,0x00,0x00,0xFD,
0x00,0x38,0x55,0x18,0x50,0x0E,0x00,0x0A,
0x20,0x20,0x20,0x20,0x20,0x20,0x00,0x06,
4, N_INC, DDC_ENABLE_BC, 0x05, // Enable the DDC channel of DVI
#endif
0
};
unsigned char code RTD_IO_INI[] =
{
4, N_INC, TC_ADDR_PORT_95, 0x00,
7, N_INC, TC_DATA_PORT_96, 0x00,0x10,0x11,0x08,
#if((OUTPUT_BUS == LVDS_TYPE))
#if(LVDS_MAP1 == LVDS_MAP)
8, Y_INC, LVDS_CTRL0_C0, 0x00,0xa3,0x22,0x80,0x80,
#else
8, Y_INC, LVDS_CTRL0_C0, 0x00,0xa3,0x23,0x80,0x80,
#endif
#else
5, Y_INC, 0x57,0xa0,0x04,
4, N_INC, TC_ADDR_PORT_95, 0x00,
// 7, N_INC, TC_DATA_PORT_96, 0xa2,0x40,0x43,0x99, //enable global tcon
7, N_INC, TC_DATA_PORT_96, 0x40,0x10,0x11,0xc0,
4, N_INC, TC_ADDR_PORT_95, 0x00,
4, N_INC, TC_DATA_PORT_96, 0xc2,
#if(ANTI_FLICKER)
5, Y_INC, ANTI_FLICKER_TH1_5B,0x08,0xa5,
#endif
#endif
0
};
// Be Careful !!
// Display window setting in FreeV[] MUST follow the definition of
// 1. DISP_WID and DISP_LEN
// 2. DH_ACT_STA_POS and DH_ACT_END_POS
// 3. DV_ACT_STA_POS and DV_ACT_END_POS
// 4. Background window must be the same as active window.
unsigned char code FreeV[] =
{
27, Y_INC, VDIS_CTRL_20, 0x23 | DISP_BIT | DISPLAY_PORT | DHS_MASK, // Switch to free-run display
DISP_INV | DISP_EO_SWAP | DISP_RB_SWAP | DISP_ML_SWAP,
(STD_DH_TOTAL & 0xff), (STD_DH_TOTAL >> 8), // DH_TOTAL
STD_HSYNC_WIDTH, // DH_HS_END
(DH_ACT_STA_POS & 0xff), (DH_ACT_STA_POS >> 8), // DH_BKGD_STA
(DH_ACT_STA_POS & 0xff), (DH_ACT_STA_POS >> 8), // DH_ACT_STA
(DH_ACT_END_POS & 0xff), (DH_ACT_END_POS >> 8), // DH_ACT_END
(DH_ACT_END_POS & 0xff), (DH_ACT_END_POS >> 8), // DH_BKGD_END
(STD_DV_TOTAL & 0xff), (STD_DV_TOTAL >> 8), // DV_TOTAL
STD_VSYNC_LENGTH, // DV_VS_END
(DV_ACT_STA_POS & 0xff), (DV_ACT_STA_POS >> 8) | AUTO_SWITCH, // DV_BKGD_STA
(DV_ACT_STA_POS & 0xff), (DV_ACT_STA_POS >> 8), // DV_ACT_STA
(DV_ACT_END_POS & 0xff), (DV_ACT_END_POS >> 8), // DV_ACT_END
(DV_ACT_END_POS & 0xff), (DV_ACT_END_POS >> 8), // DV_BKGD_END
5, Y_INC, FIX_DVTOTAL_LSB_97, (STD_DV_TOTAL & 0xff), (STD_DV_TOTAL >> 8),
#if (NEW_DITHER)
5, Y_INC, FX_LST_LEN_L_59, 0x00,0x98, // Enable fix last line function
#else
5, Y_INC, FX_LST_LEN_L_59, 0x00,0x18, // Enable fix last line function
#endif
4, N_INC, VDIS_CTRL_20, 0x22 | DISP_BIT | DISPLAY_PORT | DHS_MASK, // Disable display timing
4, N_INC, VDIS_CTRL_20, 0x23 | DISP_BIT | DISPLAY_PORT | DHS_MASK, // Restart free-run background
// Force display timing start
6, Y_INC, YUV2RGB_39, 0x00, 0x20 | DCLK_DELAY, 0x04 | DCLK_INV,
4, N_INC, DIS_TIMING0_3A, 0x00 | DCLK_DELAY,
4, N_INC, INT_FLD_DETECT_14, 0x00,
5, Y_INC, IVS_DELAY_8C, 0x00, 0x00,
4, N_INC, SCALE_CTRL_15, 0x00,
4, N_INC, FILTER_CTRL0_1B, 0xc4,
0
};
unsigned char code OSD_PWUP_INI[] =
{
5, Y_INC, OSD_ROW_90, 0xaf,0x0f,
6, N_INC, OSD_DATA_92, 0x2c,0xf0,0xf0,
5, Y_INC, OSD_ROW_90, 0xaf,0x19,
5, N_INC, OSD_DATA_92, 0x00,0x88,
5, Y_INC, OSD_ROW_90, 0xaf,0x1c, //set the window3 & window4 offset = 0
5, N_INC, OSD_DATA_92, 0x80,0x80,
0
};
///////////////////////////////////////////////////////////////////////////
//VGA mode detect range
unsigned int code VGA_Mode[][6] =
{
// HF_min, HF_max, VL_min, VL_max, HF_std, VS+1
{ 0, 0, 0, 0, 0, 0 }, //00:No Signal
{ 764, 806, 620, 636, 781, 2+1 }, //01:VGA [640/720]*350*50Hz
{ 764, 806, 620, 636, 781, 2+1 }, //02:VGA [640/720]*400*50Hz
{ 764, 806, 516, 532, 781, 2+1 }, //03:VGA [640/720]*350*60Hz
{ 764, 806, 516, 532, 781, 2+1 }, //04:VGA [640/720]*400*60Hz
{ 969, 1021, 431, 447, 990, 8+1 }, //05:640*400*56hz
{ 768, 810, 440, 456, 785, 2+1 }, //06:640*350*70hz
{ 764, 806, 440, 456, 781, 2+1 }, //07:720*350*70hz
{ 764, 806, 440, 456, 781, 2+1 }, //08:640*400*70hz
{ 764, 806, 440, 456, 781, 2+1 }, //09:700*400*70hz
{ 635, 670, 436, 452, 649, 3+1 }, //10:640*350*85hz
{ 635, 670, 436, 452, 649, 3+1 }, //11:640*400*85hz
{ 634, 669, 437, 453, 648, 3+1 }, //12:720*400*85hz
{ 764, 806, 620, 636, 781, 2+1 }, //13:640*480*50hz
{ 764, 806, 516, 532, 781, 2+1 }, //14:640*480*60hz
{ 687, 724, 516, 532, 702, 3+1 }, //15:640*480*66hz
{ 635, 670, 511, 527, 649, 3+1 }, //16:640*480*72hz
{ 641, 676, 495, 507, 655, 3+1 }, //17:640*480*75hz
{ 556, 586, 500, 516, 568, 3+1 }, //18:640*480*85hz
{ 684, 721, 616, 632, 699, 2+1 }, //19:800*600*56hz
{ 635, 670, 619, 635, 649, 4+1 }, //20:800*600*60hz
{ 492, 519, 721, 737, 503, 6+1 }, //21:800*600*66hz
{ 500, 527, 657, 673, 511, 6+1 }, //22:800*600*72hz
{ 513, 541, 616, 632, 524, 3+1 }, //23:800*600*75hz
{ 448, 473, 622, 638, 458, 3+1 }, //24:800*600*85hz
{ 483, 510, 658, 674, 494, 3+1 }, //25:832*624*75hz
{ 497, 524, 797, 813, 508, 6+1 }, //26:1024*768*60hz
{ 493, 520, 810, 826, 504, 6+1 }, //27:1024*768*59hz
{ 445, 470, 807, 823, 455, 4+1 }, //28:1024*768*66hz
{ 428, 449, 797, 813, 435, 6+1 }, //29:1024*768*70hz
{ 399, 421, 795, 811, 408, 3+1 }, //30:1024*768*74hz
{ 400, 422, 791, 807, 409, 3+1 }, //31:1024*768*75hz
{ 350, 370, 799, 815, 358, 3+1 }, //32:1024*768*85hz
{ 339, 358, 834, 850, 347, 8+1 }, //33:1024*800*84hz
{ 356, 376, 891, 907, 364, 3+1 }, //34:1152*864*75hz
{ 350, 370, 906, 922, 358, 3+1 }, //35:1152*870*75hz
{ 389, 411, 928, 944, 398, 4+1 }, //36:1152*900*66hz
{ 335, 354, 934, 950, 343, 8+1 }, //37:1152*900*76hz
{ 401, 423, 991, 1007, 410, 3+1 }, //38:1280*960*60hz
{ 280, 295, 1002, 1018, 286, 3+1 }, //39:1280*960*85hz
{ 376, 396, 1057, 1073, 384, 3+1 }, //40:1280*1024*60hz
{ 312, 329, 1060, 1076, 319, 3+1 }, //41:1280*1024*72hz
{ 296, 313, 1057, 1073, 303, 8+1 }, //42:1280*1024*76hz
{ 300, 317, 1057, 1073, 307, 3+1 }, //43:1280*1024*75hz
{ 264, 279, 1063, 1079, 270, 3+1 }, //44:1280*1024*85hz
{ 321, 339, 1241, 1257, 328, 3+1 }, //45:1600*1200*60hz
{ 0, 0, 0, 0, 0, 0 }, //46:Mode reserved 00
{ 0, 0, 0, 0, 0, 0 }, //47:Mode reserved 01
{ 0, 0, 0, 0, 0, 0 }, //48:Mode reserved 02
{ 0, 0, 0, 0, 0, 0 }, //49:Mode reserved 03
{ 642, 1230, 418, 497, 0, 2+1 }, //50:NewMode720x400
{ 535, 1025, 498, 637, 0, 2+1 }, //51:NewMode640x480
{ 428, 820, 618, 785, 0, 2+1 }, //52:NewMode800x600
{ 334, 641, 786, 881, 0, 2+1 }, //53:NewMode1024x768
{ 297, 570, 882, 917, 0, 2+1 }, //54:NewMode1152x864
{ 285, 547, 918, 977, 0, 2+1 }, //55:NewMode1152x900
{ 267, 513, 978, 1041, 0, 2+1 }, //56:NewMode1280x960
{ 251, 481, 1042, 1217, 0, 2+1 }, //57:NewMode1280x1024
{ 292, 559, 1218, 1328, 0, 2+1 }, //58:NewMode1600x1200
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