📄 mode_detect.c
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if ((0 == ((unsigned int *)Data)[1]) || (0x07ff <= ((unsigned int *)Data)[1]) ||
(0 == ((unsigned int *)Data)[2]) || (0x07ff <= ((unsigned int *)Data)[2]) ||
(0 == m))
{
ucSync_Type = SYNC_SS;
RTDSetByte(SYNC_CTRL_4B, 0x14);
}
else
{
ucSync_Type = SYNC_CS;
RTDCodeW(VGA_SET_CS);
}
*/
}
else if (SYNC_SOG == ucSync_Type)
{
// Issac :
// We ignore SOG if SYNC signal is available, because SOG is not good for phase and noise
RTDSetByte(SYNC_CTRL_4B, 0x14);
Delay_Xms(8);
RTDSetByte(SYNC_POR_4C, 0x00);
RTDSetByte(SYNC_POR_4C, 0x02);
m = (MODE_DETECT_FREQ + 1) * 20;
do
{
Delay_Xms(1);
RTDRead(SYNC_POR_4C, 0x05, Y_INC);
}
while ((Data[0] & 0x02) && (--m));
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
Data[3] = Data[1];
Data[2] = Data[2] & 0x8f;
if ((0 == ((unsigned int *)Data)[1]) || (0x07ff <= ((unsigned int *)Data)[1]) ||
(0 == ((unsigned int *)Data)[2]) || (0x07ff <= ((unsigned int *)Data)[2]) ||
(0 == m))
{
ucSync_Type = SYNC_SOG;
RTDSetByte(SYNC_CTRL_4B, 0x57);
Delay_Xms(8);
RTDSetByte(SYNC_POR_4C, 0x22);
Delay_Xms(20);
RTDSetByte(SYNC_POR_4C, 0x00);
}
else
{
ucSync_Type = SYNC_SS;
RTDCodeW(VGA_SET_SS);
}
}
}
/////////////////////////////////////////////////////////
//------------ Detect VGA & DVI Mode ----------------//
/////////////////////////////////////////////////////////
void Detect_Input_Mode(void)
{
unsigned char ucMode_Temp;
unsigned int usHS_Pulse;
RTDRead(SYNC_POR_4C, 0x09, Y_INC);
if (Data[0] & 0x02)
{
// Reset Sync Processor when sync signal timeout
RTDSetBit(SYNC_POR_4C, 0xfd, 0x00);
// Treat sync signal timeout as no signal
ucMode_Temp = MODE_NOSIGNAL;
}
else
{
unsigned int usHsync_Temp, usVsync_Temp;
bit bHpole_Temp, bVpole_Temp;
Data[7] = Data[5];
Data[6] = Data[6] & 0x0f;
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
Data[3] = Data[1];
Data[2] = Data[2] & 0x8f;
bVpole_Temp = (bit)(Data[0] & 0x08);
bHpole_Temp = (bit)(Data[0] & 0x04);
usHsync_Temp = ((unsigned int *)Data)[1]; // Current HSYNC timing
usVsync_Temp = ((unsigned int *)Data)[2]; // Current VSYNC timing
usHS_Pulse = ((unsigned int *)Data)[3]; // Current HSYNC pulse width
// Update sync-processor setting according to H/V polarity
RTDRead(VGIP_SIGINV_05, 0x01, N_INC);
if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07))
{
Data[0] &= 0xd7; // HS_RAW & VS positive
if (!bHpole_Temp) Data[0] |= 0x20;
if (!bVpole_Temp && SYNC_SS == ucSync_Type) Data[0] |= 0x08; // Seperate sync
}
else // if ((stGUD1.INPUT_SOURCE & 0x07) == SOURCE_DVI)
{
Data[0] &= 0xf3; // VS & HS positive
if (!bHpole_Temp) Data[0] |= 0x04;
if (!bVpole_Temp) Data[0] |= 0x08;
}
RTDSetByte(VGIP_SIGINV_05, Data[0]);
// Check if timing information is valid
if (0x07ff <= usHsync_Temp || 0x07ff <= usVsync_Temp || 0 == usHsync_Temp || 0 == usVsync_Temp)
{
ucMode_Temp = MODE_NOSIGNAL;
#if (_TRUE == TMDS_ENABLE && _FALSE == SOURCE_AUTO_SCAN)
RTDCodeW(TMDS_MANUAL_OFF);
#endif
}
else
{
// Treat small change of usHsync/usVsync as no change
if (usHsync <= usHsync_Temp && usHsync_Temp <= (usHsync + 2)) usHsync_Temp = usHsync;
if (usVsync <= usVsync_Temp && usVsync_Temp <= (usVsync + 2)) usVsync_Temp = usVsync;
Data[0] = (bVpole != bVpole_Temp || bHpole != bHpole_Temp || usHsync != usHsync_Temp || usVsync != usVsync_Temp) ? 1 : 0;
usHsync = usHsync_Temp;
usVsync = usVsync_Temp;
bVpole = bVpole_Temp;
bHpole = bHpole_Temp;
// Check if timing format is changed
if (Data[0])
{
#if (NOSUPPORT_RESET == _TRUE)
ucMode_Temp = MODE_NOSIGNAL;
#else
ucMode_Temp = MODE_NOSUPPORT;
#endif
}
else
{
// Calculate Vertical Refresh Rate
ucRefresh = ((unsigned long)RTD_XTAL * 1000 * 2) / ((unsigned long)usHsync * usVsync);
ucRefresh = (ucRefresh & 0x01) ? ((ucRefresh + 1) >> 1) : (ucRefresh >> 1);
if (49 > ucRefresh || MAX_RATE < ucRefresh)
{
ucMode_Temp = MODE_NOSUPPORT; // We don't support vertical refresh rate lower than 50Hz
}
else
{
ucMode_Temp = (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07)) ? VGA_Mode_Search(usHS_Pulse) : Seek_DVI_Mode();
#if (PARTIAL_DISP)
if (MODE_NOSUPPORT == ucMode_Temp && 0 != usIPV_ACT_LEN)
ucMode_Temp = Partial_Display();
#endif
}
}
}
}
if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07) && SYNC_SOG == ucSync_Type)
{
if (MODE_NOSUPPORT == ucMode_Temp || 0 != (usHS_Pulse * 7 / usHsync))
{
// To prevent from SOG mode mistake
// HSYNC pulse width will never longer than 1/7*HSYNC period
ucMode_Temp = MODE_NOSIGNAL;
}
}
//-------------Check result-----------------------------------------
if (MODE_NOSIGNAL == ucMode_Temp)
{
if (MODE_NOSIGNAL != ucMode_Found)
{
ucMode_Found = MODE_NOSIGNAL;
ucMode_Times = 1;
}
else
{
if (NO_MODE_TIMES > ucMode_Times)
{
// Wait for signal stable
ucMode_Times ++;
if (SOURCE_DVI == (stGUD1.INPUT_SOURCE & 0x07))
{
// Enable the TMDS Hsync & Vsync error correction to improve the long cable image quality
RTDSetByte(TMDS_CORRECTION_FF, 0x03);
}
}
else
{
bStable = (MODE_NOSIGNAL == ucMode_Curr) ? 1 : 0;
ucMode_Curr = MODE_NOSIGNAL;
ucMode_Times = NO_MODE_TIMES - 2;
if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07))
{
// Search VGA input with other type of SYNC signal
Sync_Type_Switch();
}
else
{
// Disable the TMDS Hsync & Vsync error correction
RTDSetByte(TMDS_CORRECTION_FF, 0x00);
}
}
}
}
else
{
if (ucMode_Found != ucMode_Temp)
{
ucMode_Found = ucMode_Temp;
ucMode_Times = 1;
if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07)) Sync_Type_Confirm();
}
else
{
Data[0] = (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07)) ? VGA_SEARCH_TIMES : DVI_SEARCH_TIMES;
if (Data[0] > ucMode_Times)
{
ucMode_Times ++;
}
else
{
#if (NOSUPPORT_RESET == _TRUE)
bStable = 0; // bStable must be cleared when mode changed
ucMode_Curr = ucMode_Found; // Supported mode found
ucMode_Times = 0; // Reset mode timer
if (MODE_NOSUPPORT != ucMode_Found)
{
bLIGHT_PWR = LIGHT_OFF; // Turn off BackLight for reset display
RTDSetByte(HOSTCTRL_02, 0x00); // Wake RTD up
OSD_Dispatcher(NOTIFY_RESET_OSD); // Reset OSD
if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07))
Display_VGA_Set(); // Set VGA Mode registers
else
Display_DVI_Set();
}
#else
if (MODE_NOSUPPORT != ucMode_Found)
{
bStable = 0; // bStable must be cleared when mode changed
ucMode_Curr = ucMode_Found; // Supported mode found
ucMode_Times = 0; // Reset mode timer
bLIGHT_PWR = LIGHT_OFF; // Turn off BackLight for reset display
RTDSetByte(HOSTCTRL_02, 0x00); // Wake RTD up
OSD_Dispatcher(NOTIFY_RESET_OSD); // Reset OSD
if (SOURCE_VGA == (stGUD1.INPUT_SOURCE & 0x07))
Display_VGA_Set();
else
Display_DVI_Set();
}
else
{
bStable = (MODE_NOSUPPORT == ucMode_Curr) ? 1 : 0;
ucMode_Curr = MODE_NOSUPPORT;
}
#endif
}
}
}
}
//------------------- Check VGA & DVI Mode -------------------//
void Check_Input_Mode(void)
{
RTDRead(SYNC_POR_4C, 5, Y_INC);
if (Data[0] & 0x02)
{
RTDSetBit(SYNC_POR_4C, 0xfd, 0x00); // Input signal time-out. Reset sync-processor
ucMode_Found = MODE_NOSIGNAL;
}
else
{
if ((bVpole != (bit)(Data[0] & 0x08)) || (bHpole != (bit)(Data[0] & 0x04)))
{
ucMode_Found = MODE_NOSIGNAL;
}
else
{
unsigned int usHsync_Temp;
unsigned int usVsync_Temp;
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
Data[3] = Data[1];
Data[2] = Data[2] & 0x8f;
usHsync_Temp = ((unsigned int *)Data)[1]; // Current usHsync timing
usVsync_Temp = ((unsigned int *)Data)[2]; // Current usVsync timing
if (0x07ff <= usHsync_Temp || 0x07ff <= usVsync_Temp || 0 == usHsync_Temp || 0 == usVsync_Temp)
{
ucMode_Found = MODE_NOSIGNAL;
}
else
{
if ((usHsync_Temp < (usHsync - 1)) || (usHsync_Temp > (usHsync + 3)) ||
(usVsync_Temp < (usVsync - 1)) || (usVsync_Temp > (usVsync + 3)))
{
ucMode_Found = MODE_NOSIGNAL;
}
else
{
ucMode_Found = ucMode_Curr;
}
}
}
}
if (MODE_NOSIGNAL == ucMode_Found)
{
Reset_Mode();
}
else
{
bStable = 1; // Set bStable to 1 when signal timing is stable.
}
}
unsigned char Seek_DVI_Mode()
{
#if (TMDS_ENABLE)
unsigned char Wait_Time_Cnt;
RTDSetByte(SYNC_POR_4C, 0x03); // Measure data enable width and height
Wait_Time_Cnt = 60;
do
{
Delay_Xms(1);
RTDRead(SYNC_POR_4C, 0x07, Y_INC);
}
while ((Data[0] & 0x02) && (--Wait_Time_Cnt));
Data[7] = Data[5];
Data[6] = Data[6] & 0x0f;
Data[5] = Data[3];
Data[4] = Data[4] & 0x87;
Data[3] = Data[1];
Data[2] = Data[2] & 0x8f;
// Measure Failed !!!
if ((0 == ((unsigned int *)Data)[1]) || (0x07ff <= ((unsigned int *)Data)[1]) ||
(0 == ((unsigned int *)Data)[2]) || (0x07ff <= ((unsigned int *)Data)[2]) ||
(0 == Wait_Time_Cnt))
{
RTDSetByte(SYNC_POR_4C, 0x00);
usADC_Clock = 0;
usIPV_ACT_LEN = 0;
usIPH_ACT_WID = 0;
return MODE_NOSUPPORT;
}
// Save IH_TOTAL in usADC_Clock
usADC_Clock = ((unsigned int *)Data)[1] * 2;
// Save input data enable width and height
usIPV_ACT_LEN = ((unsigned int *)Data)[2];
usIPH_ACT_WID = ((unsigned int *)Data)[3] * 2;
// We don't support input image less than 350 active lines
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